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CN115810696A - Light emitting diode epitaxial wafer based on silicon-based buffer layer and preparation method thereof - Google Patents

Light emitting diode epitaxial wafer based on silicon-based buffer layer and preparation method thereof Download PDF

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CN115810696A
CN115810696A CN202211547627.XA CN202211547627A CN115810696A CN 115810696 A CN115810696 A CN 115810696A CN 202211547627 A CN202211547627 A CN 202211547627A CN 115810696 A CN115810696 A CN 115810696A
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buffer layer
temperature
silicon
emitting diode
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程龙
郑文杰
高虹
刘春杨
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Abstract

The invention relates to the technical field of semiconductors, and particularly discloses a light-emitting diode epitaxial wafer based on a silicon-based buffer layer and a preparation method thereof, wherein the preparation method comprises the following steps: providing a silicon substrate; sequentially depositing a buffer layer, a non-doped GaN layer, an n-type GaN layer, a light-emitting layer, an electron blocking layer and a p-type GaN layer on the silicon substrate along the epitaxial direction; the buffer layer comprises SiN layer and Al sequentially deposited along the epitaxial direction x Si 1‑x N transition layer, alN layer and low-temperature Al y Ga 1‑y N buffer layer/high temperature Al y Ga 1‑y An N buffer layer superlattice structure; the growth atmosphere of the buffer layer is NH 3 /N 2 . The preparation method can effectively reduce the silicon substrate and the GaNThe lattice mismatch and the thermal mismatch between the GaN substrate and the substrate reduce the defect density, improve the quality of GaN crystals, reduce the cracks of epitaxial wafers and improve the luminous efficiency of the light-emitting diode.

Description

Light-emitting diode epitaxial wafer based on silicon-based buffer layer and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer based on a silicon-based buffer layer and a preparation method thereof.
Background
One of the ultimate goals of GaN-based LEDs is to apply them to general lighting, and LED light sources have significant advantages over traditional light sources (incandescent lamps, fluorescent lamps). The biggest bright point of the GaN-based LED is energy saving, and the lumen efficiency of an incandescent lamp is only 10-15lm/W; the lumen efficiency of the fluorescent lamp is only 60-80lm/W; the current commercial LED lamp has lumen efficiency basically exceeding 100lm/W, and with the continuous progress of technology, the lighting efficiency of the LED lamp is expected to break through 200lm/W, and the LED lighting has bright prospect in the future of resource shortage and advocating energy conservation and environmental protection.
The key point of the difficulty of growing on a silicon substrate by using an MOCVD growth technology is that the lattice mismatch degree of GaN (0001) with a wurtzite structure and a silicon (111) substrate with a diamond structure reaches 20.4 percent and has thermal mismatch of up to 56 percent, and Ga reacts with Si to damage the surface of the substrate, so that GaN with high crystal quality is difficult to grow on the Si substrate, but the GaN crystal quality is still an important factor, because the defect can also influence the luminous efficiency and the reliability of a GaN-based LED to a certain degree, and the thermal mismatch can cause the bending and cracking of an epitaxial wafer, so that the preparation of the epitaxial wafer with no surface cracks is difficult.
Disclosure of Invention
The invention aims to provide a light-emitting diode epitaxial wafer based on a silicon-based buffer layer and a preparation method thereof aiming at the existing technical situation.
In order to achieve the purpose, the invention adopts the following technical scheme:
a preparation method of a light emitting diode epitaxial wafer based on a silicon-based buffer layer comprises the following steps:
providing a silicon substrate;
sequentially depositing a buffer layer, a non-doped GaN layer, an n-type GaN layer, a light-emitting layer, an electron blocking layer and a p-type GaN layer on the silicon substrate along the epitaxial direction;
the buffer layer comprises SiN layer and Al sequentially deposited along the epitaxial direction x Si 1-x N transition layer, alN layer and low-temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y An N buffer layer superlattice structure;
the growth atmosphere of the buffer layer is NH 3 /N 2
Preferably, the buffer layer is prepared by the following steps:
at NH 3 /N 2 In the growth atmosphere, a SiN layer and Al are sequentially deposited on the silicon substrate x Si 1-x An N transition layer and an AlN layer;
introducing H at the temperature of 1000-1300 DEG C 2 Processing the AlN layer;
at NH 3 /N 2 Depositing low-temperature Al on the treated AlN layer in a growth atmosphere y Ga 1-y N buffer layer/high temperature Al y Ga 1-y And the N buffer layer is of a superlattice structure.
Preferably, the method further comprises the following steps:
and carrying out nitridation treatment on the silicon substrate at the temperature of 900-1100 ℃.
Preferably, the low temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y In the superlattice structure of the N buffer layer, the content of Al components decreases progressively along the epitaxial direction.
Preferably, the low temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y The superlattice structure of the N buffer layer comprises low-temperature Al which grows periodically and alternately in turn y Ga 1-y N buffer layer and high-temperature Al y Ga 1-y N buffer layer with period of 1-10, low-temperature Al in each period y Ga 1-y The thickness of the N buffer layer is 0.5-5 nm, and the high-temperature Al y Ga 1-y The thickness of the N buffer layer is 1-10 nm; the low temperature Al y Ga 1-y The growth temperature of the N buffer layer is 750-900 ℃, and the high-temperature Al y Ga 1-y The growth temperature of the N buffer layer is 1000-1150 ℃.
Preferably, the Al is x Si 1-x In the N transition layer, the Al component content increases progressively along the epitaxial direction, and the Si component content decreases progressively along the epitaxial direction.
Preferably, the Al x Si 1-x In the N transition layer, the content of Al component is gradually increased from 0.01-0.1 to 0.5-0.8 along the epitaxial direction, and the content of Si component is gradually decreased from 0.8-0.9 to 0.2-0.5 along the epitaxial direction;
the low temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y In the superlattice structure of the N buffer layer, the content of Al components is gradually reduced from 0.5-0.7 to 0.01-0.1 along the epitaxial direction.
Preferably, the thickness of the SiN layer is 0.5-5 nm, and the Al is x Si 1-x The thickness of the N transition layer is 1-10 nm, and the thickness of the AlN layer is 5-20 nm.
Preferably, the electron blocking layer is an AlInGaN layer, wherein the Al component content is 0.005-0.1, the Al component content increases progressively along the epitaxial direction, and the In component content is 0.01-0.2.
The light-emitting diode epitaxial wafer based on the silicon-based buffer layer is prepared according to the preparation method of the light-emitting diode epitaxial wafer based on the silicon-based buffer layer.
The invention has the beneficial effects that:
the invention is realized by applying NH on a silicon substrate 3 /N 2 Growing a buffer layer in a growth atmosphere, wherein the buffer layer is composed of a SiN layer and Al which are deposited in sequence x Si 1-x N transition layer, alN layer and low-temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y The N buffer layer is composed of a superlattice structure, so that the diffusion of Si atoms on the silicon substrate is effectively blocked, the lattice mismatch and the thermal mismatch between the silicon substrate and a subsequent GaN material layer are reduced, the defect density is reduced, the crystal quality is improved, and the reduction of the crystal qualityThe epitaxial wafer cracks, and the luminous efficiency of the light-emitting diode is improved.
Drawings
Fig. 1 is a schematic structural diagram of a silicon-based buffer layer-based light emitting diode epitaxial wafer according to the present invention.
Fig. 2 is a flowchart of a method for preparing a silicon-based buffer layer-based light emitting diode epitaxial wafer according to the present invention.
Fig. 3 is a flow chart of a method of preparing a buffer layer of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below.
Referring to fig. 1 and 2, the present invention discloses a method for preparing a light emitting diode epitaxial wafer based on a silicon-based buffer layer, comprising:
providing a silicon substrate 1;
sequentially depositing a buffer layer 2, a non-doped GaN layer 3, an n-type GaN layer 4, a light-emitting layer 5, an electron blocking layer 6 and a p-type GaN layer 7 on a silicon substrate 1 along an epitaxial direction;
the buffer layer 2 comprises SiN layer 21 and Al sequentially deposited along the epitaxial direction x Si 1-x N transition layer 22, alN layer 23 and low-temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y An N buffer layer 2 superlattice structure 24;
the growth atmosphere of the buffer layer 2 is NH 3 /N 2
Since the AlN layer 23 is deposited directly on the silicon substrate 1 and is difficult to form a flat surface, in the present invention, the SiN layer 21, al are provided between the silicon substrate 1 and the AlN layer 23 x Si 1-x A transition layer 22 of N, by Al x Si 1-x The N transition layer 22 reduces lattice mismatch between the SiN layer 21 and the AlN layer 23, passing through the SiN layer 21 and Al x Si 1-x The arrangement of the N transition layer 22 promotes the two-dimensional growth of the AlN layer 23, is beneficial to forming a compact and smooth AlN layer 23, effectively blocks the diffusion of Si atoms on the silicon substrate 1, avoids the problem of the crystal quality reduction of the epitaxial layer caused by the diffusion of the Si atoms on the silicon substrate 1, provides a good growth platform for the growth of the subsequent epitaxial layer, and buffers the low-temperature AlyGa1-yNThe layer 2/high temperature AlyGa1-yN buffer layer 2 superlattice structure 24 may further mitigate the known lattice mismatch of the AlN layer 23 and the GaN material layer, wherein the low temperature Al y Ga 1-y The N buffer layer 2 is beneficial to releasing stress, reducing dislocation and high-temperature Al y Ga 1-y The N buffer layer 2 can improve the mobility of the alumina and increase high-temperature Al y Ga 1-y The transverse epitaxial capability of the N buffer layer 2 improves the crystal quality, provides a two-dimensional plane with high crystal quality for a subsequently deposited epitaxial layer, and the growth atmosphere of the buffer layer 2 adopts NH 3 /N 2 On the one hand, si and H are prevented from forming Si-H impurities, which is favorable for forming the high-quality SiN layer 21, and on the other hand, al and H are prevented from forming 2 Parasitic reaction occurs to lead the Al incorporation efficiency to be reduced, and further improve the Al x Si 1-x Crystal quality of the N transition layer 22 and the AlN layer 23.
The invention is achieved by applying NH on a silicon substrate 1 3 /N 2 Growing the buffer layer 2 in a growth atmosphere, wherein the buffer layer 2 is formed by sequentially depositing a SiN layer 21 and Al x Si 1-x N transition layer 22, alN layer 23 and low-temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y The N buffer layer 2 is composed of a superlattice structure 24, so that the diffusion of Si atoms on the silicon substrate 1 is effectively blocked, lattice mismatch and thermal mismatch between the silicon substrate 1 and a subsequent GaN material layer are reduced, the defect density is reduced, the crystal quality is improved, epitaxial wafer cracks are reduced, and the light emitting efficiency of the light emitting diode is improved.
In the invention, the buffer layer 2 is prepared by medium-micro A7 MOCVD (Metal-organic Chemical Vapor Deposition, MOCVD for short) equipment, the MOCVD can be switched through a gas source rapidly without dead zones, the types or proportions of reactants can be flexibly changed, the components and doping amount of compounds are easy to control, and the method is more suitable for preparing the epitaxial wafer.
The preparation steps of the buffer layer 2 are as follows:
at NH 3 /N 2 In a growth atmosphere, siN layer 21 and Al are sequentially deposited on silicon substrate 1 x Si 1-x An N transition layer 22 and an AlN layer 23;
introducing H at the temperature of 1000-1300 DEG C 2 To the AlN layer 23Carrying out treatment;
at NH 3 /N 2 Depositing low temperature Al on the treated AlN layer 23 in a growth atmosphere y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y The N buffer layer 2 has a superlattice structure 24.
By high temperature H 2 The AlN layer 23 is recrystallized by treatment, so that the crystal quality of the AlN layer 23 can be effectively improved and the subsequent low-temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y The N buffer layer 2 superlattice structure 24 provides a good growth platform.
Wherein, still include:
nitriding the silicon substrate 1 at the temperature of 900-1100 ℃, and subjecting the silicon substrate 1 to high-temperature NH 3 After the nitridation treatment, a Si-N bond is formed on the surface of the silicon substrate 1, so that the N-Si bonding capability formed on the substrate is improved, and preparation is made for depositing an AlN layer later.
Wherein, low temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y In the superlattice structure 24 of the N buffer layer 2, the content of Al component decreases progressively along the epitaxial direction, thereby increasing the low-temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y The lattice matching between the superlattice structure 24 of the N buffer layer 2 and the GaN material layer effectively reduces the dislocation density and the crack density, and further improves the crystal quality of the subsequent epitaxial layer.
Wherein, low temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y The superlattice structure 24 of the N buffer layer 2 comprises low-temperature Al which grows periodically and sequentially in an alternating way y Ga 1-y N buffer layer 2 and high temperature Al y Ga 1-y The N buffer layer 2 has a period of 1 to 10, illustratively, 1, 3, 6, 8 or 10, but is not limited thereto, and preferably, has a period of 2 to 10, by being high in Al y Ga 1-y N temperature buffer layer 2 and low Al y Ga 1- y The N temperature buffer layers 2 are alternately stacked in a multi-period manner, and whether the thermal stress is completely generated or not is reducedDislocation defects generated by thermal stress are reduced, and the lattice quality of a subsequent epitaxial layer is improved; low temperature Al in each cycle y Ga 1-y The thickness of the N buffer layer 2 is 0.5-5 nm, and the high temperature Al y Ga 1-y The N buffer layer 2 has a thickness of 1 to 10nm, and is illustratively low temperature Al y Ga 1-y The N buffer layer 2 has a thickness of 0.5nm, 1nm, 2nm, 2.5nm, 3nm, 4nm or 5nm, but is not limited thereto, low temperature Al y Ga 1-y The N buffer layer 2 is too thin, the stress release effect is insufficient, the thickness is too thick, and the defect density is easily increased; high temperature Al y Ga 1-y The N buffer layer 2 has a thickness of 1nm, 3nm, 5nm, 7nm, 9nm or 10nm, but is not limited thereto, high temperature Al y Ga 1-y The N buffer layer 2 is too thin, so that a flat material layer is not formed easily, and the density defect is increased; low temperature Al y Ga 1-y The growth temperature of the N buffer layer 2 is 750-900 ℃, and the low-temperature Al y Ga 1-y The N buffer layer 2 has too low growth temperature, easy increase of defect density, too high growth temperature, poor stress release effect and high temperature Al y Ga 1-y The growth temperature of the N buffer layer 2 is 1000-1150 ℃, and the high-temperature Al y Ga 1-y The growth temperature of the N buffer layer 2 is too low, the lateral growth capability is insufficient, and it is difficult to generate a two-dimensional plane.
Wherein, al x Si 1-x In the N transition layer 22, the Al component content increases progressively along the epitaxial direction, the Si component content decreases progressively along the epitaxial direction, and by gradual changes in the Al component content and the Si component content, lattice mismatch between the SiN layer 21 and the AlN layer 23 can be effectively reduced, and the crystal quality of the AlN buffer layer 2 is improved.
Wherein, al x Si 1-x In the N transition layer 22, 0 < x < 1, preferably Al x Si 1-x In the N transition layer 22, the content of Al component is gradually increased from 0.01-0.1 to 0.5-0.8 along the epitaxial direction, and the content of Si component is gradually decreased from 0.8-0.9 to 0.2-0.5 along the epitaxial direction; more preferably, the Al component content increases from 0.1 to 0.6 in the epitaxial direction and the Si component content decreases from 0.9 to 0.3 in the epitaxial direction.
Wherein, low temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y In the superlattice structure 24 of the N buffer layer 2,0 < y < 1, preferably low temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y In the superlattice structure 24 of the N buffer layer 2, the Al component content decreases from 0.5 to 0.7 to 0.01 to 0.1 in the epitaxial direction, and more preferably, the Al component content decreases from 0.5 to 0.1 in the epitaxial direction.
Wherein the thickness of the SiN layer 21 is 0.5 to 5nm x Si 1-x The thickness of the N transition layer 22 is 1 to 10nm, the thickness of the AlN layer 23 is 5 to 20nm, and the thickness of the SiN layer 21 is, illustratively, 0.5nm, 1.5nm, 2.5nm, 3.5nm, or 4.5nm, but is not limited thereto, and Al x Si 1-x The thickness of the N transition layer 22 is 1nm, 2nm, 4nm, 6nm, 8nm, 9nm or 10nm, but not limited thereto, the thickness of the AlN layer 23 is 5nm, 8nm, 12nm, 15nm, 17nm, 18nm or 20nm, but not limited thereto, when the buffer layer 2 is too thick, light absorption occurs, and the light emitting efficiency of the light emitting diode is reduced, and when the buffer layer 2 is too thin, stress release is incomplete, and the defect density is increased, which affects the crystal quality of the subsequent epitaxial layer, and also reduces the light emitting efficiency of the light emitting diode.
Preferably, the growth pressure of the buffer layer 2 is 50-300 torr, the low pressure is favorable for improving the mobility of atoms and increasing the transverse diffusion capability of the atoms, and the buffer layer 2 is easier to form a two-dimensional plane, which is favorable for growing high-quality crystals on a subsequent epitaxial layer.
The electron blocking layer 6 is an AlInGaN layer, wherein the Al component content is 0.005-0.1, the Al component content increases progressively along the epitaxial direction, and the In component content is 0.01-0.2, so that electron overflow can be effectively limited, blocking of holes can be reduced, and the injection efficiency of the holes to the quantum well is improved.
Wherein the growth temperature of the non-doped GaN layer 3 is 1050-1200 ℃, the pressure is 100-600 torr, and the thickness is 1-5 um. The growing temperature of the non-doped GaN layer 3 is higher, the pressure is lower, the quality of the prepared GaN crystal is better, meanwhile, along with the increase of the thickness of the GaN, the compressive stress can be released through stacking faults, the line defects are reduced, the crystal quality is improved, the reverse leakage is reduced, but the consumption of the Ga source material is larger when the thickness of the GaN layer is increased, and therefore the thickness is not suitable to be too thick.
Wherein the growth temperature of the n-type GaN layer 4 is 1050 DEG CAt 1200 deg.C, 100-600 torr, 2-3 um thickness, 1X 10 Si doping concentration 19 /cm3~5×10 19 Cm3, insufficient thickness, difficulty in effective pressure release, higher Si doping, effective reduction of the resistivity of the n-type GaN layer 4, however, if the Si doping concentration is too high, crystal quality is reduced.
The light emitting layer 5 is an InGaN quantum well layer and an AlGaN quantum barrier layer which are periodically and alternately stacked, the period is 6-12, the growth temperature of the InGaN quantum well layer is 790-810 ℃, the thickness is 2-5 nm, the growth pressure is 50-300torr, the growth temperature of the AlGaN quantum barrier layer is 800-900 ℃, the thickness is 5-15 nm, the growth pressure is 50-300torr, and the Al component content is 0.01-0.1. The light-emitting layer 5 is a region where electrons and holes are compounded, and the reasonable structural design can obviously increase the overlapping degree of wave functions of the electrons and the holes, so that the light-emitting efficiency of the LED device is improved.
The light-emitting diode epitaxial wafer based on the silicon-based buffer layer is prepared according to the preparation method of the light-emitting diode epitaxial wafer based on the silicon-based buffer layer.
The invention is further illustrated by the following examples in conjunction with the drawings:
example 1
Referring to fig. 1 and 2, a method for preparing a light emitting diode epitaxial wafer based on a silicon-based buffer layer includes:
s100, providing a silicon substrate 1, and performing nitridation treatment on the silicon substrate 1 at the temperature of 1100 ℃;
s200, sequentially depositing a buffer layer 2, a non-doped GaN layer 3, an n-type GaN layer 4, a light-emitting layer 5, an electronic barrier layer 6 and a p-type GaN layer 7 on a silicon substrate 1 along an epitaxial direction, and specifically comprising the following steps:
s210, depositing a buffer layer 2 on the silicon substrate 1, wherein the buffer layer 2 comprises an SiN layer 21 and Al which are sequentially deposited along the epitaxial direction x Si 1-x N transition layer 22, alN layer 23 and low-temperature Al y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y An N buffer layer 2 superlattice structure 24; referring to fig. 3, the buffer layer 2 is prepared as follows:
s211. In NH 3 /N 2 Under the growth atmosphereThe SiN layer 21 is deposited on the silicon substrate 1, the thickness of the SiN layer 21 is 2.5nm, the growth pressure is 100torr, and the growth temperature is 850 ℃.
S212, in NH 3 /N 2 Depositing Al on the SiN layer 21 in a growth atmosphere x Si 1-x N transition layer 22, al x Si 1-x The thickness of the N transition layer 22 is 5.5nm, the growth pressure is 150torr, the growth temperature is 850 ℃, the Al component content is increased from 0.1 to 0.6 along the epitaxial direction, and the Si component content is decreased from 0.9 to 0.4 along the epitaxial direction.
S213. In NH 3 /N 2 In a growth atmosphere, in Al x Si 1-x An AlN layer 23 is deposited on the N transition layer 22, the thickness of the AlN layer 23 is 10nm, the growth pressure is 100torr, and the growth temperature is 850 ℃.
S214, introducing H at the temperature of 1200 DEG C 2 The AlN layer 23 is processed.
S215 in NH 3 /N 2 Depositing low temperature Al on the treated AlN layer 23 in a growth atmosphere y Ga 1-y N buffer layer 2/high temperature Al y Ga 1-y The superlattice structure 24 of the N buffer layer 2, the Al component content decreases from 0.5 to 0.1 along the epitaxial direction, the period is 5, and the low-temperature Al in each period y Ga 1-y The thickness of the N buffer layer 2 is 1.5nm, and the high temperature Al y Ga 1-y The thickness of the N buffer layer 2 is 6.5nm; the low temperature Al y Ga 1-y The growth temperature of the N buffer layer 2 is 820 ℃, and the high-temperature Al y Ga 1-y The growth temperature of the N buffer layer 2 is 1050 ℃.
S220, depositing a non-doped GaN layer 3 on the buffer layer 2:
wherein, the growth temperature of the non-doped GaN layer 3 is 1100 ℃, the pressure is 150torr, and the thickness is 3um.
S230, depositing an n-type GaN layer 4 on the non-doped GaN layer 3:
wherein the growth temperature of the n-type GaN layer 4 is 1120 ℃, the pressure is 100torr, the thickness is 2um, the doping concentration of Si is 2.5 multiplied by 10 19 /cm3。
S240, depositing a light-emitting layer 5 on the n-type GaN layer 4;
the light emitting layer 5 is an InGaN quantum well layer and an AlGaN quantum barrier layer which are periodically and alternately stacked, the period is 10, the growth temperature of the InGaN quantum well layer is 795 ℃, the thickness of the InGaN quantum well layer is 3.5nm, the growth pressure is 200torr, the in component content is 0.22, the growth temperature of the AlGaN quantum barrier layer is 855 ℃, the thickness of the AlGaN quantum barrier layer is 9.8nm, the growth pressure is 200torr, and the Al component content is 0.05.
S250, depositing an electron blocking layer 6 on the light emitting layer 5:
the electron blocking layer 6 was an AlInGaN layer in which the Al component content was gradually increased from 0.01 to 0.05 in the epitaxial direction, the in component content was 0.01, the growth pressure was 200torr, and the growth temperature was 965 ℃.
S250, depositing a p-type GaN layer 7 on the electron blocking layer 6:
the growth temperature of the p-type GaN layer 7 is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, the Mg doping concentration is 2 multiplied by 10 20 /cm3。
Example 2
A preparation method of a light emitting diode epitaxial wafer based on a silicon-based buffer layer comprises the following steps:
s100, providing a silicon substrate, and performing nitridation treatment on the silicon substrate at the temperature of 1100 ℃;
s200, sequentially depositing a buffer layer, a non-doped GaN layer, an n-type GaN layer, a light emitting layer, an electronic barrier layer and a p-type GaN layer on a silicon substrate along an epitaxial direction, and specifically comprising the following steps:
s210, depositing a buffer layer on the silicon substrate, wherein the buffer layer comprises an SiN layer and Al which are sequentially deposited along the epitaxial direction x Si 1-x N transition layer, alN layer and low-temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y An N buffer layer superlattice structure; the preparation steps of the buffer layer are as follows:
s211. In NH 3 /N 2 And depositing an SiN layer on the silicon substrate in a growth atmosphere, wherein the thickness of the SiN layer is 0.5nm, the growth pressure is 100torr, and the growth temperature is 850 ℃.
S212. In NH 3 /N 2 Depositing Al on the SiN layer in a growth atmosphere x Si 1-x Transition layer of N, al x Si 1-x The thickness of the N transition layer is 3nm, the growth pressure is 150torr, the growth temperature is 850 ℃, and the content of Al component is along the epitaxyThe direction increases from 0.1 to 0.6, and the Si component content decreases from 0.9 to 0.4 in the epitaxial direction.
S213. In NH 3 /N 2 Under a growth atmosphere, in Al x Si 1-x And depositing an AlN layer on the N transition layer, wherein the thickness of the AlN layer is 5nm, the growth pressure is 100torr, and the growth temperature is 850 ℃.
S214, introducing H at the temperature of 1200 DEG C 2 And processing the AlN layer.
S215 in NH 3 /N 2 Depositing low-temperature Al on the treated AlN layer in the growth atmosphere y Ga 1-y N buffer layer/high temperature Al y Ga 1-y The content of Al component in the superlattice structure of the N buffer layer decreases from 0.5 to 0.1 along the epitaxial direction, the period is 5, and low-temperature Al is in each period y Ga 1-y The thickness of the N buffer layer is 3nm, and the high temperature Al y Ga 1-y The thickness of the N buffer layer is 10nm; the low temperature Al y Ga 1-y The growth temperature of the N buffer layer is 820 ℃, and the high-temperature Al y Ga 1-y The growth temperature of the N buffer layer was 1050 ℃.
S220, depositing a non-doped GaN layer on the buffer layer:
wherein the growth temperature of the non-doped GaN layer is 1100 ℃, the pressure is 150torr, and the thickness is 3um.
S230, depositing an n-type GaN layer on the non-doped GaN layer:
wherein the growth temperature of the n-type GaN layer is 1120 ℃, the pressure is 100torr, the thickness is 2um, the doping concentration of Si is 2.5 multiplied by 10 19 /cm3。
S240, depositing a light-emitting layer on the n-type GaN layer;
the light emitting layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are periodically and alternately stacked, the period is 10, the growth temperature of the InGaN quantum well layer is 795 ℃, the thickness of the InGaN quantum well layer is 3.5nm, the growth pressure is 200torr, the in component content is 0.22, the growth temperature of the AlGaN quantum barrier layer is 855 ℃, the thickness of the AlGaN quantum barrier layer is 9.8nm, the growth pressure is 200torr, and the Al component content is 0.05.
S250, depositing an electron blocking layer on the luminous layer:
the electron blocking layer is an AlInGaN layer, wherein the Al component content is gradually increased from 0.01 to 0.05 along the epitaxial direction, the in component content is 0.01, the growth pressure is 200torr, and the growth temperature is 965 ℃.
S250, depositing a p-type GaN layer on the electron blocking layer:
the growth temperature of the P-type GaN layer is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, the Mg doping concentration is 2 multiplied by 10 20 /cm3。
Example 3
A preparation method of a light emitting diode epitaxial wafer based on a silicon-based buffer layer comprises the following steps:
s100, providing a silicon substrate, and performing nitridation treatment on the silicon substrate at the temperature of 1100 ℃;
s200, sequentially depositing a buffer layer, a non-doped GaN layer, an n-type GaN layer, a light emitting layer, an electronic barrier layer and a p-type GaN layer on a silicon substrate along an epitaxial direction, and specifically comprising the following steps:
s210, depositing a buffer layer on the silicon substrate, wherein the buffer layer comprises an SiN layer and Al which are sequentially deposited along the epitaxial direction x Si 1-x N transition layer, alN layer and low-temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y An N buffer layer superlattice structure; the preparation steps of the buffer layer are as follows:
s211. In NH 3 /N 2 And depositing an SiN layer on the silicon substrate in a growth atmosphere, wherein the thickness of the SiN layer is 2.5nm, the growth pressure is 100torr, and the growth temperature is 850 ℃.
S212. In NH 3 /N 2 Depositing Al on the SiN layer in a growth atmosphere x Si 1-x Transition layer of N, al x Si 1-x The thickness of the N transition layer is 5.5nm, the growth pressure is 150torr, the growth temperature is 850 ℃, the content of Al component is increased from 0.2 to 0.8 along the epitaxial direction, and the content of Si component is decreased from 0.8 to 0.2 along the epitaxial direction.
S213. In NH 3 /N 2 In a growth atmosphere, in Al x Si 1-x And depositing an AlN layer on the N transition layer, wherein the thickness of the AlN layer is 10nm, the growth pressure is 100torr, and the growth temperature is 850 ℃.
S214, introducing H at the temperature of 1200 DEG C 2 And processing the AlN layer.
S215 in NH 3 /N 2 Depositing low-temperature Al on the treated AlN layer in the growth atmosphere y Ga 1-y N buffer layer/high temperature Al y Ga 1-y The content of Al component in the superlattice structure of the N buffer layer decreases from 0.7 to 0.1 along the epitaxial direction, the period is 5, and low-temperature Al is in each period y Ga 1-y The thickness of the N buffer layer is 1.5nm, and the high temperature Al y Ga 1-y The thickness of the N buffer layer is 6.5nm; the low temperature Al y Ga 1-y The growth temperature of the N buffer layer is 820 ℃, and the high-temperature Al y Ga 1-y The growth temperature of the N buffer layer was 1050 ℃.
S220, depositing a non-doped GaN layer on the buffer layer:
wherein the growth temperature of the non-doped GaN layer is 1100 ℃, the pressure is 150torr, and the thickness is 3um.
S230, depositing an n-type GaN layer on the non-doped GaN layer:
wherein the growth temperature of the n-type GaN layer is 1120 ℃, the pressure is 100torr, the thickness is 2um, the doping concentration of Si is 2.5 multiplied by 10 19 /cm3。
S240, depositing a light emitting layer on the n-type GaN layer;
the light emitting layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are periodically and alternately stacked, the period is 10, the growth temperature of the InGaN quantum well layer is 795 ℃, the thickness of the InGaN quantum well layer is 3.5nm, the growth pressure is 200torr, the in component content is 0.22, the growth temperature of the AlGaN quantum barrier layer is 855 ℃, the thickness of the AlGaN quantum barrier layer is 9.8nm, the growth pressure is 200torr, and the Al component content is 0.05.
S250, depositing an electron blocking layer on the luminous layer:
the electron blocking layer is an AlInGaN layer, wherein the Al component content is gradually increased from 0.01 to 0.05 along the epitaxial direction, the in component content is 0.01, the growth pressure is 200torr, and the growth temperature is 965 ℃.
S250, depositing a p-type GaN layer on the electron blocking layer:
the growth temperature of the P-type GaN layer is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, the Mg doping concentration is 2 multiplied by 10 20 /cm3。
Comparative example 1
This comparative example differs from example 1 in that: step S214 is not performed.
Comparative example 2
This comparative example differs from example 1 in that: in step S211, step 212, step 213 and step 215, the growth atmosphere is H 2
Comparative example 3
This comparative example differs from example 1 in that: the buffer layer does not include Al x Si 1-x And an N transition layer.
Comparative example 4
This comparative example differs from example 1 in that: the buffer layer does not include low temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y And an N buffer layer superlattice structure.
Comparative example 5
This comparative example differs from example 1 in that: step S215 is as follows:
at NH 3 /N 2 Depositing Al on the treated AlN layer in a growth atmosphere y Ga 1-y N buffer layer, wherein Al component content is always kept at 0.5 along epitaxial direction, period is 5, al in each period y Ga 1-y The thickness of the N buffer layer is 1.5nm; the Al is y Ga 1-y The growth temperature of the N buffer layer was 820 ℃.
Comparative example 6
The comparative example differs from example 1 in that: in step S210, a buffer layer is deposited on the silicon substrate, wherein the buffer layer is an AlN layer, specifically, NH 3 /N 2 And depositing an AlN layer on the silicon substrate under the growth atmosphere, wherein the thickness of the AlN layer is 39.5nm.
The luminous efficiencies corresponding to the epitaxial wafers prepared in the embodiments 1 to 3 and the comparative examples 1 to 6 are tested, the luminous efficiencies measured in the embodiments 1 to 3 and the comparative examples 1 to 5 are compared with the luminous efficiency measured in the comparative example 6, and the luminous efficiency improvement rates of the embodiments 1 to 3 and the comparative examples 1 to 5 are obtained, wherein the luminous efficiency improvement rate is a positive value, which means that the luminous efficiency of the experimental group is higher than that of the comparative example 6, and the luminous efficiency improvement rate is a negative value, which means that the luminous efficiency of the experimental group is lower than that of the comparative example 6.
The results were as follows:
Figure BDA0003973181960000121
Figure BDA0003973181960000131
the experimental results show that the results of examples 1 to 3 are superior to those of comparative examples 3 to 6, and it can be seen that the SiN layer and Al layer according to the present invention are used x Si 1-x N transition layer, alN layer and low-temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y The buffer layer consisting of the superlattice structure of the N buffer layer has luminous efficiency; the luminous efficiency improvement value of the example 1 is higher than that of the comparative example 1 and that of the comparative example 2, and it can be seen that the AlN layer is subjected to high temperature H in the buffer layer preparation process 2 Treatment and use of NH 3 /N 2 The growth atmosphere can improve the crystal quality; the luminous efficiency improvement value of the embodiment 1 is higher than that of the comparative example 5, and the low-temperature Al of the invention can be seen y Ga 1-y N buffer layer/high temperature Al y Ga 1-y The improvement of the superlattice structure of the N buffer layer on the light-emitting efficiency of the epitaxial wafer is higher than that of the conventional Al y Ga 1-y And an N buffer layer.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. A preparation method of a light emitting diode epitaxial wafer based on a silicon-based buffer layer is characterized by comprising the following steps:
providing a silicon substrate;
sequentially depositing a buffer layer, a non-doped GaN layer, an n-type GaN layer, a light-emitting layer, an electron blocking layer and a p-type GaN layer on the silicon substrate along the epitaxial direction;
the buffer layer comprises SiN layer and Al sequentially deposited along the epitaxial direction x Si 1-x N transition layer, alN layer and low-temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y An N buffer layer superlattice structure;
the growth atmosphere of the buffer layer is NH 3 /N 2
2. The method for preparing the epitaxial wafer of the light emitting diode based on the silicon-based buffer layer according to claim 1, wherein the buffer layer is prepared by the following steps:
at NH 3 /N 2 In the growth atmosphere, a SiN layer and Al are sequentially deposited on the silicon substrate x Si 1-x An N transition layer and an AlN layer;
introducing H at the temperature of 1000-1300 DEG C 2 Processing the AlN layer;
at NH 3 /N 2 Depositing low-temperature Al on the treated AlN layer in a growth atmosphere y Ga 1-y N buffer layer/high temperature Al y Ga 1-y And the N buffer layer is of a superlattice structure.
3. The method for preparing the epitaxial wafer of the light emitting diode based on the silicon-based buffer layer according to claim 2, further comprising:
and carrying out nitridation treatment on the silicon substrate at the temperature of 900-1100 ℃.
4. The method for preparing the silicon-based buffer layer-based light emitting diode epitaxial wafer as claimed in claim 1, wherein the low temperature Al is y Ga 1-y N buffer layer/high temperature Al y Ga 1-y In the superlattice structure of the N buffer layer, the content of Al components decreases progressively along the epitaxial direction.
5. The method for preparing the epitaxial wafer of the light emitting diode based on the silicon-based buffer layer according to claim 4, wherein the low temperature Al is y Ga 1-y N buffer layer/high temperature Al y Ga 1-y The superlattice structure of the N buffer layer comprises low-temperature Al which grows periodically and alternately in turn y Ga 1-y N buffer layer and high temperature Al y Ga 1-y N buffer layer with period of 1-10, low temperature Al in each period y Ga 1-y The thickness of the N buffer layer is 0.5-5 nm, and the high-temperature Al y Ga 1-y The thickness of the N buffer layer is 1-10 nm; the low temperature Al y Ga 1-y The growth temperature of the N buffer layer is 750-900 ℃, and the high-temperature Al y Ga 1-y The growth temperature of the N buffer layer is 1000-1150 ℃.
6. The method for preparing the silicon-based buffer layer-based light emitting diode epitaxial wafer as claimed in claim 1, wherein the Al is x Si 1-x In the N transition layer, the Al component content increases progressively along the epitaxial direction, and the Si component content decreases progressively along the epitaxial direction.
7. The method for preparing the silicon-based buffer layer-based light emitting diode epitaxial wafer as claimed in claim 1, wherein the Al is x Si 1-x In the N transition layer, the content of Al components is gradually increased from 0.01 to 0.1 to 0.5 to 0.8 along the epitaxial direction, and the content of Si components is gradually decreased from 0.8 to 0.9 to 0.2 to 0.5 along the epitaxial direction;
the low temperature Al y Ga 1-y N buffer layer/high temperature Al y Ga 1-y In the superlattice structure of the N buffer layer, the content of Al components is reduced from 0.5-0.7 to 0.01-0.1 along the epitaxial direction.
8. The method for preparing the epitaxial wafer of the light emitting diode based on the silicon-based buffer layer according to claim 1, wherein the thickness of the SiN layer is 0.5-5 nm, and the Al layer is x Si 1-x The thickness of the N transition layer is 1-10 nm, and the thickness of the AlN layer is 5-20 nm.
9. The method for preparing the silicon-based buffer layer-based light emitting diode epitaxial wafer as claimed In claim 1, wherein the electron blocking layer is an AlInGaN layer, wherein the Al component content is 0.005-0.1, the Al component content increases along the epitaxial direction, and the In component content is 0.01-0.2.
10. A silicon-based buffer layer-based light emitting diode epitaxial wafer, which is prepared by the method for preparing the silicon-based buffer layer-based light emitting diode epitaxial wafer according to any one of claims 1 to 9.
CN202211547627.XA 2022-11-30 2022-11-30 Light emitting diode epitaxial wafer based on silicon-based buffer layer and preparation method thereof Pending CN115810696A (en)

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CN116053369A (en) * 2023-03-31 2023-05-02 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer and preparation method thereof
CN116759505A (en) * 2023-08-23 2023-09-15 江西兆驰半导体有限公司 LED epitaxial wafer based on silicon substrate, preparation method of LED epitaxial wafer and LED
CN118572002A (en) * 2024-07-31 2024-08-30 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116053369A (en) * 2023-03-31 2023-05-02 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer and preparation method thereof
CN116759505A (en) * 2023-08-23 2023-09-15 江西兆驰半导体有限公司 LED epitaxial wafer based on silicon substrate, preparation method of LED epitaxial wafer and LED
CN116759505B (en) * 2023-08-23 2023-11-17 江西兆驰半导体有限公司 LED epitaxial wafer based on silicon substrate, preparation method of LED epitaxial wafer and LED
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