CN115816261B - Silicon wafer processing method and device - Google Patents
Silicon wafer processing method and device Download PDFInfo
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- CN115816261B CN115816261B CN202211597468.4A CN202211597468A CN115816261B CN 115816261 B CN115816261 B CN 115816261B CN 202211597468 A CN202211597468 A CN 202211597468A CN 115816261 B CN115816261 B CN 115816261B
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 275
- 239000010703 silicon Substances 0.000 title claims abstract description 275
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 274
- 238000003672 processing method Methods 0.000 title abstract description 9
- 238000005498 polishing Methods 0.000 claims abstract description 61
- 235000012431 wafers Nutrition 0.000 claims description 264
- 238000007689 inspection Methods 0.000 claims description 44
- 238000004140 cleaning Methods 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 17
- 230000002950 deficient Effects 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000002245 particle Substances 0.000 description 7
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention provides a silicon wafer processing method and device, and belongs to the technical field of semiconductor manufacturing. The silicon wafer processing method comprises the following steps: a scratch checking step, which is used for performing scratch checking on the silicon wafer with qualified flatness checking and judging whether the silicon wafer is scratched or not; a scratch depth obtaining step, which is used for obtaining the scratch depth of the silicon wafer if the silicon wafer is scratched; a processing step, which is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: and (5) reworking double-sided polishing, reworking single-sided polishing, and judging that the silicon wafer is unqualified. The technical scheme of the invention can effectively reduce useless reworking and improve reworking efficiency.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a silicon wafer processing method and device.
Background
With the increasing integration level of integrated circuits, the characteristic line width is continuously reduced, and the requirements on clean areas, namely the requirements on the raw material monocrystalline silicon are more and more severe, and the defects such as scratches and the like are zero.
At present, whether defects such as scratches and the like exist on polished silicon wafers or not is checked through equipment. If the silicon wafer is scratched, double-sided polishing reworking repair is carried out no matter the length and depth of the scratch, single-sided final polishing, cleaning and other steps are carried out after double-sided polishing, and then whether reworking is successful or not is checked again. Because of the limitation of the thickness of the silicon wafer, the double-sided polishing can be reworked for 2 times at most, the thickness of the silicon wafer after the double-sided polishing exceeds 2 times is lower than the thickness required by customers, and the silicon wafer can only be scrapped. The silicon wafer quality can be adversely affected by repeated reworking, so that the silicon wafer surface is severely corroded and uneven.
Disclosure of Invention
In order to solve the technical problems, the invention provides a silicon wafer processing method and a silicon wafer processing device, which can effectively reduce useless reworking and improve reworking efficiency.
In order to achieve the above purpose, the technical scheme adopted by the embodiment of the invention is as follows:
A method of processing a silicon wafer comprising:
A scratch checking step, which is used for performing scratch checking on the silicon wafer with qualified flatness checking and judging whether the silicon wafer is scratched or not;
A scratch depth obtaining step, which is used for obtaining the scratch depth of the silicon wafer if the silicon wafer is scratched;
A processing step, which is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: and (5) reworking double-sided polishing, reworking single-sided polishing, and judging that the silicon wafer is unqualified.
In some embodiments, the processing step comprises:
When the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer as a disqualified silicon wafer;
When the scratch depth of the silicon wafer is larger than a second value and smaller than or equal to the first value, reworking and double-side polishing are performed on the silicon wafer;
and when the scratch depth of the silicon wafer is larger than a third value and smaller than or equal to the second value, reworking the silicon wafer to polish the single surface.
In some embodiments, after the reworking double sided polishing of the silicon wafer, the method further comprises:
And reworking and single-sided polishing the silicon wafer.
In some embodiments, after the reworking single sided polishing of the silicon wafer, the method further comprises:
and cleaning the silicon wafer.
In some embodiments, after the cleaning the silicon wafer, the method further comprises:
performing flatness inspection and thickness inspection on the silicon wafer;
returning the scratch checking step to the silicon wafer qualified in flatness checking and thickness checking;
And judging the silicon wafer with unqualified flatness inspection and thickness inspection as scrap.
The embodiment of the invention also provides a silicon wafer processing device, which comprises:
The scratch checking module is used for carrying out scratch checking on the silicon wafer with qualified flatness checking and judging whether the silicon wafer is scratched or not;
the scratch depth acquisition module is used for acquiring the scratch depth of the silicon wafer if the silicon wafer is scratched;
The processing module is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: and (5) reworking double-sided polishing, reworking single-sided polishing, and judging that the silicon wafer is unqualified.
In some embodiments, the processing module is specifically configured to:
When the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer as a disqualified silicon wafer;
When the scratch depth of the silicon wafer is larger than a second value and smaller than or equal to the first value, reworking and double-side polishing are performed on the silicon wafer;
and when the scratch depth of the silicon wafer is larger than a third value and smaller than or equal to the second value, reworking the silicon wafer to polish the single surface.
In some embodiments, the processing module is further configured to rework single-sided polishing of the silicon wafer after the reworking double-sided polishing of the silicon wafer.
In some embodiments, the apparatus further comprises:
And the cleaning module is used for cleaning the silicon wafer after reworking and single-sided polishing of the silicon wafer.
In some embodiments, the apparatus further comprises:
The flatness and thickness checking module is used for checking the flatness and the thickness of the silicon wafer; and turning to the scratch inspection module for processing the silicon wafers with qualified flatness inspection and thickness inspection, and judging the silicon wafers with unqualified flatness inspection and thickness inspection as scrap.
The beneficial effects of the invention are as follows:
in the embodiment, the silicon wafer with qualified flatness inspection is subjected to scratch inspection, whether the silicon wafer is scratched or not is judged, if the silicon wafer is scratched, the processing mode of the silicon wafer is determined according to the scratch depth of the silicon wafer, so that different types of reworking modes can be accurately selected through the scratch depth of the silicon wafer, useless reworking can be effectively reduced, and the reworking efficiency is improved; in addition, because useless reworking is avoided, the potential risk caused by multiple reworking can be reduced, and the silicon wafer yield is improved.
Drawings
FIG. 1 is a schematic flow chart of a silicon wafer processing method according to an embodiment of the invention;
FIG. 2 is a schematic flow chart of a process for processing a silicon wafer according to an embodiment of the present invention;
FIG. 3 is a block diagram showing the structure of a silicon wafer processing apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which are obtained by a person skilled in the art based on the described embodiments of the invention, fall within the scope of protection of the invention.
In the related art, the scratch depth of the silicon wafer cannot be determined, if the silicon wafer is scratched, the silicon wafer can only be reworked uniformly no matter the length and the depth of the scratch, and a reworking mode cannot be selected, so that a plurality of useless reworking modes are increased, the quality of the silicon wafer is adversely affected by repeated reworking, and the yield of the silicon wafer is reduced.
The invention provides a silicon wafer processing method and device, which can effectively reduce useless reworking and improve reworking efficiency.
An embodiment of the present invention provides a silicon wafer processing method, as shown in fig. 1, including:
A scratch checking step 101, which is used for performing scratch checking on a silicon wafer with qualified flatness checking and judging whether the silicon wafer is scratched or not;
A scratch depth obtaining step 102, which is used for obtaining the scratch depth of the silicon wafer if the silicon wafer is scratched;
A processing step 103, wherein the processing mode of the silicon wafer is determined according to the scratch depth of the silicon wafer, and the processing mode comprises any one of the following steps: and (5) reworking double-sided polishing, reworking single-sided polishing, and judging that the silicon wafer is unqualified.
In the embodiment, the silicon wafer with qualified flatness inspection is subjected to scratch inspection, whether the silicon wafer is scratched or not is judged, if the silicon wafer is scratched, the processing mode of the silicon wafer is determined according to the scratch depth of the silicon wafer, so that different types of reworking modes can be accurately selected through the scratch depth of the silicon wafer, useless reworking can be effectively reduced, and the reworking efficiency is improved; in addition, because useless reworking is avoided, the potential risk caused by multiple reworking can be reduced, and the silicon wafer yield is improved.
In this embodiment, the Scratch depth of the silicon wafer can be obtained through the Scratch detection device (the Scratch depth can be measured through the 3D measurement microscope, and the precision can reach nm level), the silicon wafer is polished on one side through the single-side polishing device, and the silicon wafer is polished on both sides through the double-side polishing device.
In some embodiments, the processing step comprises:
When the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer as a disqualified silicon wafer;
When the scratch depth of the silicon wafer is larger than a second value and smaller than or equal to the first value, reworking and double-side polishing are performed on the silicon wafer;
and when the scratch depth of the silicon wafer is larger than a third value and smaller than or equal to the second value, reworking the silicon wafer to polish the single surface.
In some embodiments, the first value may be 3-5 μm, the second value may be 100-200nm, and the third value may be 0.
In the embodiment, when the scratch depth of the silicon wafer is relatively large, for example, the scratch depth is larger than a first value, the silicon wafer is directly judged to be an unqualified silicon wafer, reworking of the silicon wafer is not performed any more, and useless reworking can be avoided; when the scratch depth of the silicon wafer is smaller, for example, smaller than a third value, the silicon wafer is directly polished on one side, so that the influence on the thickness of the silicon wafer caused by double-sided polishing on the silicon wafer is avoided; when the scratch depth of the silicon wafer is larger than the second value and smaller than or equal to the first value, the silicon wafer is polished on both sides, so that different types of reworks can be accurately selected through the scratch depth of the silicon wafer
The polishing and cleaning times of the silicon wafer are reduced, and the problem of flatness 5 caused by the repeated polishing of the silicon wafer and abnormal silicon wafer particles caused by the repeated cleaning are avoided; the yield of the silicon wafer is improved, and the productivity waste caused by multiple useless reworking is avoided.
In some embodiments, after the reworking double sided polishing of the silicon wafer, the method further comprises:
The reworked single-sided polishing of the silicon wafer has less single-sided polishing removal amount and better improves the bad particle class.
In some embodiments, after the reworking single sided polishing of the silicon wafer, the method further comprises: and 0, cleaning the silicon wafer. In this embodiment, the silicon wafer may be cleaned by a cleaning apparatus,
Removing impurities such as particles attached to the surface of the silicon wafer.
In some embodiments, after the cleaning the silicon wafer, the method further comprises:
performing flatness inspection and thickness inspection on the silicon wafer;
Returning the scratch checking step to the silicon wafer qualified in flatness checking and thickness checking; and 5, judging the silicon wafer with unqualified flatness inspection and thickness inspection as scrap.
In the embodiment, after the silicon wafer is cleaned, the flatness inspection and the thickness inspection are performed on the silicon wafer again, so that the silicon wafer with unqualified flatness inspection and thickness inspection can be prevented from flowing into a subsequent process; and (3) checking whether the surface of the silicon wafer is scratched or not again for the silicon wafer with qualified flatness check and thickness check, so that if the surface of the silicon wafer is scratched, the silicon wafer can be treated again to remove the scratches.
0 In a specific example, as shown in fig. 2, the processing of the silicon wafer includes the following steps:
Step 1: after processing, finishing the qualified silicon wafer of flatness inspection, checking whether the surface of the silicon wafer is scratched, and judging the silicon wafer without the scratch as the qualified silicon wafer; the scratched silicon chip needs to be subjected to subsequent treatment;
Step 2: measuring the scratch depth of a silicon wafer with scratches on the surface, and judging the silicon wafer as a disqualified silicon wafer if the scratch 5 depth of the silicon wafer is larger than a first value; if the scratch depth of the silicon wafer is larger than a second value and smaller than or equal to the first value, reworking and double-side polishing are performed on the silicon wafer; if the scratch depth of the silicon wafer is larger than a third value and smaller than or equal to the second value, reworking the silicon wafer to polish the single surface;
step 3: the reworked double-sided polished silicon wafer is subjected to single-sided final polishing, and then cleaning equipment is used for cleaning the silicon wafer; directly cleaning the reworked silicon wafer subjected to single-sided polishing by using cleaning equipment;
step 4: measuring whether the flatness and the thickness of the reworked silicon wafer meet the requirements by using flatness measuring equipment, if the thickness and the flatness do not meet the requirements, judging that the silicon wafer is a scrapped product, and re-carrying out scratch inspection on the silicon wafer if the thickness and the flatness meet the requirements;
Step 5: the reworked silicon wafer is subjected to scratch inspection, whether the surface of the silicon wafer is scratched or not is checked, and the silicon wafer without the scratch is judged to be qualified; the scratched silicon wafer needs to be subjected to subsequent treatment.
According to the embodiment, different types of reworking modes are accurately selected according to the scratch depth of the silicon wafer, so that the polishing and cleaning times of the silicon wafer are reduced, and the problem of flatness caused by repeated polishing of the silicon wafer and abnormal silicon wafer particles caused by repeated cleaning are avoided; the yield of the silicon wafer is improved, and the productivity waste caused by multiple useless reworking is avoided.
The embodiment of the invention also provides a silicon wafer processing device, as shown in fig. 3, comprising:
the scratch checking module 21 is used for performing scratch checking on the silicon wafer with qualified flatness checking and judging whether the silicon wafer is scratched or not;
a scratch depth acquisition module 22, configured to acquire a scratch depth of the silicon wafer if the silicon wafer is scratched;
The processing module 23 is configured to determine a processing manner of the silicon wafer according to a scratch depth of the silicon wafer, where the processing manner includes any one of the following: and (5) reworking double-sided polishing, reworking single-sided polishing, and judging that the silicon wafer is unqualified.
In the embodiment, the silicon wafer with qualified flatness inspection is subjected to scratch inspection, whether the silicon wafer is scratched or not is judged, if the silicon wafer is scratched, the processing mode of the silicon wafer is determined according to the scratch depth of the silicon wafer, so that different types of reworking modes can be accurately selected through the scratch depth of the silicon wafer, useless reworking can be effectively reduced, and the reworking efficiency is improved; in addition, because useless reworking is avoided, the potential risk caused by multiple reworking can be reduced, and the silicon wafer yield is improved.
In this embodiment, the Scratch depth of the silicon wafer can be obtained through the Scratch detection device (the Scratch depth can be measured through the 3D measurement microscope, and the precision can reach nm level), the silicon wafer is polished on one side through the single-side polishing device, and the silicon wafer is polished on both sides through the double-side polishing device.
In some embodiments, the processing module 23 is specifically configured to:
When the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer as a disqualified silicon wafer;
When the scratch depth of the silicon wafer is larger than a second value and smaller than or equal to the first value, reworking and double-side polishing are performed on the silicon wafer;
and when the scratch depth of the silicon wafer is larger than a third value and smaller than or equal to the second value, reworking the silicon wafer to polish the single surface.
In some embodiments, the first value may be 3-5 μm, the second value may be 100-200nm, and the third value may be 0.
In the embodiment, when the scratch depth of the silicon wafer is relatively large, for example, the scratch depth is larger than a first value, the silicon wafer is directly judged to be an unqualified silicon wafer, reworking of the silicon wafer is not performed any more, and useless reworking can be avoided; when the scratch depth of the silicon wafer is smaller, for example, smaller than a third value, the silicon wafer is directly polished on one side, so that the influence on the thickness of the silicon wafer caused by double-sided polishing on the silicon wafer is avoided; when the scratch depth of the silicon wafer is larger than the second value and smaller than or equal to the first value, double-sided polishing is carried out on the silicon wafer, so that different types of reworking modes are accurately selected through the scratch depth of the silicon wafer, the polishing and cleaning times of the silicon wafer are reduced, and the flatness problem caused by repeated polishing of the silicon wafer and abnormal silicon wafer particles caused by repeated cleaning are avoided; the yield of the silicon wafer is improved, and the productivity waste caused by multiple useless reworking is avoided.
In some embodiments, the processing module 23 is further configured to rework a single-sided polishing of the silicon wafer after the reworking of the double-sided polishing of the silicon wafer, with less removal of the single-sided polishing and better improvement of the particle defects.
In some embodiments, the apparatus further comprises:
And the cleaning module is used for cleaning the silicon wafer after reworking and single-sided polishing of the silicon wafer. In this embodiment, the cleaning device may be used to clean the silicon wafer, to remove impurities such as particles attached to the surface of the silicon wafer.
In some embodiments, the apparatus further comprises:
The flatness and thickness checking module is used for checking the flatness and the thickness of the silicon wafer; and turning to the scratch inspection module for processing the silicon wafers with qualified flatness inspection and thickness inspection, and judging the silicon wafers with unqualified flatness inspection and thickness inspection as scrap.
In the embodiment, after the silicon wafer is cleaned, the flatness inspection and the thickness inspection are performed on the silicon wafer again, so that the silicon wafer with unqualified flatness inspection and thickness inspection can be prevented from flowing into a subsequent process; and (3) checking whether the surface of the silicon wafer is scratched or not again for the silicon wafer with qualified flatness check and thickness check, so that if the surface of the silicon wafer is scratched, the silicon wafer can be treated again to remove the scratches.
In this specification, all embodiments are described in a progressive manner, and identical and similar parts of the embodiments are all referred to each other, and each embodiment is mainly described in a different way from other embodiments. In particular, for the embodiments, since they are substantially similar to the product embodiments, the description is relatively simple, and the relevant points are found in the section of the product embodiments.
Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, it can be "directly on" or "under" the other element or intervening elements may be present.
In the description of the above embodiments, particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it is intended to cover the scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.
Claims (8)
1. A method of processing a silicon wafer, comprising:
a scratch checking step, namely performing scratch checking on the silicon wafer with qualified flatness checking, and judging whether the silicon wafer is scratched or not;
A scratch depth obtaining step, namely obtaining the scratch depth of the silicon wafer if the silicon wafer is scratched;
a processing step of determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: reworking double-sided polishing, reworking single-sided polishing, and judging as a defective silicon wafer;
The processing steps comprise:
When the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer as a disqualified silicon wafer;
when the scratch depth of the silicon wafer is larger than a second value and smaller than or equal to the first value, reworking and double-side polishing the silicon wafer;
And when the scratch depth of the silicon wafer is larger than a third value and smaller than or equal to the second value, reworking the silicon wafer to polish the single surface.
2. The method of processing silicon wafers according to claim 1, wherein after said reworking double side polishing of said silicon wafers, said method further comprises:
And reworking and single-sided polishing the silicon wafer.
3. The method of processing a silicon wafer according to claim 1 or 2, wherein after the reworking single-sided polishing of the silicon wafer, the method further comprises:
and cleaning the silicon wafer.
4. A method of processing a silicon wafer according to claim 3, wherein after said cleaning of said silicon wafer, said method further comprises:
performing flatness inspection and thickness inspection on the silicon wafer;
returning the scratch checking step to the silicon wafer qualified in flatness checking and thickness checking;
And judging the silicon wafer with unqualified flatness inspection and thickness inspection as scrap.
5. A silicon wafer processing apparatus, comprising:
The scratch checking module is used for carrying out scratch checking on the silicon wafer with qualified flatness checking and judging whether the silicon wafer is scratched or not;
the scratch depth acquisition module is used for acquiring the scratch depth of the silicon wafer if the silicon wafer is scratched;
the processing module is used for determining a processing mode of the silicon wafer according to the scratch depth of the silicon wafer, wherein the processing mode comprises any one of the following steps: reworking double-sided polishing, reworking single-sided polishing, and judging as a defective silicon wafer;
The processing module is specifically configured to:
When the scratch depth of the silicon wafer is larger than a first value, judging the silicon wafer as a disqualified silicon wafer;
When the scratch depth of the silicon wafer is larger than a second value and smaller than or equal to the first value, reworking and double-side polishing are performed on the silicon wafer;
and when the scratch depth of the silicon wafer is larger than a third value and smaller than or equal to the second value, reworking the silicon wafer to polish the single surface.
6. A silicon wafer processing apparatus according to claim 5, wherein,
The processing module is also used for reworking and polishing the single surface of the silicon wafer after reworking and polishing the double surface of the silicon wafer.
7. The silicon wafer processing apparatus according to claim 5 or 6, further comprising:
And the cleaning module is used for cleaning the silicon wafer after reworking and single-sided polishing of the silicon wafer.
8. The silicon wafer processing apparatus of claim 7, further comprising:
The flatness and thickness checking module is used for checking the flatness and the thickness of the silicon wafer; and turning to the scratch inspection module for processing the silicon wafers with qualified flatness inspection and thickness inspection, and judging the silicon wafers with unqualified flatness inspection and thickness inspection as scrap.
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| CN202211597468.4A CN115816261B (en) | 2022-12-12 | 2022-12-12 | Silicon wafer processing method and device |
| TW112105540A TWI849746B (en) | 2022-12-12 | 2023-02-16 | Silicon wafer processing method and device |
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| CN202211597468.4A CN115816261B (en) | 2022-12-12 | 2022-12-12 | Silicon wafer processing method and device |
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| US6012966A (en) * | 1996-05-10 | 2000-01-11 | Canon Kabushiki Kaisha | Precision polishing apparatus with detecting means |
| JP2000084811A (en) * | 1998-09-16 | 2000-03-28 | Tokyo Seimitsu Co Ltd | Wafer chamfering device |
| DE10012840C2 (en) * | 2000-03-16 | 2001-08-02 | Wacker Siltronic Halbleitermat | Process for the production of a large number of polished semiconductor wafers |
| JP2003260641A (en) * | 2002-03-04 | 2003-09-16 | Sumitomo Electric Ind Ltd | Wafer machining method |
| DE102005034120B4 (en) * | 2005-07-21 | 2013-02-07 | Siltronic Ag | Method for producing a semiconductor wafer |
| JP5975654B2 (en) * | 2011-01-27 | 2016-08-23 | Hoya株式会社 | Manufacturing method of glass substrate for magnetic disk and manufacturing method of magnetic disk |
| JP5807580B2 (en) * | 2012-02-15 | 2015-11-10 | 信越半導体株式会社 | Polishing head and polishing apparatus |
| JP5888280B2 (en) * | 2013-04-18 | 2016-03-16 | 信越半導体株式会社 | Silicon wafer polishing method and epitaxial wafer manufacturing method |
| JP2015185571A (en) * | 2014-03-20 | 2015-10-22 | 株式会社荏原製作所 | Polishing device for semiconductor wafer, and polishing method using the same |
| KR20150143151A (en) * | 2014-06-13 | 2015-12-23 | 삼성전자주식회사 | Method for polishing substrate |
| US10565701B2 (en) * | 2015-11-16 | 2020-02-18 | Applied Materials, Inc. | Color imaging for CMP monitoring |
| CN110800085B (en) * | 2017-10-17 | 2023-08-15 | 胜高股份有限公司 | Polishing method for silicon wafer |
| CN108453568A (en) * | 2018-05-08 | 2018-08-28 | 湖南工学院 | A kind of planar optical elements grinding processing method |
| CN108818161B (en) * | 2018-07-24 | 2020-08-04 | 上海新昇半导体科技有限公司 | Silicon wafer reworking system and method |
| KR20210154278A (en) * | 2020-06-11 | 2021-12-21 | 삼성디스플레이 주식회사 | Glass article, display device including the glass article, and method of manufacturing for the glass article |
| TWI790591B (en) * | 2021-04-12 | 2023-01-21 | 環球晶圓股份有限公司 | Wafer processing system and rework method thereof |
| CN114695643B (en) * | 2022-06-02 | 2022-09-06 | 天通控股股份有限公司 | Reworking method for poor back of lithium niobate single-side polished wafer |
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| TW202330166A (en) | 2023-08-01 |
| CN115816261A (en) | 2023-03-21 |
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