CN115762372A - Driving signal detection method, device and display device - Google Patents

Abstract

The present application provides a driving signal detection method, device and display device. The driving signal detection method includes: receiving a driving signal and a target characteristic value, wherein the driving signal is an analog signal; converting the driving signal based on a voltage value of a preset reference voltage signal It is a high/low level signal; perform analog-to-digital conversion on the high/low level signal to obtain the corresponding digital driving signal; detect the characteristic value of the digital driving signal to obtain the measured characteristic value; where the measured characteristic value includes the measured At least one of the period, the measured duty cycle and the measured phase; the measured characteristic value of the digital drive signal is compared with the target characteristic value, and the corresponding comparison result is output to indicate the difference between the measured characteristic value and the target characteristic value difference. The method provided by the present application can automatically complete the detection and comparison of the characteristic values of the driving signals, and the detection efficiency is high.

Description

Driving signal detection method, device and display device

technical field

The present application relates to the field of display panels, in particular to a driving signal detection method, device and display device.

Background technique

At present, an LCD (Liquid Crystal Display, liquid crystal display) is a mainstream display widely used in various industries, and the LCD display has advantages such as thin shape and light weight.

In order to reduce the production cost, the existing liquid crystal display panel usually adopts GDL (Gate Driver less, less gate drive) circuit drive technology, that is, the gate drive circuit of the horizontal scanning line is fabricated on the display panel through the original array process. The periphery of the display area is used to replace an external integrated circuit board (Integrated Circuit, IC) to drive the horizontal scanning line. This type of display panel has a large number of input signals, for example, including frame start signal STV, clock signal CK, low-frequency signal LC and other pulse waveform signals. During the debugging process, engineers need to check whether the debug signal waveform meets the debugging requirements. In the prior art, an oscilloscope is usually used to display the waveform of the signal, and then the engineer judges whether the waveform of the signal meets the requirements by visual inspection. This inspection method is time-consuming, laborious and inefficient.

Contents of the invention

In view of this, the main purpose of this application is to propose a driving signal detection method, device and display device, aiming to solve the problems of time-consuming, labor-intensive and low-efficiency problems of the existing driving signal waveform detection method.

The present application proposes a driving signal detection method. The driving signal detection method includes: receiving a driving signal and a target characteristic value, wherein the driving signal is an analog signal; Converting to a high/low level signal; performing analog-to-digital conversion on the high/low level signal to obtain a corresponding digital drive signal; detecting the eigenvalue of the digital drive signal to obtain an actual measured eigenvalue; wherein, The measured characteristic value includes at least one of the measured period, the measured duty cycle and the measured phase, and the target characteristic value correspondingly includes at least one of the target period, the target duty cycle and the target phase; and, the digital The measured characteristic value of the type driving signal is compared with the target characteristic value, and a corresponding comparison result is output to indicate the difference between the measured characteristic value and the target characteristic value.

The detection method of the drive signal provided by the application is obtained by converting the drive signal into a high/low level signal, then converting the high/low level signal into a digital drive signal, and detecting the characteristic value of the digital drive signal. Measured eigenvalues, and compare the measured eigenvalues of the digital drive signal with the target eigenvalues and output the corresponding comparison results, which can automatically complete the detection and comparison of the drive signal eigenvalues, and the detection efficiency high. In addition, before the analog-to-digital conversion of the driving signal, the driving signal is first converted into a high/low level signal, that is, the analog signal is converted into a standard square wave signal, so that the burr and jitter in the analog signal can be removed. The impact of the results, the detection results are more accurate.

Optionally, the digital driving signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital driving signal includes a measured period. The detecting the eigenvalue of the digital drive signal to obtain the measured eigenvalue includes: judging whether there is an m-bit cyclic data segment whose number of cycles reaches a preset number of times in the digital drive signal; wherein, the m-bit The cyclic data segment includes m-bit binary data continuously arranged in the digital drive signal; if it is determined that there is an m-bit cyclic data segment in the digital drive signal whose number of cycles reaches a preset number of times, then according to the m-bit cyclic data The number of bits m of the segment determines the measured cycle of the digital drive signal; and, if it is determined that there is no m-bit cycle data segment whose number of cycles reaches the preset number of times in the digital drive signal, m=m+1 is taken, And return to the determination of whether there is an m-bit cycle data segment whose cycle number reaches the preset number in the digital drive signal; wherein, the initial value of m is 2.

Optionally, the target feature value includes a target period. The comparing the measured eigenvalue of the digital drive signal with the target eigenvalue, and outputting a corresponding comparison result to indicate the difference between the measured eigenvalue and the target eigenvalue includes: Judging whether the difference between the measured period of the digital drive signal and its corresponding target period is less than or equal to the preset period error threshold; if it is determined that the difference between the measured period of the digital drive signal and its corresponding target period is less than or equal to The preset period error threshold, then output a first indication signal to indicate that the measured period of the driving signal meets the requirements; and if it is determined that the difference between the measured period of the digital driving signal and its corresponding target period is greater than the If the period error threshold is preset, a second indication signal is output to indicate that the measured period of the driving signal does not meet the requirements.

Optionally, the measured characteristic value of the digital driving signal further includes a measured duty cycle. The step of detecting the characteristic value of the digital driving signal to obtain the measured characteristic value also includes: if it is determined that there is an m-bit cyclic data segment in the digital driving signal whose number of cycles reaches a preset number of times, the m-bit The accumulated number of bits with a value of 1 in the cyclic data segment is divided by the number of bits m to obtain the measured duty cycle of the digital driving signal.

Optionally, the target characteristic value further includes a target duty cycle. The comparing the measured eigenvalue of the digital drive signal with the target eigenvalue, and outputting a corresponding comparison result to indicate the difference between the measured eigenvalue and the target eigenvalue includes: judging whether the difference between the measured duty cycle of the digital drive signal and its corresponding target duty cycle is less than or equal to the preset duty cycle error threshold; if it is determined that the measured duty cycle of the digital drive signal and its corresponding The difference of the target duty cycle is less than or equal to the preset duty cycle error threshold, outputting a third indication signal to indicate that the measured duty cycle of the driving signal meets the requirements; and, if it is determined that the digital driving signal If the difference between the measured duty cycle and the corresponding target duty cycle is greater than the preset duty cycle error threshold, a fourth indication signal is output to indicate that the measured duty cycle of the driving signal does not meet the requirements.

Optionally, the driving signal is used to drive the display panel, and the driving signal includes a frame start signal, N clock signals and at least one of two low-frequency signals; wherein, N≥1.

Optionally, the driving signal includes a frame start signal and N clock signals, the digital driving signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital driving signal includes a measured phase. The detecting the eigenvalue of the digital drive signal to obtain the measured eigenvalue includes: determining the moment corresponding to the first data bit whose value is 1 in the digital frame start signal corresponding to the frame start signal is the starting moment; and, the time length corresponding to the first data bit with a value of 1 in the digital clock signal corresponding to each clock signal and the starting moment is determined as the measured phase of each clock signal.

Optionally, the target characteristic value includes a target phase, and each clock signal corresponds to a target phase. The comparing the measured eigenvalue of the digital drive signal with the target eigenvalue, and outputting a corresponding comparison result to indicate the difference between the measured eigenvalue and the target eigenvalue includes: For each clock signal: determine whether the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to the preset phase error threshold; if it is determined that the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to the preset phase error threshold, then output a fifth indication signal to indicate that the measured phase of the drive signal meets the requirements; and if it is determined that the difference between the measured phase of the clock signal and its corresponding target phase is greater than the If the phase error threshold is preset, a sixth indication signal is output to indicate that the measured phase of the driving signal does not meet the requirements.

The present application also provides a drive signal detection device, which includes: a processing unit and several signal conversion units. Wherein, each signal conversion unit is used to receive a driving signal, and convert the driving signal into a high/low level signal based on the voltage value of the preset reference voltage signal, and perform analog on the high/low level signal The digital conversion is obtained and the corresponding digital drive signal is output. The processing unit is electrically connected to the several signal conversion units respectively, and the processing unit is used to receive the target eigenvalue corresponding to each drive signal and the digital drive signal output by the several signal conversion units, and to each Detecting the eigenvalues of the digital drive signal to obtain the corresponding measured eigenvalues, and comparing the measured eigenvalues of the digital drive signals with the corresponding target eigenvalues, and outputting corresponding comparison results to indicate the measured The difference between the eigenvalue and the corresponding target eigenvalue; the measured eigenvalue of each digital drive signal includes at least one of the measured period, the measured duty cycle and the measured phase, and the target eigenvalue of the digital drive signal is corresponding includes at least one of a target period, a target duty cycle, and a target phase.

The present application also provides a display device, which includes a display panel, a timing control unit, a signal optimization component, and the above-mentioned drive signal detection device. Wherein, the timing control unit is electrically connected to the driving signal detection device and the signal optimization component, and the signal optimization component is also electrically connected to the display panel. The drive signal detection device is used to calculate the difference between the measured eigenvalue of the digital drive signal and the target eigenvalue when detecting a difference between the measured eigenvalue and the target eigenvalue of the digital drive signal The value is fed back to the timing control unit; the timing control unit is used to output the difference value and its corresponding drive signal to the signal optimization component; the signal optimization component is used to optimize the signal according to the difference value The driving signal is compensated and optimized to obtain an optimized driving signal, and the optimized driving signal is output to the display panel.

Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.

Description of drawings

FIG. 1 is a timing waveform diagram of a driving signal provided by an embodiment of the present application.

FIG. 2 is a schematic structural diagram of a driving signal detection device provided by an embodiment of the present application.

FIG. 3 is a schematic diagram of a circuit structure of a signal converting unit provided by an embodiment of the present application.

FIG. 4 is a schematic flowchart of a method for detecting a driving signal provided by an embodiment of the present application.

FIG. 5 is a first detailed flowchart of step 640 and step 650 in FIG. 4 .

FIG. 6 is a second detailed flowchart of step 640 and step 650 in FIG. 4 .

FIG. 7 is a third detailed flowchart of step 640 and step 650 in FIG. 4 .

FIG. 8 is a schematic structural diagram of a display device provided by an embodiment of the present application.

Description of main component symbols:

display device 1

Drive signal detection device 10

Signal Conversion Unit 100

Processing unit 200

Human-computer interaction unit 300

Sequential control unit 20

Signal Optimization Components 30

display panel 40

Comparator U1

Analog-to-digital conversion unit 120

Crystal module SJT

Analog-to-Digital Converter 121

Steps 610~650, 641~646, 651~659

The following specific embodiments will further illustrate the present application in conjunction with the above-mentioned drawings.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

In the description of the present application, it should be noted that the terms "first", "second" and the like are used for description purposes only, and should not be understood as indicating or implying relative importance.

A GOA (Gate driver on array, gate driver on an array substrate) type display panel usually includes a timing control unit and a GDL (Gate Driver less, less gate driver) unit. The GDL units are arranged on both sides of the display panel, and the timing control unit is used to output driving signals to each GDL unit, so that each GDL unit turns on the scanning lines in the display panel row by row, thereby driving the display panel for display.

As shown in Figure 1, the driving signals output by the timing control unit include frame start signal (Start Vertical, STV), clock signals CK1~CKN, low-frequency signal LC1, low-frequency signal LC2, etc. During the debugging process of the display panel, engineers It is necessary to check whether the debugged signal waveform meets the debugging requirements. In the existing technology, an oscilloscope is usually used to display the waveform of the driving signal, and then the engineer judges whether the waveform of the driving signal meets the requirements through eye observation, that is, checks whether the characteristic values such as the period, duty cycle, and phase of the driving signal meet the requirements. This inspection method is time-consuming, laborious and inefficient.

Please refer to FIG. 2-FIG. 3 together, in order to solve the problems of time-consuming, labor-intensive and low-efficiency in the existing driving signal waveform detection method. A drive signal detection device 10 provided in the embodiment of the present application. The driving signal detection device 10 is used to detect whether the characteristic value of the signal meets requirements, for example, it can detect the driving signal output by the timing control unit 20 . Specifically, the driving signal detection device 10 includes several signal conversion units 100 , a processing unit 200 and a human-computer interaction unit 300 .

Wherein, each signal conversion unit 100 is used for receiving a driving signal, and converting the driving signal into a high/low level signal based on the voltage value of the preset reference voltage signal, and performing a process on the high/low level signal Analog-to-digital conversion obtains and outputs corresponding digital drive signals. The driving signal includes at least one of a frame start signal, N clock signals and two low-frequency signals, wherein N≧1.

Specifically, as shown in FIG. 3 , each signal conversion unit 100 includes a comparator U1 and an analog-to-digital conversion unit 120 .

Wherein, the non-inverting input terminal of the comparator U1 is used to receive a driving signal, and the inverting input terminal of the comparator U1 is used to receive the preset reference voltage signal, for example, electrically connected to the ground terminal GND through a resistor , at this time, the voltage value of the preset reference voltage signal is zero. The positive power terminal of the comparator U1 is used to receive high level VDD, and the positive power terminal of the comparator U1 is used to receive low level VGND. The comparator is used to compare the voltage value of the driving signal with the voltage value of the preset reference voltage signal to obtain and output a high/low level signal. It can be understood that the driving signal is an analog signal, and the waveform may have glitches and jitters, that is, it is not a standard square wave signal. If the analog signal is directly converted from analog to digital to obtain a digital signal, the digital signal will also be irregular. In this way, the detection error of the eigenvalue will be large, and even the eigenvalue cannot be detected. After the comparator U1 compares the driving signal with the preset reference voltage signal, the high/low level signal output is a signal composed of high level VDD and low level VGND, that is, a standard For the square wave signal, obviously, when the characteristic value of the standard square wave signal is detected, the detection effect is more accurate.

The analog-to-digital conversion unit 120 is electrically connected to the output terminal of the comparator U1, and the analog-to-digital conversion unit 120 is used to perform analog-to-digital conversion on the high/low level signal output by the comparator U1 and output a corresponding digital drive signal. Specifically, the analog-to-digital conversion unit 120 includes a crystal oscillator module SJT and an analog-to-digital converter 121 . Wherein, the crystal oscillator module SJT is used to generate the pulse signal CLK and output it to the analog-to-digital converter 121, the sampling frequency of the analog-to-digital converter 121 is the frequency of the pulse signal CLK, in order to ensure the drive signal characteristic value To ensure the accuracy of the detection results, the frequency of the pulse signal CLK is preferably more than 10 times the frequency of the signal to be detected, for example, the clock signals CK1 - CKN . Wherein, the digital driving signal is a binary sequence arranged in time sequence.

The processing unit 200 is electrically connected to the plurality of signal conversion units 100 and the human-computer interaction unit 300 respectively, and the processing unit 200 is used to receive the target characteristics corresponding to each driving signal output by the human-computer interaction unit 300 value and the digital driving signals output by the several signal conversion units 100, and detect the characteristic value of each digital driving signal to obtain the corresponding measured characteristic value, and compare the measured characteristic value of the digital driving signal with the The corresponding target feature values are compared, and a corresponding comparison result is output to the human-computer interaction unit 300 to indicate the difference between the measured feature value and the corresponding target feature value. Wherein, the measured characteristic value of each digital driving signal includes at least one of the measured period, the measured duty ratio and the measured phase, and the target characteristic value of the digital driving signal correspondingly includes the target period, the target duty ratio and the target at least one of the phases.

The human-computer interaction unit 300 includes an input unit and an output unit. Wherein, the output unit is configured to receive target characteristic values (for example, target period, target duty cycle and target phase of each clock signal) corresponding to each driving signal input by the user and output to the processing unit 200 . The output unit is configured to receive the comparison result output by the processing unit 200, so as to show the difference between the measured characteristic value and the corresponding target characteristic value of each driving signal to the user. Exemplarily, the input unit may include, but not limited to, one or more of a touch panel, a physical keyboard, function keys, a trackball, a mouse, and a joystick. The output unit may include but not limited to one or more of a touch panel, a display, a sound box, and the like.

Please refer to FIG. 4 , based on the same inventive concept, the embodiment of the present application also provides a driving signal detection method, which can be applied to the above-mentioned driving signal detection device 10, and the driving signal detection method specifically includes The following steps:

Step 610, receiving a driving signal and a target characteristic value. Wherein, the driving signal is an analog signal.

Step 620, converting the driving signal into a high/low level signal based on the voltage value of the preset reference voltage signal.

Step 630, performing analog-to-digital conversion on the high/low level signal to obtain a corresponding digital driving signal.

Step 640: Detect the characteristic value of the digital driving signal to obtain the measured characteristic value. Wherein, the measured characteristic value includes at least one of the measured period, the measured duty cycle and the measured phase, and the target characteristic value correspondingly includes at least one of the target period, the target duty cycle and the target phase.

Step 650: Compare the measured characteristic value of the digital driving signal with the target characteristic value, and output a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value.

Please refer to FIG. 5 . FIG. 5 is a first detailed flowchart of step 640 and step 650 in FIG. 4 . Wherein, steps 641 to 643 in FIG. 5 are the refinement process of step 640 in FIG. 4 , and steps 651 to 653 in FIG. 5 are the refinement process of step 650 in FIG. 4 .

Step 641 , judging whether there is an m-bit cyclic data segment whose cyclic number reaches a preset number in the digital driving signal. Wherein, the m-bit cyclic data segment includes m-bit binary data arranged continuously in the digital driving signal. Among them, the initial value of m is 2. If it is determined that there are m-bit cyclic data segments whose cyclic times reach a preset number of times (for example, 100 times) in the digital drive signal, then step 642 is executed; otherwise, step 643 is executed. Exemplarily, taking the drive signal as the clock signal Ck1 in FIG. 1 as an example, assume that the voltage value of the high-level VDD in the high/low-level signal is 1, and the voltage value of the low-level VGND is 0. , the digital driving signal corresponding to the clock signal Ck1 is 00000001111100000 . . . 1111100000 .

Step 642: Determine the measured period of the digital driving signal according to the number m of the m-bit cyclic data segment. Specifically, the measured period of the digital drive signal can be determined according to the sampling period of the analog-to-digital converter and the number of bits m of the cyclic data segment. For example, assuming that the sampling period of the analog-to-digital converter is 1 ms, then the clock The measured period T1 of the signal Ck1=10×1 ms=10 ms.

Step 643, set m=m+1, and return to step 641, judge again whether there is an m-bit cyclic data segment whose cyclic number reaches a preset number of times in the digital drive signal. It can be understood that, in the embodiment of the present application, 2 is used as the initial value of m, that is, it is sequentially judged whether there are 2-bit cyclic data segments and 3-bit cyclic data segments in the digital drive signal whose number of cycles reaches the preset number of times , 4-bit cyclic data segment..., until it is determined that there is an m-bit cyclic data segment whose number of cycles reaches a preset number of times in the digital drive signal, step 643 is not executed again.

Step 651 , judging whether the difference between the measured period of the digital driving signal and its corresponding target period is less than or equal to a preset period error threshold. If it is determined that the difference between the measured period of the digital driving signal and its corresponding target period is less than or equal to the preset period error threshold, step 652 is performed; otherwise, step 653 is performed. Wherein, the preset period error threshold is determined according to the detection accuracy of the drive signal detection device 10 .

Step 652, outputting a first indication signal. Wherein, the first indication signal is used to indicate that the measured period of the driving signal meets requirements.

Step 653, outputting a second indication signal. Wherein, the second indication signal is used to indicate that the measured period of the driving signal does not meet requirements. Optionally, the second indication signal may also include a measured period value of the driving signal, so that the engineer adjusts the period of the driving signal accordingly according to the measured period value.

Please refer to FIG. 6 . FIG. 6 is a second detailed flowchart of step 640 and step 650 in FIG. 4 . Wherein, step 641 , step 643 and step 644 in FIG. 6 are the detailed flow of step 640 in FIG. 4 , and steps 654 to 656 in FIG. 6 are the detailed flow of step 650 in FIG. 4 .

Step 641 , judging whether there is an m-bit cyclic data segment whose cyclic number reaches a preset number in the digital driving signal. Wherein, the m-bit cyclic data segment includes m-bit binary data arranged continuously in the digital driving signal. Among them, the initial value of m is 2. If it is determined that there is an m-bit cyclic data segment whose cyclic count reaches a preset number of times in the digital driving signal, then step 642 is executed; otherwise, step 643 is executed.

Step 644: Divide the cumulative number of bits with a value of 1 in the m-bit cyclic data segment by the number of bits m to obtain the measured duty cycle of the digital driving signal. Exemplarily, taking the drive signal as the clock signal Ck1 in FIG. 1 as an example, assume that the voltage value of the high-level VDD in the high/low-level signal is 1, and the voltage value of the low-level VGND is 0. , the sampling period of the analog-to-digital converter is 1 ms, and the digital drive signal corresponding to the clock signal Ck1 is 00000001111100000...1111100000...1111100000..., then, the cycle data segment is 1111100000, that is, m=10, and the clock signal Ck1 The measured period T1=10×1ms=10ms, the number of digits of 1 in the cyclic data segment 1111100000 is 5, that is, d1=10×1ms=10ms, so the measured duty cycle of the clock signal Ck1=50%.

Step 643, set m=m+1, and return to step 641, judge again whether there is an m-bit cyclic data segment whose cyclic number reaches a preset number of times in the digital drive signal.

Step 654 , judging whether the difference between the measured duty cycle of the digital driving signal and its corresponding target duty cycle is less than or equal to a preset duty cycle error threshold. If it is determined that the difference between the measured duty cycle of the digital driving signal and its corresponding target duty cycle is less than or equal to the preset duty cycle error threshold, step 655 is performed; otherwise, step 656 is performed. Wherein, the preset duty ratio error threshold is determined according to the detection accuracy of the driving signal detection device 10 .

Step 655, output a third indication signal. Wherein, the third indication signal is used to indicate that the measured duty ratio of the driving signal meets requirements.

Step 656, output a fourth indication signal. Wherein, the fourth indication signal is used to indicate that the measured duty ratio of the driving signal does not meet requirements. Optionally, the fourth indication signal may also include a measured duty ratio value of the driving signal, so that the engineer adjusts the duty ratio of the driving signal accordingly according to the measured duty ratio value.

Please refer to FIG. 7 . FIG. 7 is a third detailed flowchart of step 640 and step 650 in FIG. 4 . Wherein, steps 645 to 646 in FIG. 7 are the refinement process of step 640 in FIG. 4 , and steps 657 to 659 in FIG. 7 are the refinement process of step 650 in FIG. 4 . In this embodiment, the driving signal includes a frame start signal and N clock signals.

Step 645: Determine the time corresponding to the first data bit whose value is 1 in the digital frame start signal corresponding to the frame start signal as the start time.

Step 646: Determine the time length between the time corresponding to the first data bit with a value of 1 and the start time in the digital clock signal corresponding to each clock signal as the measured phase of each clock signal. As shown in FIG. 1 , the measured phase of the clock signal Ck1 is a1.

Step 657: For each clock signal, determine whether the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to a preset phase error threshold. If it is determined that the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to the preset phase error threshold, step 658 is performed; otherwise, step 659 is performed.

Step 658, output a fifth indication signal. Wherein, the fifth indication signal is used to indicate that the measured phase of the driving signal meets requirements.

Step 659, output a sixth indication signal. Wherein, the sixth indication signal is used to indicate that the measured phase of the driving signal does not meet requirements. Optionally, the sixth indication signal may also include a measured phase value of the driving signal, so that the engineer adjusts the phase of the driving signal accordingly according to the measured phase value.

It should be noted that, in other embodiments, the driving signal detection method provided by the present application can detect the frame start signal (Start Vertical, STV), the clock signals CK1-CKN, and the period and occupation of the low-frequency signal LC1 and the low-frequency signal LC2. Two or three eigenvalues of the duty ratio and the phase are detected and compared at the same time, so that the detection of all the driving signals of the display panel can be completed at one time, and the detection efficiency is higher.

The detection method of the drive signal provided by the application is obtained by converting the drive signal into a high/low level signal, then converting the high/low level signal into a digital drive signal, and detecting the characteristic value of the digital drive signal. Measured eigenvalues, and compare the measured eigenvalues of the digital drive signal with the target eigenvalues and output the corresponding comparison results, which can automatically complete the detection and comparison of the drive signal eigenvalues, and the detection efficiency high. In addition, before the analog-to-digital conversion of the driving signal, the driving signal is first converted into a high/low level signal, that is, the analog signal is converted into a standard square wave signal, so that the burr and jitter in the analog signal can be removed. The impact of the results, the detection results are more accurate.

Referring to FIG. 8 , the embodiment of the present application further provides a display device 1 , which includes the above-mentioned driving signal detection device 10 , a timing control unit 20 , a display panel 30 and a display panel 40 .

Wherein, the timing control unit 20 is electrically connected to the driving signal detection device 10 and the signal optimization component 30 , and the signal optimization component 30 is also electrically connected to the display panel 40 . The driving signal detection device 10 is used to detect the measured characteristic value of the digital driving signal corresponding to the driving signal, and detect whether there is a difference between the measured characteristic value and the target characteristic value of the digital driving signal, and detect the When there is a difference between the measured eigenvalue of the digital drive signal and the target eigenvalue, the difference between the measured eigenvalue of the digital drive signal and the target eigenvalue is fed back to the timing control unit 20 . The timing control unit 20 is configured to output the difference value and its corresponding driving signal to the signal optimization component 30 . The signal optimization component 30 is configured to perform compensation and optimization on the driving signal according to the difference value to obtain an optimized driving signal, and output the optimized driving signal to the display panel 40 . Exemplarily, the display panel 40 can also serve as the human-computer interaction unit 300 in the driving signal detection device 10 .

Further, the signal optimization component 30 includes an analog-to-digital converter (not shown in the figure) and a microprocessor (not shown in the figure) electrically connected to each other, and the analog-to-digital converter is electrically connected to the timing control unit 20 , the microprocessor and the analog-to-digital converter of the display panel 40 are used to convert the driving signal into a digital signal and output it to the microprocessor. The microprocessor is used to perform an addition operation on the digital signal and the difference value to obtain a new digital signal, and perform digital-to-analog conversion on the new digital signal to obtain the optimized driving signal and output it to the The display panel 40 is used to drive the display panel 40 to display.

The display device 1 can not only realize the automatic detection of the characteristic value of the driving signal, judge whether the characteristic value of the driving signal meets the requirements, but also can judge the driving signal according to the detection result when the characteristic value of the driving signal does not meet the requirements. Perform automatic optimization and correction, which is more efficient.

Although the embodiments of the present application have been shown and described, those skilled in the art can understand that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principle and spirit of the present application. The scope of the application is defined by the claims and their equivalents.

Claims (10)

1. A driving signal detection method, characterized in that, comprising: receiving a driving signal and a target characteristic value, wherein the driving signal is an analog signal; converting the drive signal into a high/low level signal based on a voltage value of a preset reference voltage signal; Perform analog-to-digital conversion on the high/low level signal to obtain a corresponding digital drive signal; Detecting the characteristic value of the digital drive signal to obtain the measured characteristic value; wherein the measured characteristic value includes at least one of the measured period, the measured duty cycle and the measured phase, and the target characteristic value correspondingly includes the target period , at least one of a target duty cycle and a target phase; and comparing the measured characteristic value of the digital drive signal with the target characteristic value, and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value. 2. The driving signal detection method according to claim 1, wherein the digital driving signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital driving signal comprises a measured period; The detection of the eigenvalues of the digital drive signal to obtain the measured eigenvalues includes: Judging whether there is an m-bit cyclic data segment in the digital drive signal whose number of cycles reaches a preset number of times; wherein, the m-bit cyclic data segment includes m-bit binary data continuously arranged in the digital drive signal; If it is determined that there is an m-bit cyclic data segment whose number of cycles reaches a preset number of times in the digital drive signal, then determine the measured period of the digital drive signal according to the number of bits m of the m-bit cyclic data segment; and If it is determined that there is no m-bit cyclic data segment whose number of cycles reaches the preset number of times in the digital drive signal, m=m+1 is taken, and the method of judging whether there is a number of cycles in the digital drive signal that reaches the preset number of times is returned. An m-bit cyclic data segment of the set number of times; wherein, the initial value of m is 2. 3. driving signal detection method as claimed in claim 2 is characterized in that, described target characteristic value comprises target cycle; The comparing the measured eigenvalue of the digital drive signal with the target eigenvalue, and outputting a corresponding comparison result to indicate the difference between the measured eigenvalue and the target eigenvalue includes: Judging whether the difference between the measured period of the digital drive signal and its corresponding target period is less than or equal to a preset period error threshold; If it is determined that the difference between the measured period of the digital driving signal and its corresponding target period is less than or equal to the preset period error threshold, outputting a first indication signal to indicate that the measured period of the driving signal meets the requirements; and If it is determined that the difference between the measured period of the digital driving signal and its corresponding target period is greater than the preset period error threshold, a second indication signal is output to indicate that the measured period of the driving signal does not meet requirements. 4. driving signal detection method as claimed in claim 2 is characterized in that, the measured characteristic value of described digital driving signal also comprises measured duty ratio; The detecting the eigenvalue of the digital drive signal to obtain the measured eigenvalue also includes: If it is determined that there is an m-bit cyclic data segment whose number of cycles reaches a preset number of times in the digital drive signal, divide the cumulative number of digits with a value of 1 in the m-bit cyclic data segment by the number of digits m to obtain the digital type The measured duty cycle of the drive signal. 5. driving signal detection method as claimed in claim 4 is characterized in that, described target characteristic value also comprises target duty cycle; The comparing the measured eigenvalue of the digital drive signal with the target eigenvalue, and outputting a corresponding comparison result to indicate the difference between the measured eigenvalue and the target eigenvalue includes: judging whether the difference between the measured duty cycle of the digital drive signal and its corresponding target duty cycle is less than or equal to a preset duty cycle error threshold; If it is determined that the difference between the measured duty cycle of the digital drive signal and its corresponding target duty cycle is less than or equal to the preset duty cycle error threshold, a third indication signal is output to indicate the measured value of the drive signal. The duty cycle meets the requirements; and If it is determined that the difference between the measured duty cycle of the digital drive signal and its corresponding target duty cycle is greater than the preset duty cycle error threshold, a fourth indication signal is output to indicate the measured duty cycle of the drive signal than does not meet the requirements. 6. The driving signal detection method according to any one of claims 1-5, wherein the driving signal is used to drive the display panel, and the driving signal includes a frame start signal, N clock signals and two At least one of the low-frequency signals; wherein, N≥1. 7. The driving signal detection method according to claim 6, wherein the driving signal comprises a frame start signal and N clock signals, the digital driving signal is a binary sequence arranged in time sequence, and the digital The measured eigenvalues of the type driving signal include the measured phase; The detection of the eigenvalues of the digital drive signal to obtain the measured eigenvalues includes: Determining the time corresponding to the first data bit with a value of 1 in the digital frame start signal corresponding to the frame start signal as the start time; and The time length between the time corresponding to the first data bit whose value is 1 in the digital clock signal corresponding to each clock signal and the start time is determined as the measured phase of each clock signal. 8. driving signal detection method as claimed in claim 7, is characterized in that, described target eigenvalue comprises target phase, and each clock signal corresponds to a target phase; The comparing the measured eigenvalue of the digital drive signal with the target eigenvalue, and outputting a corresponding comparison result to indicate the difference between the measured eigenvalue and the target eigenvalue includes: For each clock signal: judging whether the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to a preset phase error threshold; If it is determined that the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to the preset phase error threshold, outputting a fifth indication signal to indicate that the measured phase of the drive signal meets requirements; and If it is determined that the difference between the measured phase of the clock signal and its corresponding target phase is greater than the preset phase error threshold, a sixth indication signal is output to indicate that the measured phase of the driving signal does not meet requirements. 9. A driving signal detection device, characterized in that, comprising: Several signal conversion units, each signal conversion unit is used to receive a drive signal, and convert the drive signal into a high/low level signal based on the voltage value of the preset reference voltage signal, and convert the high/low level signal Analog-to-digital conversion of flat signal to obtain and output corresponding digital drive signal; The processing unit is electrically connected to the several signal conversion units respectively, and the processing unit is used to receive the target eigenvalue corresponding to each drive signal and the digital drive signal output by the several signal conversion units, and each digital The characteristic value of the digital driving signal is detected to obtain the corresponding measured characteristic value, and the measured characteristic value of the digital driving signal is compared with the corresponding target characteristic value, and a corresponding comparison result is output to indicate the measured characteristic The difference between the value and the corresponding target eigenvalue; the measured eigenvalue of each digital drive signal includes at least one of the measured period, the measured duty cycle and the measured phase, and the target eigenvalue of the digital drive signal is corresponding Including at least one of a target period, a target duty cycle and a target phase. 10. A display device, comprising a display panel and a timing control unit, characterized in that the display device also includes: The drive signal detection device according to claim 9; and A signal optimization component, the timing control unit is electrically connected to the driving signal detection device and the signal optimization component, and the signal optimization component is also electrically connected to the display panel; The drive signal detecting device is used to calculate the difference between the measured eigenvalue of the digital drive signal and the target eigenvalue when detecting a difference between the measured eigenvalue and the target eigenvalue of the digital drive signal The value is fed back to the timing control unit; the timing control unit is used to output the difference value and its corresponding drive signal to the signal optimization component; the signal optimization component is used to optimize the signal according to the difference value The driving signal is compensated and optimized to obtain an optimized driving signal, and the optimized driving signal is output to the display panel.

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