CN115756066A - Band-gap reference current source - Google Patents
Band-gap reference current source Download PDFInfo
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- CN115756066A CN115756066A CN202211583445.8A CN202211583445A CN115756066A CN 115756066 A CN115756066 A CN 115756066A CN 202211583445 A CN202211583445 A CN 202211583445A CN 115756066 A CN115756066 A CN 115756066A
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Abstract
The invention discloses a band-gap reference current source, comprising: the amplifying circuit comprises a first current mirror and a first NMOS tube; the grid electrode of the first NMOS tube is connected with the second end of the first current mirror, and the drain electrode is the output end of the band-gap reference current source; the current generating circuit comprises a first triode, a second triode, a first resistor, a second resistor, a third resistor and a fourth resistor; a collector of the first triode is connected with the first end of the first current mirror, a base of the first triode is connected with a base of the second triode through the first resistor, and an emitter of the first triode is grounded after passing through the second resistor and the third resistor in sequence; a collector of the second triode is connected with the second end of the first current mirror, a base of the second triode is connected with a source electrode of the first NMOS tube, and an emitter of the second triode is connected between the second resistor and the third resistor; and the source stage of the first NMOS tube is grounded through a fourth resistor. The circuit in the invention has simple structure and can realize a current source irrelevant to temperature.
Description
Technical Field
The invention relates to the technical field of analog integrated circuits, in particular to a band-gap reference current source.
Background
With the rapid development of system integration technology, the reference voltage source has become an indispensable basic circuit module in large-scale, very large-scale integrated circuits and almost all digital analog systems. The reference voltage source is an important component of a very large scale integrated circuit and an electronic system, and can be widely applied to a high-precision comparator, an A/D (analog/digital) converter, a D/A converter, a random dynamic memory, a flash memory and a system integrated chip. The bandgap reference is the most popular of all reference voltages, and its main function is to provide a stable reference voltage or reference current in the integrated circuit, which requires that the bandgap reference is insensitive to variations in supply voltage and variations in temperature.
FIG. 1 is a circuit diagram of a bandgap reference current source in the prior art, in which the total current is
(wherein,
refers to the current flowing through the resistor r1,
is the current, I, flowing through the resistor r3 Aam Is the current, I, of the operational amplifier A Bamp Refers to the current, V, of the operational amplifier B T Is positive temperature coefficient, N is emitter area ratio of transistors q1 and q2, V BE2 Which refers to the voltage between the base and emitter of transistor q 2). In this circuit, in
When taking an appropriate value, V BE2 And
the positive and negative temperature coefficients of the two are mutually offset to obtain a voltage V with zero temperature drift coefficient ref 。
However, the inventors have found that the above-mentioned prior art reference voltage theory ignores the influence of the base current of the current-containing transistor q1 through r 1: this current variability can lead to output voltage errors and drift due to process and temperature effects on hFE, and this effect is particularly severe when the current in q2 is much smaller than the current in q1 to produce the required current density difference.
Disclosure of Invention
Therefore, in order to solve the above problems occurring in the prior art, the present application provides a bandgap reference current source without an operational amplifier, which eliminates the influence of the base current of a transistor on the current source.
The invention provides a band-gap reference current source, which comprises:
the amplifying circuit comprises a first current mirror and a first NMOS tube; the grid electrode of the first NMOS tube is connected with the second end of the first current mirror, and the drain electrode is the output end of the band-gap reference current source;
the current generating circuit comprises a first triode, a second triode, a first resistor, a second resistor, a third resistor and a fourth resistor; a collector of the first triode is connected with the first end of the first current mirror, a base of the first triode is connected with a base of the second triode through the first resistor, and an emitter of the first triode is grounded after passing through the second resistor and the third resistor in sequence; a collector of the second triode is connected with the second end of the first current mirror, a base of the second triode is connected with a source of the first NMOS tube, and an emitter of the second triode is connected between the second resistor and the third resistor; and the source stage of the first NMOS tube is grounded through a fourth resistor.
In one possible implementation, the resistance of the first resistor
Wherein R is 2 Is the resistance value of the second resistor, R 3 Refers to the resistance value, R, of the third resistor 4 Refers to the resistance of the fourth resistor.
In one possible implementation, the bandgap reference current source further includes:
and the first end of the second current mirror is connected with the drain electrode of the first NMOS tube, and the second end of the second current mirror is the output end of the band-gap reference current source.
In one possible implementation, the first current mirror includes:
the grid electrode of the second PMOS tube is connected with the grid electrode of the first PMOS tube, and the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube; the drain electrode of the first PMOS tube is the first end of the first current mirror, and the drain electrode of the second PMOS tube is the second end of the first current mirror.
In one possible implementation, the second current mirror includes:
the grid electrode of the fourth PMOS tube is connected with the grid electrode of the third PMOS tube, and the grid electrode of the third PMOS tube is connected with the drain electrode of the third PMOS tube; the drain electrode of the third PMOS tube is the first end of the second current mirror, and the drain electrode of the fourth PMOS tube is the second end of the second current mirror.
In one possible implementation manner, the first triode and the second triode are both NPN triodes, and the area of the emitter of the first triode is larger than that of the emitter of the second triode.
The technical scheme provided by the invention has the following advantages:
1. according to the band-gap reference current source provided by the invention, the influence of the base current of the first triode and the base current of the second triode on the whole current source is eliminated by arranging the first resistor between the base of the first triode and the base of the second triode, so that the precision of the band-gap reference current source is improved; and then, by arranging the second resistor and the third resistor, the band-gap reference current source can be realized to be a current source irrelevant to temperature through the adjustment of the resistance values of the first resistor, the second resistor and the third resistor.
In addition, the band-gap reference current source forms an amplifying circuit by arranging the first current mirror and the first NMOS tube, so that the current source only has three current paths (a current path where the first triode is located, a current path where the second triode is located and a current path where the fourth resistor is located) while the circuit layout area of the band-gap reference current source is reduced, the circuit structure is simple, and the energy consumption is low.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic diagram of a bandgap reference current source in the prior art;
fig. 2 is a schematic structural diagram of a bandgap reference current source according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, which are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Fig. 2 shows a schematic structural diagram of a bandgap reference current source according to an exemplary embodiment, which is provided on the premise that the inventor finds that the reference voltage theory of the existing circuit shown in fig. 1 ignores the influence of the base current of the transistor q1 passing through r 1; through the circuit structure shown in fig. 2, the influence of the base current of the triode on the circuit can be reduced, and a current source which is higher in precision and irrelevant to temperature is realized.
As shown in fig. 2, the circuit includes: an amplifying circuit and a current generating circuit.
The amplifying circuit comprises a first current mirror and a first NMOS transistor MN1, the grid electrode of the first NMOS transistor MN1 is connected with the second end of the first current mirror, and the drain electrode is the output end of the band-gap reference current source.
The current generation circuit comprises a first triode Q1, a second triode Q2, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4; a collector of the first triode Q1 is connected with a first end of the first current mirror, a base of the first triode Q1 is connected with a base of the second triode Q2 through the first resistor R1, and an emitter of the first triode Q2 is grounded after passing through the second resistor R2 and the third resistor R3 in sequence; a collector electrode of the second triode Q2 is connected with the second end of the first current mirror, a base electrode of the second triode Q2 is connected with a source electrode of the first NMOS transistor MN1, and an emitter electrode of the second triode Q2 is connected between the second resistor R2 and the third resistor R3; the source stage of the first NMOS transistor MN1 is grounded through a fourth resistor R4.
Specifically, the first transistor Q1 and the second transistor Q2 may be both NPN transistors, and the area of the emitter of the first transistor is larger than that of the emitter of the second transistor. Illustratively, the ratio of the emitter areas of the first transistor Q1 and the second transistor Q2 may be 8.
Specifically, the input terminal of the first current mirror is connected to the high level output terminal VDD of the driving power supply.
In a possible implementation manner of the embodiment, in order to finally realize the temperature-independent current source, the resistance value of the first resistor R1 may be set
Wherein R is 2 Refers to the resistance value of the second resistor R2, R 3 Refers to the resistance value, R, of the third resistor R3 4 Refers to the fourth resistance R 4 The resistance value (here, the specific setting principle of the resistance value of the first resistor R1 will be explained in the following circuit operation principle).
In a possible implementation manner of this embodiment, as shown in fig. 2, the bandgap reference current source may further include a second current mirror, a first end of the second current mirror is connected to the drain of the first NMOS transistor MN1, and a second end of the second current mirror is an output end of the bandgap reference current source.
In a possible implementation manner of this embodiment, as shown in fig. 2, the first current mirror may include a first PMOS transistor MP1 and a second PMOS transistor MP2, a gate of the second PMOS transistor MP2 is connected to a gate of the first PMOS transistor MP1, and a gate of the first PMOS transistor MP1 is connected to a drain of the first PMOS transistor MP 1; the drain of the first PMOS transistor MP1 is the first end of the first current mirror, and the drain of the second PMOS transistor MP2 is the second end of the first current mirror (i.e. the collector of the first triode Q1 is connected to the drain of the first PMOS transistor MP1, and the collector of the second triode Q2 is connected to the drain of the second PMOS transistor MP 2). And the source electrodes of the first PMOS transistor MP1 and the second PMOS transistor MP2 are both connected to the high level output terminal VDD of the driving power supply.
In a possible implementation manner of this embodiment, as shown in fig. 2, the second current mirror may include a third PMOS transistor MP3 and a fourth PMOS transistor MP4, a gate of the fourth PMOS transistor MP4 is connected to a gate of the third PMOS transistor MP3, and a gate of the third PMOS transistor MP3 is connected to a drain of the third PMOS transistor MP 3; the drain of the third PMOS transistor MP3 is the first end of the second current mirror, and the drain of the fourth PMOS transistor MP4 is the second end of the second current mirror (i.e., the drain of the third PMOS transistor MP3 is connected to the drain of the first NMOS transistor MN 1). And the source electrodes of the first PMOS transistor MP3 and the second PMOS transistor MP4 are both connected to the high level output terminal VDD of the driving power supply.
The working principle of the circuit can be as follows:
1. the circuit structure has loop stability:
taking the example that the first triode Q1 and the second triode Q2 are both NPN triodes, based on the fact that the area of the emitter of the first triode Q1 is larger than that of the emitter of the second triode Q2, therefore, when the base voltage on the first triode Q1 and the second triode Q2 is smaller, the area of the emitter of the first triode Q1 is larger, so that more total current capable of passing through the third resistor R3 is conducted, and the generated collector voltage is unbalanced to drive the amplifying circuit (i.e., the first PMOS transistor MP1, the second PMOS transistor MP2 and the first NMOS transistor MN 1) to increase the base voltage; when the base level voltage on the first triode Q1 and the second triode Q2 is too high, large current is forced to pass through the second resistor R2 and the third resistor R3, the voltage drop generated on the second resistor R2 and the third resistor R3 limits the current passing through the first triode Q1 to be smaller than the current passing through the second triode Q2, and then the amplifying circuit is driven to reduce the base level voltage on the first triode Q1 and the second triode Q2; thus, the first transistor Q1 and the second transistor Q2 reach a stable base voltage condition under otherwise unstable conditions.
2. The first resistor R1 in the circuit can eliminate the influence of the base current on the current source:
considering the base currents of the first transistor Q1 and the second transistor Q2, the current I flowing through the first NMOS transistor MN1 can be caused A The parameter produces a temperature-dependent increase, resulting in a value of the current source that is temperature-dependentAnd off. If the voltage value at A is assumed to be V A ，i b1 Base current, i, of Q1 b2 Base current of Q2, I A Is the current flowing through the first NMOS transistor MN1, I P Is the current flowing through the resistor R2 and I P ＞＞i b1 Then V passes through two channels of the first transistor Q1 and the second transistor Q2 based on point A A This can be expressed as follows (for reasons of reasoning it is assumed here that the base currents of the transistors Q1 and Q2 are much smaller than the collector currents):
V A ＝2×R 3 ×I P +V BE2 ＝2×R 3 ×I P +R 2 ×I P +V BE1 +R 1 ×i b1 (2)，
in the formula, V BE1 Base-emitter voltage, V, of transistor Q1 BE2 The base-emitter voltage of transistor Q2.
Then, it is possible to obtain:
further, the current I flowing through the NMOS transistor MN1 A Comprises the following steps:
it can be seen that the temperature-dependent gain
At a voltage V A Is a temperature independent voltage source. In this case:
it is assumed that the collector and base currents of the first transistor Q1 and the second transistor Q2 are matched, i.e. i b1 ＝i b2 . Then there are:
substituting equation (6) into equation (5) has:
due to the fact that
In, V BE2 Negative correlation with temperature, V T lnN is positively correlated with temperature, thus, changes
A temperature independent value can be obtained.
In addition, as can be analyzed from the circuit structure of fig. 2, the base currents of the first transistor Q1 and the second transistor Q2 must flow through the first NMOS transistor MN1, which will result in a value higher than an ideal current value to stabilize the base voltage of the second transistor Q2, and such an increased value will be influenced by the process and temperature and drift with the temperature, and the setting of the first resistor R1 can compensate such an influence, reducing the influence of the temperature on the circuit.
In summary, only the resistance of the first resistor R1 is set
The circuit can eliminate the influence of base current of the triode by setting the resistance value of the resistor R1, and a current source irrelevant to temperature is realized.
3. The circuit can realize a reference current source independent of temperature:
when the amplifying circuit generates the stable base voltage, the first transistor Q1 and the second transistor Q1 are turned onDifference in collector current density of the two transistors Q2, V of both the first transistor Q1 and the second transistor Q2 BE Difference in base-emitter voltage V between them BE The difference is as follows:
wherein k is Boltzmann constant, T is absolute temperature, q is amount of electron charge, and J 1 And J 2 Which are the emitter currents of the first transistor Q1 and the second transistor Q2, respectively.
Since the current in the first transistor Q1 is equal to the current in the second transistor Q2, the current in the third resistor R3 is twice as high as that in the second resistor R2, and the voltage drop V across the third resistor R3 is 1 The following were used:
if the resistance ratio and the current density ratio are assumed to be constant, the voltage varies directly with the absolute temperature T for compensation V BE A negative temperature coefficient of voltage.
If the base currents of the first triode Q1 and the second triode Q2 are not considered, the base voltage of the second triode Q2 is the base-emitter voltage V of the second triode Q2 BE And the sum of the temperature-dependent voltage at the third resistor R3, i.e. the base voltage V of the second triode Q2 BQ2 The formula of (1) is as follows:
wherein, N is the area ratio of the collectors of the first triode Q1 and the second triode Q2.
The current flowing through the NMOS transistor MN1
Output voltage that can be similar to a conventional bandgap circuitCan be adjusted by
It is set to a stable value independent of temperature.
In summary, the circuit can obtain a value of the current source independent of temperature.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. This need not be, nor should it be exhaustive of all embodiments. And obvious variations or modifications derived therefrom are intended to be within the scope of the present invention.
Claims (6)
1. A bandgap reference current source, comprising:
the amplifying circuit comprises a first current mirror and a first NMOS tube; the grid electrode of the first NMOS tube is connected with the second end of the first current mirror, and the drain electrode of the first NMOS tube is the output end of the band-gap reference current source;
the current generating circuit comprises a first triode, a second triode, a first resistor, a second resistor, a third resistor and a fourth resistor; a collector of the first triode is connected with a first end of the first current mirror, a base of the first triode is connected with a base of the second triode through the first resistor, and an emitter of the first triode is grounded after passing through the second resistor and the third resistor in sequence; a collector of the second triode is connected with the second end of the first current mirror, a base of the second triode is connected with a source electrode of the first NMOS tube, and an emitter of the second triode is connected between the second resistor and the third resistor; and the source stage of the first NMOS tube is grounded through the fourth resistor.
2. The bandgap reference current source of claim 1, wherein the first resistor has a resistance value
Wherein R is 2 Is the resistance value, R, of the second resistor 3 Is the resistance value, R, of the third resistor 4 Refers to the resistance of the fourth resistor.
3. The bandgap reference current source according to claim 1 or 2, further comprising:
and the first end of the second current mirror is connected with the drain electrode of the first NMOS tube, and the second end of the second current mirror is the output end of the band-gap reference current source.
4. The bandgap reference current source of claim 3, wherein the first current mirror comprises:
the grid electrode of the second PMOS tube is connected with the grid electrode of the first PMOS tube, and the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube; the drain electrode of the first PMOS tube is the first end of the first current mirror, and the drain electrode of the second PMOS tube is the second end of the first current mirror.
5. The bandgap reference current source of claim 4, wherein the second current mirror comprises:
the grid electrode of the fourth PMOS tube is connected with the grid electrode of the third PMOS tube, and the grid electrode of the third PMOS tube is connected with the drain electrode of the third PMOS tube; the drain electrode of the third PMOS tube is the first end of the second current mirror, and the drain electrode of the fourth PMOS tube is the second end of the second current mirror.
6. The bandgap reference current source of claim 1, wherein the first transistor and the second transistor are both NPN transistors, and wherein an emitter area of the first transistor is larger than an emitter area of the second transistor.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN118708013A (en) * | 2024-08-28 | 2024-09-27 | 苏州汉天下电子有限公司 | Band gap reference circuit and radio frequency module |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN118708013A (en) * | 2024-08-28 | 2024-09-27 | 苏州汉天下电子有限公司 | Band gap reference circuit and radio frequency module |
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