CN115694739A - A data transmission device and method for Gigabit Ethernet - Google Patents

Abstract

The application provides a data transmission device and a data transmission method for a gigabit Ethernet, relates to the field of communication transmission, and can solve the problem of low construction cost of related technologies. The device includes: the first communication unit is used for receiving the client side data and generating MAC frame data according to the client side data; sending MAC frame data to a processing module; the processing module is used for receiving MAC frame data sent by the first communication unit; performing fixed-length slicing and Forward Error Correction (FEC) coding on MAC frame data to obtain at least one first data block; performing scrambling operation on at least one first data block to obtain at least one second data block; transmitting at least one second data block to a second communication unit; the second communication unit is used for receiving at least one second data block sent by the processing module and generating target transmission data according to the at least one second data block; the transmission target transmits data. The method and the device can improve the reliability of the link without changing the Ethernet transmission protocol.

Description

A data transmission device and method for Gigabit Ethernet

technical field

The present application relates to the field of communication transmission, in particular to a Gigabit Ethernet data transmission device and method.

Background technique

Gigabit Ethernet data is usually transmitted using a short-wavelength (eg, 850nm wavelength) multimode fiber or a long-wavelength (eg, 1300nm wavelength) single-mode fiber for data transmission. However, the reliability of the above-mentioned transmission methods is poor in long-distance transmission.

At present, related technologies usually convert data from Ethernet protocol to optical transmission network protocol, so as to carry out long-distance transmission through optical transmission equipment. This solution cannot continue to use the original data transmission link, resulting in high construction costs.

Contents of the invention

The present application provides a Gigabit Ethernet data transmission device and method, which can improve the transmission reliability of Ethernet data and reduce the construction cost of long-distance transmission links.

In order to achieve the above object, the application adopts the following technical solutions:

In a first aspect, the present application provides a data transmission device, which includes: a first communication unit, a processing module, and a second communication unit; the first communication unit is configured to receive client-side data and generate media access according to the client-side data Control the MAC frame data; send the MAC frame data to the processing module; the processing module is used to receive the MAC frame data sent by the first communication unit; perform fixed-length slicing and forward error correction FEC coding on the MAC frame data to obtain at least one first Data block; perform scrambling operation on at least one first data block to obtain at least one second data block; send at least one second data block to the second communication unit; the second communication unit is used to receive at least one sent by the processing module a second data block, and generating target transmission data according to at least one second data block; sending the target transmission data.

Based on the above technical solution, in the embodiment of the present application, after receiving the client-side data, the first communication unit may generate MAC frame data from the client-side data and send it to the processing module. The processing module can slice the MAC frame data into at least one equal-length data block, and perform FEC encoding to obtain at least one first data block, so that the device receiving data can perform error correction on the received network data according to the FEC encoding. wrong. At the same time, the processing module can also perform a scrambling operation on the at least one first data block to obtain at least one second data block, thereby reducing the impact of signal attenuation during transmission. Afterwards, the second communication unit can generate target transmission data according to the at least one second data block, and send the target transmission data. Therefore, the present application ensures the reliability of long-distance transmission without changing the Ethernet protocol through the above-mentioned technical solution, so that the existing data transmission link can be used for Ethernet long-distance transmission, reducing the cost of transmission equipment. construction cost.

In combination with the first aspect above, in a possible implementation manner, the processing module includes: an asynchronous first-in-first-out module, an FEC encoding module, and a scrambling module; an asynchronous first-in-first-out module, configured to receive the MAC frame sent by the first communication unit Data, and synchronize the MAC frame data; send the synchronized MAC frame data to the FEC encoding module; the FEC encoding module is used to receive the synchronized MAC frame data sent by the asynchronous first-in first-out module, and synchronize the MAC frame Data fixed-length slicing and FEC encoding to obtain at least one first data block; sending at least one first data block to the scrambling module; the scrambling module is used to receive at least one first data block sent by the FEC encoding module, and at least A scrambling operation is performed on a first data block to obtain at least one second data block; and the at least one second data block is sent to the second communication unit.

In combination with the first aspect above, in a possible implementation, the FEC encoding module is specifically configured to: add data frame header information, frame length information, and padding data to the MAC frame data, and perform fixed-length slicing to obtain at least one Data blocks with the same data length; at least one data block with the same data length is encoded by a preset encoding algorithm to obtain at least one first data block.

With reference to the first aspect above, in a possible implementation, the FEC encoding module includes a Reed-Solomon RS encoder, and the RS encoder includes: multiple multipliers, multiple adders, multiple registers, feedback selectors, and selection switch.

In combination with the first aspect above, in a possible implementation manner, the scrambling module is specifically used to: generate a pseudo-random sequence according to a pseudo-random sequence polynomial; perform an XOR operation on the pseudo-random sequence to generate a scrambling polynomial; The polynomial and at least one first data block define at least one second data block.

In combination with the first aspect above, in a possible implementation manner, the first communication unit includes a client-side SerDes and a MAC module; the client-side SerDes is configured to receive client-side data, and Perform serial-to-parallel conversion and decoding to obtain Ethernet data; send Ethernet data to the MAC module; the MAC module is used to receive the Ethernet data sent by the client-side serial deserializer, and generate MAC frame data according to the Ethernet data; The processing module sends MAC frame data; the second communication unit is specifically configured to perform parallel-to-serial conversion and encoding on at least one second data block to obtain target transmission data.

In combination with the first aspect above, in a possible implementation manner, the data transmission device further includes an interface control module; the interface control module is connected to the MAC module; the interface control module is used to send a control instruction to the MAC module; the control instruction includes a rate The mode selection instruction and/or the interface receiving and sending enabling instruction; the rate mode selection instruction is used to configure the rate mode of the MAC module; the interface receiving and sending enabling instruction is used to instruct the MAC module to perform a data receiving operation or a data sending operation.

With reference to the first aspect above, in a possible implementation manner, the MAC module is further configured to send statistical data to the interface control module; the interface control module is configured to receive the statistical data sent by the MAC module.

In combination with the first aspect above, in a possible implementation manner, the interface control module is also connected to the processing module; the interface control module is configured to send an FEC enabling instruction to the processing module; the FEC enabling instruction is used to instruct the processing module to execute FEC codec operation.

With reference to the foregoing first aspect, in a possible implementation manner, the data transmission device further includes a preset media-independent interface; the preset media-independent interface is used to connect the client-side SerDes and the MAC module.

With reference to the first aspect above, in a possible implementation manner, the client-side serial deserializer includes: a first physical medium connection sublayer PMA module, a first physical coding sublayer PCS module, and a first clock selection module; A PMA module is connected with the first clock selection module; the first PMA module is connected with the first PCS module.

With reference to the first aspect above, in a possible implementation manner, the data transmission device further includes a preset media-independent interface; the preset media-independent interface is used to connect the first PCS module and the MAC module.

With reference to the first aspect above, in a possible implementation manner, the second communication unit includes: a second physical medium connection sublayer PMA module, a second physical coding sublayer PCS module, and a second clock selection module; the second PMA module It is connected with the second clock selection module; the second PMA module is connected with the second PCS module.

In a second aspect, the present application provides a data transmission device, which includes: a first communication unit, a processing module, and a second communication unit; the second communication unit is configured to receive target transmission data and generate at least one The second data block; sending at least one second data block to the processing module; the processing module is configured to receive at least one second data block sent by the second communication unit; perform a descrambling operation on at least one second data block to obtain at least one The first data block; perform forward error correction FEC decoding on at least one first data block and combine to obtain medium access control MAC frame data; send the MAC frame data to the first communication unit; the first communication unit is used to receive the processing module to send MAC frame data, and generate client-side data according to the MAC frame data; send client-side data.

With reference to the second aspect above, in a possible implementation manner, the processing module includes: an asynchronous first-in-first-out module, an FEC decoding module, and a descrambling module; the descrambling module is configured to receive at least one second message sent by the second communication unit. Data block; perform descrambling operation on at least one second data block to obtain at least one first data block; send at least one first data block to the FEC decoding module; FEC decoding module is used to receive at least one first data block sent by the descrambling module A data block, and perform FEC decoding on at least one first data block and combine to obtain MAC frame data; send MAC frame data to the asynchronous first-in-first-out module; asynchronous first-in-first-out module, used to receive the MAC sent by the asynchronous first-in-first-out module frame data, and synchronize the MAC frame data; and send the synchronized MAC frame data to the first communication unit.

With reference to the second aspect above, in a possible implementation manner, the FEC decoding module includes: a Reed-Solomon RS decoder; the RS decoder is configured to perform FEC decoding on at least one first data block and combine them to obtain MAC frame data.

In combination with the second aspect above, in a possible implementation, the descrambling module is specifically used to: generate a pseudo-random sequence according to the pseudo-random sequence polynomial; perform an XOR operation on the pseudo-random sequence to generate a descrambling polynomial; The polynomial and at least one second data block define at least one first data block.

In combination with the second aspect above, in a possible implementation manner, the first communication unit includes a client-side SerDes and a MAC module; the MAC module is configured to receive the MAC frame data sent by the processing module, and , generate Ethernet data; send Ethernet data to the client-side serial deserializer; the client-side serial deserializer is used to receive the Ethernet data sent by the MAC module, and perform parallel conversion and encoding on the Ethernet data, Obtaining client-side data; sending client-side data; the second communication unit is specifically configured to perform serial-to-parallel conversion and decoding on the target transmission data to obtain at least one second data block.

In combination with the second aspect above, in a possible implementation manner, the data transmission device further includes an interface control module; the interface control module is connected to the MAC module; the interface control module is used to send a control instruction to the MAC module; the control instruction includes a rate The mode selection instruction and/or the interface receiving and sending enabling instruction; the rate mode selection instruction is used to configure the rate mode of the MAC module; the interface receiving and sending enabling instruction is used to instruct the MAC module to perform a data receiving operation or a data sending operation.

With reference to the second aspect above, in a possible implementation manner, the MAC module is further configured to send statistical data to the interface control module; the interface control module is configured to receive the statistical data sent by the MAC module.

In combination with the second aspect above, in a possible implementation manner, the interface control module is also connected to the processing module; the interface control module is configured to send an FEC enabling instruction to the processing module; the FEC enabling instruction is used to instruct the processing module to execute FEC codec operation.

With reference to the second aspect above, in a possible implementation manner, the data transmission device further includes a preset media-independent interface; the preset media-independent interface is used to connect the client-side SerDes and the MAC module.

With reference to the second aspect above, in a possible implementation manner, the client-side serial deserializer includes: a first physical medium connection sublayer PMA module, a first physical coding sublayer PCS module, and a first clock selection module; A PMA module is connected with the first clock selection module; the first PMA module is connected with the first PCS module.

With reference to the second aspect above, in a possible implementation manner, the data transmission device further includes a preset media-independent interface; the preset media-independent interface is used to connect the first PCS module and the MAC module.

With reference to the second aspect above, in a possible implementation manner, the second communication unit includes: a second physical medium connection sublayer PMA module, a second physical coding sublayer PCS module, and a second clock selection module; the second PMA module It is connected with the second clock selection module; the second PMA module is connected with the second PCS module.

In a third aspect, the present application provides a data transmission method, the method comprising: receiving client-side data, and generating MAC frame data according to the client-side data; performing fixed-length slicing and forward error correction FEC coding on the MAC frame data to obtain at least A first data block; performing a scrambling operation on at least one first data block to obtain at least one second data block; generating target transmission data according to the at least one second data block, and sending the target transmission data.

In a fourth aspect, the present application provides a data transmission method, the method comprising: receiving target transmission data, and generating at least one second data block according to the target transmission data; performing a descrambling operation on at least one second data block to obtain at least one The first data block; performing forward error correction FEC decoding on at least one first data block and merging to obtain MAC frame data; generating client-side data according to the MAC frame data, and sending the client-side data.

In a fifth aspect, the present application provides a data transmission device, which includes a communication unit and a processing unit; the communication unit is used to receive client-side data; the processing unit is used to generate MAC frame data according to the client-side data; performing fixed-length slicing and FEC coding to obtain at least one first data block; performing scrambling operations on at least one first data block to obtain at least one second data block; generating target transmission based on at least one second data block Data; communication unit, also used to send target transmission data.

In a sixth aspect, the present application provides a data transmission device, which includes a communication unit and a processing unit; the communication unit is used to receive target transmission data; the processing unit is used to generate at least one second data block according to the target transmission data; performing a descrambling operation on at least one second data block to obtain at least one first data block; performing forward error correction (FEC) decoding on at least one first data block and merging to obtain MAC frame data; generating client-side data according to the MAC frame data; The communication unit is also used to send client-side data.

In a seventh aspect, the present application provides a data transmission device, the device includes: a processor and a communication interface; the communication interface is coupled to the processor, and the processor is used to run computer programs or instructions, so as to implement the third aspect or the fourth aspect The data transfer method described in .

In the eighth aspect, the present application provides a computer-readable storage medium, where instructions are stored in the computer-readable storage medium, and when the instructions are run on the terminal, the terminal is made to perform the data transmission as described in the third aspect or the fourth aspect method.

In a ninth aspect, the present application provides a computer program product containing instructions, which, when the computer program product is run on a data transmission device, cause the data transmission device to execute the data transmission method described in the third aspect or the fourth aspect.

In a tenth aspect, the present application provides a chip, the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is used to run computer programs or instructions to implement the data as described in the third aspect or the fourth aspect. transfer method.

Specifically, the chip provided in this application further includes a memory for storing computer programs or instructions.

It should be noted that all or part of the above computer instructions may be stored on a computer-readable storage medium. Wherein, the computer-readable storage medium may be packaged together with the processor of the device, or may be packaged separately with the processor of the device, which is not limited in the present application.

For the descriptions from the second aspect to the tenth aspect in this application, you can refer to the detailed description of the first aspect; Let me repeat.

In this application, the names of the above-mentioned data transmission devices do not limit the equipment or functional modules themselves. In actual implementation, these equipment or functional modules may appear with other names. As long as the functions of each device or functional module are similar to those of the present application, they fall within the scope of the claims of the present application and their equivalent technologies.

These or other aspects of the present application will be more clearly understood in the following description.

Description of drawings

FIG. 1 is a system architecture diagram of a data transmission system provided by an embodiment of the present application;

FIG. 2 is a structural diagram of a data transmission device provided in an embodiment of the present application;

FIG. 3 is a structural diagram of an RS encoder provided in an embodiment of the present application;

FIG. 4 is a flow chart of uplink transmission of a client-side SerDes provided by an embodiment of the present application;

FIG. 5 is a schematic structural diagram of an RS decoder provided in an embodiment of the present application;

FIG. 6 is a flowchart of downlink transmission of a client-side SerDes provided by an embodiment of the present application;

FIG. 7 is a flowchart of a data transmission method provided by an embodiment of the present application;

FIG. 8 is a flow chart of another data transmission method provided by the embodiment of the present application;

FIG. 9 is a structural diagram of another data transmission device provided by an embodiment of the present application;

FIG. 10 is a structural diagram of another data transmission device provided by an embodiment of the present application.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

The term "and/or" in this article is just an association relationship describing associated objects, which means that there can be three relationships, for example, A and/or B can mean: A exists alone, A and B exist simultaneously, and there exists alone B these three situations.

The terms "first" and "second" in the specification and drawings of the present application are used to distinguish different objects, or to distinguish different processes for the same object, rather than to describe a specific sequence of objects.

In addition, the terms "including" and "having" mentioned in the description of the present application and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes other unlisted steps or units, or optionally also includes Other steps or elements inherent to the process, method, product or apparatus are included.

It should be noted that, in the embodiments of the present application, words such as "exemplary" or "for example" are used as examples, illustrations or descriptions. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of the present application shall not be interpreted as being more preferred or more advantageous than other embodiments or design schemes. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete manner.

In the description of the present application, unless otherwise specified, the meaning of "plurality" refers to two or more.

In the following, nouns involved in the embodiments of the present application are explained for the convenience of readers' understanding.

(1) XOR operation

The XOR operation is a logical operation. When the values of a and b are different, the result of the XOR operation of a and b is 1. When the values of a and b are the same, the XOR operation result of a and b is 0.

Exemplarily, in binary, the XOR operation result of 0 and 0 is 0, the XOR operation result of 0 and 1 is 1, and the XOR operation result of 1 and 1 is 1.

Gigabit Ethernet (gigabit ethernet, GE) data transmission generally adopts the 1000BASE-X specification of the standard IEEE802.3z of the Gigabit Ethernet technology, and the 1000BASE-X specification includes two schemes: 1000BASE-SX and 1000BASE-LX. Among them, 1000BASE-SX uses short-wavelength (850nm) multimode fiber, and the longest transmission distance of the gigabit data stream defined by it is 550 meters, which is mainly suitable for backbone networks with a small range. 1000BASE-LX uses long-wavelength (1300nm) single-mode fiber, which defines a maximum distance of 5 kilometers for a gigabit data stream. However, the above-mentioned transmission methods are less reliable in long-distance transmission.

At present, related technologies usually aggregate Gigabit Ethernet data into data transmission services above 2.5G, and convert the Ethernet protocol into an optical transport network (OTN) protocol, so as to perform long-distance transmission through optical transport equipment. The scheme cannot continue to use the original transmission system, resulting in high construction costs.

In view of this, an embodiment of the present application provides a data transmission device. After the first communication unit receives the client-side data, it can generate a medium access control (media access control, MAC) frame data from the client-side data and send it to the processing module. The processing module can slice the MAC frame data into at least one equal-length data block, and perform forward error correction (forward error correction, FEC) coding to obtain at least one first data block, so that the device receiving data is coded according to the FEC Error correction is performed on the received network data. At the same time, the processing module can also perform a scrambling operation on the at least one first data block to obtain at least one second data block, thereby reducing the impact of signal attenuation during transmission. Afterwards, the second communication unit can generate target transmission data according to the at least one second data block, and send the target transmission data. Therefore, the present application ensures the reliability of long-distance transmission without changing the Ethernet protocol through the above-mentioned technical solution, so that the existing data transmission link can be used for Ethernet long-distance transmission, reducing the cost of transmission equipment. construction cost.

The implementation of the embodiment of the present application will be described in detail below in conjunction with the accompanying drawings.

As shown in FIG. 1 , FIG. 1 is a system architecture diagram of a data transmission system 10 provided in an embodiment of the present application. The data transmission system 10 includes: a data transmission device 101 and a terminal device 102 . Wherein, the terminal device 102 is connected to the data transmission device 101 , and the data transmission devices 101 are connected to each other.

It should be noted that the data transmission system 10 may be a distributed network to implement network communication between multiple terminal devices 102 , and for ease of understanding, only two terminal devices 102 are shown in FIG. 1 .

The data transmission apparatus 101 in the embodiment of the present application may be arranged on both sides of the transmission link in the data transmission system 10 and connected to the terminal device 102 . At this time, a relay device may also be included between the data transmission apparatuses 101 on both sides. The relay device is used to forward the data in the transmission link.

The data transmission device 101 can also be set in a transmission link as a relay device, at this time, the data transmission device 101 is connected to other data transmission devices 101 .

In addition, the data transmission device 101 can be used as a two-way transmission device, which can receive data from the first end of the data transmission device 101 and send data through the second end; The first end sends data.

Exemplarily, the transmission link in this application may be a Gigabit Ethernet data transmission link, and the above-mentioned solution is also applicable to other Ethernet data transmission links, which is not limited in this application.

Wherein, the data transmission process in the embodiment of the present application involves uplink transmission and downlink transmission. The uplink transmission process refers to a process in which the terminal device 102 sends data to the data transmission device 101, and the data transmission device sends the data to a remote device (such as another data transmission device 101 or another terminal device 102). The downlink transmission process refers to the process in which the data transmission device 101 receives the data sent by the remote device and sends it to the terminal device 102 .

The following describes the technical solution provided by the embodiment of the present application for the uplink transmission process:

The terminal device 102 is configured to send client-side data to the data transmission device 101 . Correspondingly, the data transmission device 101 is configured to receive client-side data sent by the terminal device 102 .

The data transmission device 101 is configured to generate MAC frame data according to client side data.

Wherein, the MAC frame data is transmission data conforming to the Ethernet message format standard.

Exemplarily, the MAC frame data includes destination address, source address, data type, data content and so on.

The data transmission device 101 is further configured to perform fixed-length slicing and FEC coding on the MAC frame data to obtain at least one first data block.

In a possible implementation manner, the data transmission device 101 may add data frame header information, frame length information, and padding data to the MAC frame data frame, and perform fixed-length slicing to obtain at least one data block with the same data length, and At least one data block with the same data length is encoded by a preset encoding algorithm to obtain at least one first data block.

Exemplarily, the data length of each first data block may be 255 bytes. Among them, 239 bytes are the data length of the data block obtained by performing fixed-length slicing on the MAC frame data, and 16 bytes are the overhead fields required for encoding. The overhead field is used to correct the actual data corresponding to 239 bytes, so as to avoid data transmission errors. After receiving the data, the communication device can detect whether a data error occurs in the corresponding 239-byte data according to the overhead field corresponding to the 16 bytes, and restore correct data in the case of a data error.

The data transmission device 101 is further configured to perform a scrambling operation on at least one first data block to obtain at least one second data block and generate target transmission data according to the at least one second data block.

It should be noted that the transmission data is usually transmitted in the communication link in binary form. When a long continuous "0" or continuous "1" appears in a set of data, it is actually reflected as a continuous high level or Continuous low level, which leads to signal attenuation, it is difficult for the receiving device to identify the actual signal of the data and it is difficult to perform clock alignment, resulting in misalignment. Therefore, the data transmission device 101 performs a scrambling operation on the at least one first data block, so that the distribution of "0" and "1" in the data is relatively uniform, thereby improving the reliability of the data during transmission.

Exemplarily, the data sequence of the first data block is "11000", and the scrambling code required for the scrambling operation is "10101", and the data transmission device 101 performs an XOR operation on the data sequence of the first data block and the scrambling code to obtain The data sequence of the first data block after scrambling is "01101".

The data transmission device 101 is also used for sending the target transmission data to the remote device. corresponding. The remote device is used for receiving the target transmission data sent by the data transmission device 101 .

The following describes the technical solution provided by the embodiment of the present application for the downlink transmission process:

The remote device is used to send target transmission data to the data transmission device 101 . Correspondingly, the communication transmission setting 101 is used to receive the target transmission data sent by the remote device.

The communication transmission arrangement 101 is further configured to generate at least one second data block according to the target transmission data.

The communication transmission setting 101 is further configured to perform a descrambling operation on at least one second data block to obtain at least one first data block.

Wherein, the descrambling operation is an inverse operation of the scrambling operation, that is, the same scrambling code as the scrambling operation and the scrambled data sequence are used to perform an exclusive OR operation to obtain the descrambled data sequence.

In combination with the above example, the scrambling code is "10101", the data sequence of the first data block after scrambling is "01101", and the data transmission device 101 performs an XOR operation on the scrambling code and the scrambled data sequence to obtain The data sequence of the first data block is "11000".

The communication transmission setting 101 is further configured to perform forward error correction (FEC) decoding on at least one first data block and combine them to obtain MAC frame data.

With reference to the above example, the communication transmission setting 101 performs error correction on the actual data in the first data block through the overhead field, so as to obtain at least one data block with the same data length after FEC decoding, and convert the at least one data block with the same data length Combine to get MAC frame data.

The communication transmission setting 101 is also used to generate client-side data according to the MAC frame data, and send the client-side data to the terminal device 102 . Correspondingly, the terminal device 102 is used to receive client-side data.

It should be pointed out that the various embodiments of the present application may refer to each other, for example, the same or similar steps, method embodiments, system embodiments and device embodiments may refer to each other without limitation.

As a possible embodiment of the present application, as shown in FIG. 2 , FIG. 2 is a structural diagram of a data transmission device 20 provided in an embodiment of the present application. The data transmission device 20 includes a first communication unit 201 , a processing module 202 and a second communication unit 203 .

Wherein, the first communication unit 201 is connected to the processing module 202 , and the processing module 202 is connected to the second communication unit 203 .

The data transmission device 20 in the embodiment of the present application is used for the uplink transmission process and the downlink transmission process of data, and the data transmission device 20 provided in the embodiment of the present application will be respectively described below for the above two processes.

For the uplink transmission process of data:

The first communication unit 201 is configured to receive client-side data, and generate medium access control MAC frame data according to the client-side data.

Wherein, the MAC frame data is transmission data conforming to the Ethernet message format standard.

Exemplarily, the MAC frame data includes destination address, source address, data type, data content and so on.

The first communication unit 201 is also configured to send MAC frame data to the processing module 202 . Correspondingly, the processing module 202 is configured to receive the MAC frame data sent by the first communication unit 201 .

The processing module 202 is further configured to perform fixed-length slicing and FEC coding on the MAC frame data to obtain at least one first data block.

Wherein, the first data block includes an overhead field, and the overhead field is used to detect whether the first data block is sent incorrectly during transmission.

The processing module 202 is further configured to perform a scrambling operation on at least one first data block to obtain at least one second data block.

It should be noted that the transmission data is usually transmitted in the communication link in binary form. When a long continuous "1" or continuous "0" appears in a group of data, it is actually reflected as a continuous high level or Continuous low level, which leads to signal attenuation, it is difficult for the receiving device to identify the actual signal of the data and it is difficult to perform clock alignment, resulting in misalignment. Therefore, the processing module 202 performs a scrambling operation on the at least one first data block, so that the "1" and "0" in the data are evenly distributed, thereby improving the reliability of the data during transmission.

Exemplarily, the data sequence of the first data block is "11000", the scrambling code required for the scrambling operation is "10101", the processing module 202 performs an XOR operation on the data sequence of the first data block and the scrambling code, and obtains The data sequence of the scrambled first data block is "01101".

The processing module 202 is further configured to send at least one second data block to the second communication unit 203 . Correspondingly, the second communication unit 203 is configured to receive at least one second data block sent by the processing module 202 .

The second communication unit 203 is further configured to generate target transmission data according to at least one second data block.

The second communication unit 203 is also used for sending target transmission data.

Based on the above technical solution, in the embodiment of the present application, after receiving the client-side data, the first communication unit 201 may generate MAC frame data from the client-side data and send it to the processing module 202 . The processing module 202 can slice the MAC frame data into at least one equal-length data block, and perform FEC encoding to obtain at least one first data block, so that the device receiving data can perform bit error on the received network data according to the FEC encoding Error correction. At the same time, the processing module 202 may also perform a scrambling operation on the at least one first data block to obtain at least one second data block, thereby reducing the impact of signal attenuation during transmission. Afterwards, the second communication unit 203 may generate target transmission data according to the at least one second data block, and send the target transmission data. Therefore, the present application ensures the reliability of long-distance transmission without changing the Ethernet protocol through the above-mentioned technical solution, so that the existing data transmission link can be used for Ethernet long-distance transmission, reducing the cost of transmission equipment. construction cost.

As a possible implementation manner, as shown in FIG. 2 , the processing module 202 includes: an asynchronous first-in-first-out (firstinput first output, FIFO) module 2021 , an FEC encoding module 2022 and a scrambling module 2023 .

The asynchronous first-in first-out module 2021 is used for receiving the MAC frame data sent by the first communication unit 201 and synchronizing the MAC frame data.

In a possible implementation manner, the asynchronous first-in-first-out module 2021 may synchronize the MAC frame data through the first clock selection module 2016 .

The asynchronous FIFO module 2021 is also used to send the synchronized MAC frame data to the FEC encoding module 2022 .

The FEC encoding module 2022 is configured to receive the synchronized MAC frame data sent by the asynchronous FIFO module 2021, and perform fixed-length slicing and FEC encoding on the synchronized MAC frame data to obtain at least one first data block.

In a possible implementation manner, the FEC encoding module 2022 is further configured to fill the at least one first data block with an idle code (idle code). The FEC encoding module 2022 can match the rate of the at least one first data block with Gigabit Ethernet data by filling idle codes, so that the data bandwidth and transmission rate of the at least one first data block in the physical transmission link are the same as The actual Ethernet remains consistent, and there is no need to increase the bandwidth and line rate of the transmission link. Therefore, there is no need to change the configuration of the Gigabit Ethernet optical module of the original transmission link.

In another possible implementation, the FEC encoding module 2022 is specifically configured to: add data frame header information, frame length information, and padding data to the MAC frame data, and perform fixed-length slicing to obtain at least one data block with the same data length ; Encoding at least one data block with the same data length by a preset encoding algorithm to obtain at least one first data block.

Exemplarily, the FEC encoding module 2022 can add data frame header information and frame length information to the MAC frame data, and fill the data until the filled data meets the integer of the preset data length (for example, the preset data length is 239 bytes). times. In this way, the FEC encoding module 2022 can divide the MAC frame data into at least one data block whose data length is the preset data length according to the preset data length.

For each data block, the FEC encoding module 2022 performs FEC encoding on it through a preset encoding algorithm to generate an overhead field (for example, the data length is 16 bytes), thereby obtaining at least one first data block (each first data block The data length is 255 bytes). The preset encoding algorithm may be a Reed Solomon (Reed Solomon, RS) encoding algorithm. The preset encoding algorithm may also be other FEC encoding algorithms, which is not limited in this application.

Wherein, the longer the data length of the overhead field is, the more errors in the data block it can detect, that is, the stronger the reliability of data transmission. The data length of the first data block, the preset data length, and the data length of the overhead field can be set according to actual conditions, which is not limited in this application.

In a possible implementation manner, if the data obtained by the FEC encoding module 2022 is not MAC frame data, the FEC encoding module 2022 may directly fill the data and perform fixed-length slicing.

It should be noted that the current Gigabit Ethernet frame data is usually in the data format of 125M×8bit, that is, the data bandwidth is 1000M. Section data) format conversion, therefore, the data bandwidth used to transmit business data is 80%*1000M, considering the preamble, frame interval and other field information, the actual data bandwidth, the actual data bandwidth will be less than 800M.

With reference to the above example, in the technical solution provided by the embodiment of the present application, each first data block with a data length of 255 bytes includes a 239-byte actual service data block and a 16-byte overhead field. That is to say, in Gigabit Ethernet transmission, the total data bandwidth available in this embodiment of the present application is 239/255*1000M>800M. Therefore, the above technical solution of the present application has sufficient bandwidth to transmit effective data of Gigabit Ethernet.

In a possible implementation manner, the FEC encoding module 2022 includes a Reed-Solomon RS encoder 30 . As shown in FIG. 3 , FIG. 3 is a structural diagram of an RS encoder 30 provided in an embodiment of the present application. The RS encoder 30 includes a plurality of multipliers 301 , a plurality of adders 302 , a plurality of registers 303 , a feedback selector 304 and a selection switch 305 .

The RS encoder 30 is configured to encode at least one data block with the same data length through a preset encoding algorithm to obtain at least one first data block.

Exemplarily, the preset encoding algorithm may be an RS (255, 239, 8) encoding algorithm. Among them, RS(255, 239) is obtained by Galois (Galois Field) finite field GF(28) operation. The multiplier 301 in the RS encoder 30 may be a Galois field multiplier, and the multiplier 301 is used to calculate the exponential sum of the elements in two finite fields and take a modulus of 255. Among them, the encoded data length in the encoding algorithm is 255 bytes, the data length of the actual business data is 239 bytes, and the data length of the overhead field used for verification is 16 bytes. The number of errors in a data block is 8, and the minimum code distance between each data block is 17.

Take the RS encoder 30 including 16 multipliers 301M1-M16, 16 adders 302C1-C16 and 16 registers 303REG1-REG16 as an example, the input end of the feedback selector 304 is connected to the output end of the adder 302C16, and the feedback selector 304 The output terminals of the 16 multipliers 301 are distributedly connected to the first input terminals of the multipliers 301 .

The RS encoder 30 inputs the coefficients g0-g15 of the preset polynomial through the second input terminals of the 16 multipliers 301, and the coefficients are the feedback coefficients.

The output end of multiplier 301M1 is connected with the input end of register 303REG1, the output end of multiplier 301M2-M16 is connected with the first input end of adder 302C1-C15 respectively, the first input end of adder 302C16 is connected with selector switch 305 connected. The output terminals of the registers 303REG1-REG16 are respectively connected to the second input terminals of the adders 302C1-C16.

The output terminals of the adders 302C1-C16 are respectively connected to the input terminals of the registers 303REG2-REG16.

The first input end of the selection switch 305 is used to receive the data to be encoded, and the second input end is connected to the output end of the register 303REG16. The output terminal of the selection switch 305 is used to output encoded data. The selection switch 305 receives the data to be encoded by connecting to the first input end, and obtains and outputs the encoded data by connecting to the second input end.

Wherein, the RS encoder 30 is a 16-stage encoder, and the values in the registers 303REG1-REG16 are XORed with the information symbols in the currently input data to be encoded to obtain an encoded result.

The following is an example of encoding a data block:

1. The RS encoder 30 clears the values in the registers 303REG1-REG16, and sets the selector switch 305 to connect to the first input terminal, so that the symbols in the data block to be encoded are sequentially input into the multipliers 301M1-M16 for calculation coding.

2. When the last symbol in the data block is input to the multiplier 301, the RS encoder 30 connects the selection switch 305 to the second input terminal, so that the check code is loaded into the registers 303REG1-REG16 according to the clock beat, and the encoding result is output .

After the last check code is output, the RS encoder 30 generates the encoded first data block.

It should be noted that, for the specific process of the RS encoder 30 through the RS (255, 239, 8) encoding algorithm, reference may be made to the description in related technologies, and no specific limitation is made here.

In the data transmission device 20 in the embodiment of the present application, by inserting the FEC algorithm defined in the G.709 standard into 1000BASE-X, when the transmission data introduces a bit error during link transmission, the transmission data can be corrected through the overhead field, Therefore, the anti-interference ability in the link transmission process is enhanced, and the transmission distance is increased. At the same time, since the data transmission device 20 in the embodiment of the present application does not need to perform 8B/10B format conversion, it can meet the transmission requirements of Gigabit Ethernet without adding additional bandwidth. Compared with the Gigabit Ethernet transmission device in the related art, the receiving sensitivity of the data transmission device 20 in the embodiment of the present application is suggested to be 6dB, and a longer distance data transmission is realized.

The FEC encoding module 2022 is further configured to send at least one first data block to the scrambling module 2023 .

The scrambling module 2023 is configured to receive at least one first data block sent by the FEC encoding module 2022, and perform a scrambling operation on the at least one first data block to obtain at least one second data block.

In a possible implementation manner, the scrambling module 2023 is specifically configured to generate a pseudo-random sequence according to a pseudo-random sequence polynomial; perform an XOR operation on the pseudo-random sequence to generate a scrambling polynomial; At least one second data block is determined.

The scrambling module 2023 in the embodiment of the present application does not occupy additional overhead of transmission resources. Exemplarily, the process of the scrambling module 2023 performing a scrambling operation on at least one data block is as follows:

1. The scrambling module 2023 generates a pseudo-random sequence with a length of 8 according to the Gold sequence.

2. The scrambling module 2023 generates a scrambling code by bit multiplication.

Wherein, the production method of the Gold sequence can refer to related technologies, and is not specifically limited here. Example: A polynomial for a pseudorandom sequence looks like this:

scram_d[7]<=scram_d[6]^scram_d[5];

scram_d[6]<=scram_d[5]^scram_d[4];

scram_d[5]<=scram_d[4]^scram_d[3];

scram_d[4]<=scram_d[3]^scram_d[2];

scram_d[3]<=scram_d[2]^scram_d[1];

scram_d[2]<=scram_d[1]^scram_d[7]^scram_d[6];

scram_d[1]<=scram_d[7]^scram_d[5];

scram_d[0]<=scram_d[6]^scram_d[4].

Among them, scram_d[0] refers to the first coefficient in the polynomial of the pseudo-random sequence, scram_d[1] refers to the first coefficient in the polynomial of the pseudo-random sequence, and so on. Through the above iterative process, the generated scrambling code is finally output.

The scrambling module 2023 is further configured to send at least one second data block to the second communication unit 203 .

This application uses the scrambling module 2023 to perform scrambling operations on at least one first data block to obtain at least one second data block, so that the distribution of "0" and "1" in the actual data transmission process is relatively uniform, and data transmission is improved. High reliability, meeting the standard of good manufacturing practice (GMP) packaging.

As a possible implementation manner, as shown in FIG. 2 , the first communication unit 201 includes a client-side serializer/deserializer 2011 (serializer/deserializer, serdes) and a MAC module 2012 . The client-side SerDes 2011 is connected to the MAC module 2012 .

The client-side SerDes 2011 is configured to receive client-side data, perform serial-to-parallel conversion and decoding on the client-side data, and obtain Ethernet data.

In a possible implementation manner, the client side serial deserializer 2011 includes: a first physical medium attachment sublayer (physical medium attachment, PMA) module 2014, a first physical coding sublayer (physical coding sublayer, PCS) module 2015 and The first clock selection module 2016.

Wherein, the first PMA module 2014 is connected with the first clock selection module 2016 , and the first PMA module 2014 is connected with the first PCS module 2015 .

The first PMA module 2014, that is, the physical media dependent (PMD) sublayer of the SerDes, is used to implement serialization/deserialization processing. Exemplarily, the first PMA module 2014 may include: reference clock, phase locked loop (phase locked loop, PLL), termination resistance calibration, loopback mode, data clock recovery (clockdata recovery, CDR), serdes related external The power-on initialization unit and reset unit involved in the pins and the transmit port (TX) and receive port (RX).

The first PCS module 2015 is mainly used for encoding/decoding data streams. The PCS sublayer and the PMA sublayer form a complete serdes module, forming the sending data path and receiving data path of the serdes module.

Exemplarily, as shown in FIG. 4 , FIG. 4 is a flow chart of uplink transmission by the client-side SerDes 2011 provided in the embodiment of the present application. The first PMA module 2014 receives client-side data and performs digital clock recovery, thereby realizing clock synchronization. Afterwards, the first PMA module 2014 deserializes the client-side data, and sends the deserialized client-side data to the first PCS module 2015 .

The first PCS module 2015 may perform at least one of 8B/10B decoding, byte deserialization, and byte sorting, and buffer the processed data into the RX elastic FIFO for subsequent encoding processing. Alternatively, the first PCS module 2015 may also directly buffer the received client-side data into the RX elastic FIFO.

The first clock selection module 2016 is used to perform the clock selection operation recovered from the CDR in the first PMA module 2014, and the serdes can run at multiple rates and multiple loopback modes. Therefore, the first clock selection module 2016 needs to select a corresponding clock source according to the current running state. The first clock selection module 2016 selects a reasonable clock according to the working mode of the serdes link, and returns it to the first PMA module 2014, thereby ensuring the normal operation of the CDR in the first PMA module 2014, and can ensure that during data processing The data and clock have the same source.

The client-side SerDes 2011 is also used to send Ethernet data to the MAC module 2012 .

The MAC module 2012 is configured to receive the Ethernet data sent by the client-side SerDes 2011, and generate MAC frame data according to the Ethernet data.

Exemplarily, the MAC module 2012 is a MAC module 2012 supporting three rates of 10M/100M/1000M, and is applied to the Ethernet data link layer defined by the IEEE802.3 standard. The MAC module 2012 may be realized by an IP core of a field programmable gate array (field programmable gate array, FPGA) chip.

In a possible implementation manner, the MAC module 2012 includes a transmitter.

The transmitter is used to receive Ethernet data from the transmitter interface of the client-side SerDes 2011, and add a preamble field and a frame check sequence (frame check sequence, FCS) field. Optionally, the sender is also used to add padding bytes to ensure that the MAC frame data meets the minimum frame length requirement, and to ensure that the frame gap between consecutive frames is at least the minimum distance specified in the protocol. Through the above process, the transmitter can convert Ethernet data into MAC frame data compatible with gigabit medium independent interface (GMII)/media independent interface (MII), and send it to the GMII/MII interface .

In yet another possible implementation manner, the data transmission device 20 further includes an interface control module 204 . The interface control module 204 is connected with the MAC module 2012 .

The interface control module 204 is configured to send a control instruction to the MAC module 2012 .

Wherein, the control instruction includes a rate mode selection instruction and/or an interface receiving and sending enabling instruction. The rate mode selection command is used to configure the rate mode of the MAC module 2012, and the interface receiving and sending enabling command is used to instruct the MAC module 2012 to perform a data receiving operation or a data sending operation.

The MAC module 2012 is also configured to send statistical data to the interface control module 204 . Correspondingly, the interface control module 204 is configured to receive statistical data sent by the MAC module 2012 .

Exemplarily, the statistical data may include statistical data on the number of packets received and sent by the MAC module 2012, statistical data on the number of bytes of packets received and sent, and statistical data on received frame check sequence errors. The business statistics function can be realized through the above solution.

The interface control module 204 can configure the rate mode of the MAC module 2012 . For example, the MAC module 2012 supports three rate modes of 10M/100M/1000M. The interface control module 204 can configure the MAC module 2012 as Gigabit Ethernet (GE) and Fast Ethernet (fast ethernet, FE). Fast Ethernet is also called Fast Ethernet. That is to say, the Gigabit Ethernet optical port can be backward compatible with the 100M Ethernet optical port. When the configuration rate is FE, the working mode of the MAC module 2012 is the GE compatible FE working mode. Therefore, the MAC mode in the embodiment of the present application can be applied to a mixed use scenario of GE or FE.

In yet another possible implementation manner, the interface control module 204 is also connected to the processing module 202 .

The interface control module 204 is configured to send an FEC enabling instruction to the processing module 202 .

Wherein, the FEC enabling instruction is used to instruct the processing module 202 to perform an FEC codec operation.

In yet another possible implementation manner, the data transmission device 20 further includes a preset media-independent interface 2013 .

The preset media independent interface 2013 is used to connect the client-side SerDes 2011 and the MAC module 2012 .

Exemplarily, the preset media independent interface 2013 may be a (serial gigabit media independent interface, SGMII) serial gigabit media independent interface. The SGMII interface is an interface between a port physical layer (port physical layer, PHY) and a MAC. Compared with the GMII interface and the reduced gigabitmedia independent interface (RGMII) interface, the difference is that the GMII interface and the RGMII interface are parallel interfaces and require an accompanying clock, so the PCB layout is more complicated. The SGMII interface is a serial interface and does not need to set another clock. At the same time, the SGMII interface has an 8B/10B encoding function, which can guarantee a transmission rate of 1.25G.

When the client-side SerDes 2011 includes a first physical medium attachment sublayer PMA module 2014, a first physical coding sublayer PCS module 2015, and a first clock selection module 2016, the preset media independent interface 2013 is specifically used to connect the first A PCS module 2015 and a MAC module 2012 .

The MAC module 2012 is also configured to send MAC frame data to the processing module 202 .

The second communication unit 203 is specifically configured to perform parallel-to-serial conversion and encoding on at least one second data block to obtain target transmission data.

In a possible implementation manner, the second communication unit 203 includes: a second physical medium connection sublayer PMA module 2032 , a second physical coding sublayer PCS module 2031 , and a second clock selection module 2033 .

Wherein, the second PMA module 2032 is connected with the second clock selection module 2033 , and the second PMA module 2032 is connected with the second PCS module 2031 .

It should be noted that, the second PMA module 2032, the second PCS module 2031 and the second clock selection module 2033 can refer to the first PMA module 2014, the first PCS module 2015 and the first Relevant descriptions in the clock selection module 2016. Those skilled in the art can make adaptive adjustments to the second PMA module 2032, the second PCS module 2031, and the second clock selection module 2033 according to the specific implementation requirements of the line side. selection, which will not be repeated here.

The above is the specific implementation of the data transmission device 20 in the uplink transmission process provided by the embodiment of the present application. The data transmission device 20 obtains the client-side data through the client-side SerDes 2011, and performs serial-to-parallel conversion on the client-side data. Encode to get Ethernet data. Afterwards, the MAC module 2012 can convert the Ethernet data into MAC frame data, so that the subsequent processing module 202 can perform operations such as FEC encoding and scrambling on the MAC frame data, thereby improving the reliability of the transmission link. At the same time, the second communication unit 203 can perform parallel-to-serial conversion and encoding on the received at least one second data block to obtain target transmission data and send it out, realizing the data transmission function.

The data transmission device 20 provided in the embodiment of the present application will be described below with respect to the downlink transmission process.

For the downlink transmission process of data:

The second communication unit 203 is configured to receive the target transmission data, and generate at least one second data block according to the target transmission data.

In a possible implementation manner, the second communication unit 203 is specifically configured to perform serial-to-parallel conversion and decoding on the target transmission data to obtain at least one second data block.

Exemplarily, the second communication unit 203 includes: a second physical medium connection sublayer PMA module 2032 , a second physical coding sublayer PCS module 2031 and a second clock selection module 2033 .

Wherein, the second PMA module 2032 is connected with the second clock selection module 2033 , and the second PMA module 2032 is connected with the second PCS module 2031 .

For the second communication unit 203, reference may be made to the relevant description of the second communication unit 203 in the above-mentioned uplink transmission process, which will not be repeated here.

The second communication unit 203 is further configured to send at least one second data block to the processing module 202 .

Correspondingly, the processing module 202 is configured to receive at least one second data block sent by the second communication unit 203 .

The processing module 202 is further configured to perform a descrambling operation on at least one second data block to obtain at least one first data block.

It should be noted that, the scrambling code used by the processing module 202 to perform the descrambling operation on at least one second data block is the same scrambling code as the scrambling code used when performing the scrambling operation.

Exemplarily, the data sequence of the second data block is "01101", and the scrambling code is "10101". The processing module 202 performs an XOR operation on the second data block and the scrambling code to obtain the descrambled first data block as "11000".

The processing module 202 is further configured to perform forward error correction (FEC) decoding on at least one first data block and combine them to obtain MAC frame data.

Wherein, the first data block includes an overhead field, and the processing module 202 performs FEC decoding on at least one first data block through the overhead field. The MAC frame data is the transmission data conforming to the Ethernet message format standard.

Exemplarily, the MAC frame data includes destination address, source address, data type, data content and so on.

The processing module 202 is further configured to send MAC frame data to the first communication unit 201 .

Correspondingly, the first communication unit 201 is configured to receive the MAC frame data sent by the processing module 202, and generate client-side data according to the MAC frame data.

The first communication unit 201 is also used for sending client-side data.

Based on the above technical solution, in the embodiment of the present application, after receiving the target transmission data, the second communication unit 203 may generate at least one second data block according to the target transmission data, and send the at least one second data block to the processing module 202. The processing module 202 may perform descrambling operations on at least one second data block to obtain at least one first data block, and perform FEC decoding on the at least one first data block to correct codes that appear during transmission of the first data block. Meta error, so as to get the MAC frame data. Afterwards, the processing module 202 may send the MAC frame data to the first communication unit 201, and the first communication unit 201 generates client-side data according to the MAC frame data, and sends the client-side data. Therefore, the present application guarantees the reliability of long-distance transmission without changing the Ethernet protocol through the above-mentioned technical solution, so that the existing data transmission link can be used for Ethernet long-distance transmission, and the cost of transmission equipment is reduced. construction costs.

As a possible implementation, as shown in FIG. 2, the processing module 202 includes: an asynchronous first-in-first-out module 2021, an FEC decoding module 2024, and a descrambling module 2025;

The descrambling module 2025 is configured to receive at least one second data block sent by the second communication unit 203 .

The descrambling module 2025 is further configured to perform a descrambling operation on at least one second data block to obtain at least one first data block.

In a possible implementation manner, the descrambling module 2025 is specifically configured to: generate a pseudo-random sequence according to the pseudo-random sequence polynomial; perform an XOR operation on the pseudo-random sequence to generate a descrambling polynomial; combine the descrambling polynomial with at least one second The data blocks define at least one first data block.

It should be noted that the function realized by the descrambling module 2025 is the inverse operation of the above-mentioned scrambling module 2023, and the specific implementation process of its descrambling also includes two processes of generating a pseudo-random sequence and obtaining a scrambling code through bit multiplication. The pseudo-random sequence used for descrambling is the same as the polynomial of the pseudo-random sequence used in the above scrambling process. For the specific process of implementing descrambling by the descrambling module 2025, reference may be made to the above-mentioned process of implementing scrambling by the scrambling module 2023, which will not be repeated here.

The descrambling module 2025 is also configured to send at least one first data block to the FEC decoding module 2024;

The FEC decoding module 2024 is configured to receive at least one first data block sent by the descrambling module 2025, perform FEC decoding on the at least one first data block, and combine them to obtain MAC frame data.

It should be noted that, during actual transmission, the FEC decoding module 2024 receives data including at least one first data block. The FEC decoding module 2024 is further configured to perform frame alignment and byte alignment on the received data including at least one first data block, and determine the frame header and frame length of the data, so as to obtain at least one first data block.

Exemplarily, the FEC decoding module 2024 may identify the data frame header and the data frame length in the data including at least one first data block, and parse out the at least one first data block corresponding to the MAC frame data according to the data frame length.

Wherein, the data frame header can be a fixed value. After identifying the data frame header, the FEC decoding module 2024 can detect the length of the data frame according to the position of the data frame header, and extract at least one first data from the subsequent data of the data frame header. piece.

In a possible implementation manner, the FEC decoding module 2024 includes: a Reed-Solomon RS decoder.

Wherein, the RS decoder is used for performing FEC decoding on at least one first data block and merging to obtain MAC frame data.

Exemplarily, as shown in FIG. 5 , FIG. 5 is a schematic structural diagram of an RS decoder provided in an embodiment of the present application. The RS decoder includes: adjoint calculation module, key equation solving module, Chen's (Chien) search module, Forney (Forney) algorithm module, error correction module and FIFO buffer module.

As shown in Figure 5, the decoding process of the RS decoder is as follows:

1. The syndrome calculation module calculates the syndrome for the received code group (that is, the first received data block) R(x)=C(x)+E(x), and obtains the syndrome S(X).

2. The key equation solving module calculates key equations for the adjoint matrix S(X).

Exemplarily, the key equation solving module can calculate the key equation through Berlekamp-Massey (Berlekamp-Massey) iterative algorithm to obtain the error position polynomial and the error value polynomial.

3. The Chien search module and the Forney algorithm module calculate the error pattern E(x) through the Chien search algorithm and the Forney algorithm.

4. The error correction module performs error correction through the error pattern and the received code group, and outputs the error-corrected code group (that is, the first data block after error correction) C(x).

It should be noted that the RS decoder in the embodiment of the present application adopts a pipeline architecture, which includes parallel operations of the adjoint calculation module, key equation solving module, Chien search module, Forney algorithm module, and error correction module. After a preset delay (for example, 295 natural cycles) of natural cycles (processing clock cycles), the corrected symbols of the first data block can be continuously output in each clock cycle.

The FEC decoding module 2024 is also used to send MAC frame data to the asynchronous first-in-first-out module 2021;

The asynchronous first-in-first-out module 2021 is configured to receive the MAC frame data sent by the asynchronous first-in first-out module 2021 and synchronize the MAC frame data.

The asynchronous first-in-first-out module 2021 is also configured to send the synchronized MAC frame data to the first communication unit 201 .

It should be noted that the asynchronous first-in-first-out module 2021 in the downlink transmission process and the asynchronous first-in-first-out module 2021 in the uplink transmission process may be the same module or different modules. This application is not limited to this.

As a possible implementation manner, as shown in FIG. 2 , the first communication unit 201 includes a client-side SerDes 2011 and a MAC module 2012 .

The MAC module 2012 is configured to receive the MAC frame data sent by the processing module 202, and generate Ethernet data according to the MAC frame data.

For the MAC module 2012, reference may be made to the relevant description of the MAC module 2012 in the above-mentioned uplink transmission process, which will not be repeated here.

In a possible implementation manner, the MAC module 2012 further includes a receiver.

Wherein, the receiver is used to obtain the frame data corresponding to the Ethernet data message from the gigabit medium independent interface (GMII)/media independent interface (MII), and detect whether the frame data conforms to the protocol specification, Mark the frame data received correctly or incorrectly on the receiving (RX) interface, and delete the padding field and the frame check sequence (frame check sequence, FCS) field in the frame data. In this embodiment of the application, the receiver may also reserve the FCS field.

The receiver is also used to determine the receiving state vector according to the received Ethernet data message. The receiving state vector includes: received message flag, received message length, message byte length, message byte length and received FCS error message flag.

In yet another possible implementation manner, the data transmission device 20 further includes an interface control module 204 .

Wherein, the interface control module 204 is connected with the MAC module 2012 .

The interface control module 204 is configured to send a control instruction to the MAC module 2012 .

Wherein, the control instruction includes a rate mode selection instruction and/or an interface receiving and sending enabling instruction. The rate mode selection command is used to configure the rate mode of the MAC module 2012, and the interface receiving and sending enable command is used to instruct the MAC module 2012 to perform a data receiving operation or a data sending operation.

The MAC module 2012 is also configured to send statistical data to the interface control module 204 . Correspondingly, the interface control module 204 is configured to receive statistical data sent by the MAC module 2012 .

In yet another possible implementation manner, the interface control module 204 is also connected to the processing module 202 .

The interface control module 204 is configured to send an FEC enabling instruction to the processing module 202 .

Wherein, the FEC enabling instruction is used to instruct the processing module 202 to perform an FEC codec operation.

In yet another possible implementation manner, the data transmission device 20 further includes a preset media-independent interface 2013 .

The preset media independent interface 2013 is used to connect the client-side SerDes 2011 and the MAC module 2012 .

For the preset media-independent interface 2013, reference may be made to the relevant description of the preset media-independent interface 2013 in the above-mentioned uplink transmission process, which will not be repeated here.

The MAC module 2012 is also used to send Ethernet data to the client-side SerDes 2011 .

The client-side SerDes 2011 is configured to receive the Ethernet data sent by the MAC module 2012, and perform parallel-to-serial conversion and encoding on the Ethernet data to obtain client-side data.

In a possible implementation manner, the client-side SerDes 2011 includes: a first physical medium connection sublayer PMA module 2014 , a first physical coding sublayer PCS module 2015 , and a first clock selection module 2016 .

Wherein, the first PMA module 2014 is connected with the first clock selection module 2016 , and the first PMA module 2014 is connected with the first PCS module 2015 .

For the client-side SerDes 2011, reference may be made to the related description of the client-side SerDes 2011 in the above-mentioned uplink transmission process, which will not be repeated here.

When the client-side SerDes 2011 includes a first physical medium attachment sublayer PMA module 2014, a first physical coding sublayer PCS module 2015, and a first clock selection module 2016, the preset media independent interface 2013 is specifically used to connect the first A PCS module 2015 and a MAC module 2012 .

Exemplarily, as shown in FIG. 6 , FIG. 6 is a flow chart of downlink transmission by the client-side SerDes 2011 provided in the embodiment of the present application. The first PCS module 2015 performs at least one of byte serialization synchronization and 8B/10B encoding operations on the Ethernet data, and sends the processed data to the first PMA module 2014 . Alternatively, the first PCS module 2015 may directly send the Ethernet data to the first PMA module 2014 .

The first PMA module 2014 serializes the received data to obtain client-side data.

The client-side SerDes 2011 is also used for sending client-side data.

The above is the specific implementation of the data transmission device 20 in the downlink transmission process provided by the embodiment of the present application. The second communication unit 203 of the data transmission device 20 receives the target transmission data, and performs serial-to-parallel conversion and decoding on the target transmission data to obtain at least A second data block, so that the processing module 202 can implement operations such as descrambling operations and FEC decoding on at least one second data block, thereby correcting errors that occur during the transmission of the target transmission data and improving the reliability of the transmission link . Meanwhile, the MAC module 2012 generates Ethernet data according to the MAC frame data. Afterwards, the client-side SerDes 2011 performs parallel-serial conversion and encoding on the Ethernet data, obtains the client-side data and sends it out, and realizes the data transmission function.

As a possible embodiment of this application, as shown in Figure 7, Figure 7 is a flow chart of a data transmission method provided by an embodiment of this application, which is applied to the uplink transmission process of the data transmission device shown in Figure 2 middle. The method includes the following steps:

Step 701, the data transmission device receives client-side data, and generates MAC frame data according to the client-side data.

In step 702, the data transmission device performs fixed-length slicing and forward error correction (FEC) coding on the MAC frame data to obtain at least one first data block.

Step 703: The data transmission device performs a scrambling operation on at least one first data block to obtain at least one second data block.

Step 704: The data transmission device generates target transmission data according to at least one second data block, and sends the target transmission data.

For related descriptions and beneficial effects, reference may be made to the introduction of the above-mentioned data transmission device in the uplink transmission process, which will not be repeated here.

As yet another possible embodiment of the present application, as shown in FIG. 8, FIG. 8 is a flowchart of a data transmission method provided by the embodiment of the present application, which is applied to the downlink transmission of the data transmission device shown in FIG. 2 in process. The method includes the following steps:

Step 801. The data transmission device receives target transmission data, and generates at least one second data block according to the target transmission data.

In step 802, the data transmission device performs a descrambling operation on at least one second data block to obtain at least one first data block.

In step 803, the data transmission device performs forward error correction (FEC) decoding on at least one first data block and combines them to obtain MAC frame data.

Step 804, the data transmission device generates client-side data according to the MAC frame data, and sends the client-side data.

For related descriptions and beneficial effects, reference may be made to the introduction of the above-mentioned data transmission device in the downlink transmission process, which will not be repeated here.

The embodiment of the present application can divide the data transmission device into functional modules or functional units according to the above method examples. For example, each functional module or functional unit can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above-mentioned integrated modules can be implemented in the form of hardware, or in the form of software function modules or functional units. Wherein, the division of modules or units in the embodiment of the present application is schematic, and is only a logical function division, and there may be another division manner in actual implementation.

As a possible embodiment, as shown in FIG. 9 , it is a schematic structural diagram of a data transmission device 90 provided in the embodiment of the present application. The device includes:

The communication unit 902 is configured to receive client-side data.

The processing unit 901 is configured to generate MAC frame data according to the client-side data; perform fixed-length slicing and forward error correction (FEC) encoding on the MAC frame data to obtain at least one first data block; perform scrambling operations on at least one first data block , obtaining at least one second data block; generating target transmission data according to the at least one second data block.

The communication unit 902 is also configured to send target transmission data.

As another possible embodiment, as shown in FIG. 9 , it is a schematic structural diagram of a data transmission device 90 provided in the embodiment of the present application. The device includes:

The communication unit 902 is configured to receive target transmission data.

The processing unit 901 is configured to generate at least one second data block according to the target transmission data; perform a descrambling operation on at least one second data block to obtain at least one first data block; perform forward error correction on at least one first data block FEC decodes and merges to obtain MAC frame data; generates client-side data according to the MAC frame data.

The communication unit 902 is also configured to send client-side data.

When implemented by hardware, the communication unit 902 in the embodiment of the present application may be integrated on a communication interface, and the processing unit 901 may be integrated on a processor. The specific implementation manner is shown in FIG. 10 .

Fig. 10 shows another possible structural diagram of the data transmission device involved in the above embodiment. The data transmission device includes: a processor 1002 and a communication interface 1003 . The processor 1002 is configured to control and manage the actions of the data transmission device, for example, execute the steps executed by the processing unit 901 above, and/or execute other processes of the technology described herein. The communication interface 1003 is used to support communication between the data transmission device and other network entities, for example, to perform the steps performed by the communication unit 902 above. The data transmission device may further include a memory 1001 and a bus 1004, and the memory 1001 is used to store program codes and data of the data transmission device.

Wherein, the memory 1001 may be a memory in the data transmission device, etc., and the memory may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a read-only memory, flash memory, hard disk or a solid-state hard disk; the storage may also include a combination of the above-mentioned types of storage.

The above-mentioned processor 1002 may implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of the present application. The processor may be a central processing unit, a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute the various illustrative logical blocks, modules and circuits described in connection with the present disclosure. The processor may also be a combination of computing functions, for example, a combination of one or more microprocessors, a combination of DSP and a microprocessor, and the like.

The bus 1004 may be an Extended Industry Standard Architecture (Extended Industry Standard Architecture, EISA) bus or the like. The bus 1004 can be divided into address bus, data bus, control bus and so on. For ease of representation, only one thick line is used in FIG. 10 , but it does not mean that there is only one bus or one type of bus.

The data transmission device in FIG. 10 may also be a chip. The chip includes one or more than two (including two) processors 1002 and a communication interface 1003 .

In some embodiments, the chip further includes a memory 1001 , which may include a read-only memory and a random access memory, and provides operation instructions and data to the processor 1002 . A part of the memory 1001 may also include a non-volatile random access memory (non-volatile random access memory, NVRAM).

In some implementations, the memory 1001 stores the following elements, execution modules or data structures, or their subsets, or their extended sets.

In the embodiment of the present application, corresponding operations are executed by calling the operation instructions stored in the memory 1001 (the operation instructions may be stored in the operating system).

Through the description of the above embodiments, those skilled in the art can clearly understand that for the convenience and brevity of the description, only the division of the above-mentioned functional modules is used as an example for illustration. In practical applications, the above-mentioned functions can be allocated according to needs It is completed by different functional modules, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. For the specific working process of the above-described system, device, and unit, reference may be made to the corresponding process in the foregoing method embodiments, and details are not repeated here.

An embodiment of the present application provides a computer program product including instructions, and when the computer program product is run on a computer, the computer is made to execute the data transmission method in the above method embodiment.

The embodiment of the present application also provides a computer-readable storage medium, and instructions are stored in the computer-readable storage medium, and when the instructions are run on a computer, the computer is made to perform the data transmission in the method flow shown in the above-mentioned method embodiments method.

Wherein, the computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any combination thereof. More specific examples (non-exhaustive list) of computer-readable storage media include: electrical connections with one or more wires, portable computer disks, hard disks, Random Access Memory (RAM), read-only memory (Read-Only Memory, ROM), Erasable Programmable Read-Only Memory (Erasable Programmable Read Only Memory, EPROM), Registers, Hard Disk, Optical Fiber, Portable Compact Disk Read-Only Memory (Compact Disc Read-Only Memory, CD-ROM ), an optical storage device, a magnetic storage device, or any suitable combination of the above, or any other form of computer-readable storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may be located in an application specific integrated circuit (Application Specific Integrated Circuit, ASIC). In the embodiments of the present application, a computer-readable storage medium may be any tangible medium containing or storing a program, and the program may be used by or in combination with an instruction execution system, device or device.

Since the data transmission device, computer-readable storage medium, and computer program product in the embodiments of the present application can be applied to the above-mentioned methods, the technical effects that can be obtained can also refer to the above-mentioned method embodiments, and the embodiments of the present application are hereby No longer.

In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods may be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit.

The above are only specific implementation methods of this application, but the protection scope of this application is not limited thereto. Any changes or replacements within the technical scope disclosed in this application shall be covered within the protection scope of this application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (27)

1. A data transmission device, characterized in that the data transmission device comprises: a first communication unit, a processing module, and a second communication unit; The first communication unit is configured to receive client-side data, and generate media access control MAC frame data according to the client-side data; send the MAC frame data to the processing module; The processing module is configured to receive the MAC frame data sent by the first communication unit; perform fixed-length slicing and forward error correction (FEC) coding on the MAC frame data to obtain at least one first data block; performing a scrambling operation on the at least one first data block to obtain at least one second data block; sending the at least one second data block to the second communication unit; The second communication unit is configured to receive the at least one second data block sent by the processing module, generate target transmission data according to the at least one second data block, and send the target transmission data. 2. The data transmission device according to claim 1, wherein the processing module comprises: an asynchronous first-in-first-out module, an FEC encoding module and a scrambling module; The asynchronous first-in-first-out module is configured to receive the MAC frame data sent by the first communication unit, and synchronize the MAC frame data; send the synchronized MAC frame data to the FEC encoding module; The FEC encoding module is configured to receive the synchronized MAC frame data sent by the asynchronous first-in-first-out module, and perform fixed-length slicing and FEC encoding of the synchronized MAC frame data to obtain at least one first data block; sending the at least one first data block to the scrambling module; The scrambling module is configured to receive the at least one first data block sent by the FEC encoding module, and perform a scrambling operation on the at least one first data block to obtain at least one second data block; The second communication unit sends the at least one second data block. 3. The data transmission device according to claim 2, wherein the FEC encoding module is specifically used for: Add data frame header information, frame length information and padding data to the MAC frame data, and perform fixed-length slicing to obtain at least one data block with the same data length; Encoding the at least one data block with the same data length by a preset encoding algorithm to obtain the at least one first data block. 4. The data transmission device according to claim 2, wherein the FEC encoding module comprises a Reed-Solomon RS encoder, and the RS encoder comprises: a plurality of multipliers, a plurality of adders, a plurality of registers , feedback selector, and selector switch. 5. The data transmission device according to claim 2, wherein the scrambling module is specifically used for: Generate a pseudo-random sequence based on a pseudo-random sequence polynomial; performing an XOR operation on the pseudo-random sequence to generate a scrambling polynomial; The at least one second data block is determined according to the scrambling polynomial and the at least one first data block. 6. The data transmission device according to any one of claims 1-5, wherein the first communication unit includes a client-side SerDes and a MAC module; The client-side serial deserializer is used to receive client-side data, perform serial-to-parallel conversion and decoding on the client-side data, and obtain Ethernet data; send the Ethernet data to the MAC module; The MAC module is configured to receive the Ethernet data sent by the client-side SerDes, generate MAC frame data according to the Ethernet data, and send the MAC frame data to the processing module; The second communication unit is specifically configured to perform parallel-to-serial conversion and encoding on the at least one second data block to obtain target transmission data. 7. The data transmission device according to claim 6, wherein the data transmission device further comprises an interface control module; the interface control module is connected to the MAC module; The interface control module is configured to send a control command to the MAC module; the control command includes a rate mode selection command and/or an interface receiving and sending enable command; the rate mode selection command is used to configure the MAC module Rate mode: the interface receiving and sending enabling instruction is used to instruct the MAC module to perform a data receiving operation or a data sending operation. 8. The data transmission device according to claim 7, wherein the MAC module is further configured to send statistical data to the interface control module; The interface control module is configured to receive statistical data sent by the MAC module. 9. The data transmission device according to claim 7, wherein the interface control module is also connected to the processing module; The interface control module is configured to send an FEC enabling instruction to the processing module; the FEC enabling instruction is used to instruct the processing module to perform an FEC codec operation. 10. The data transmission device according to claim 6, characterized in that, the data transmission device further comprises a preset media-independent interface; The preset media-independent interface is used to connect the client-side SerDes and the MAC module. 11. The data transmission device according to claim 6, wherein the client side serial deserializer comprises: a first physical medium connection sublayer PMA module, a first physical coding sublayer PCS module and a first clock A selection module; the first PMA module is connected to the first clock selection module; the first PMA module is connected to the first PCS module. 12. The data transmission device according to claim 11, characterized in that, the data transmission device further comprises a preset media-independent interface; The preset media independent interface is used to connect the first PCS module and the MAC module. 13. The data transmission device according to any one of claims 1-5, wherein the second communication unit comprises: a second physical medium connection sublayer PMA module, a second physical coding sublayer PCS module, and a second physical coding sublayer PCS module. Two clock selection modules; the second PMA module is connected to the second clock selection module; the second PMA module is connected to the second PCS module. 14. A data transmission device, characterized in that the data transmission device comprises: a first communication unit, a processing module, and a second communication unit; The second communication unit is configured to receive target transmission data, and generate at least one second data block according to the target transmission data; send the at least one second data block to the processing module; The processing module is configured to receive the at least one second data block sent by the second communication unit; perform a descrambling operation on the at least one second data block to obtain at least one first data block; performing forward error correction (FEC) decoding on at least one first data block and merging to obtain medium access control MAC frame data; sending the MAC frame data to the first communication unit; The first communication unit is configured to receive the MAC frame data sent by the processing module, generate client-side data according to the MAC frame data, and send the client-side data. 15. The data transmission device according to claim 14, wherein the processing module comprises: an asynchronous first-in-first-out module, an FEC decoding module, and a descrambling module; The descrambling module is configured to receive the at least one second data block sent by the second communication unit; perform a descrambling operation on the at least one second data block to obtain at least one first data block; The FEC decoding module sends the at least one first data block; The FEC decoding module is configured to receive the at least one first data block sent by the descrambling module, perform FEC decoding on the at least one first data block and combine them to obtain the MAC frame data; The asynchronous first-in-first-out module sends the MAC frame data; The asynchronous first-in-first-out module is used to receive the MAC frame data sent by the asynchronous first-in first-out module, and synchronize the MAC frame data; send the synchronized MAC frame data to the first communication unit . 16. The data transmission device according to claim 15, wherein the FEC decoding module comprises: a Reed-Solomon RS decoder; The RS decoder is configured to perform FEC decoding on the at least one first data block and combine them to obtain the MAC frame data. 17. The data transmission device according to claim 15, wherein the descrambling module is specifically used for: Generate a pseudo-random sequence based on a pseudo-random sequence polynomial; performing an XOR operation on the pseudo-random sequence to generate a descrambling polynomial; The at least one first data block is determined according to the descrambling polynomial and the at least one second data block. 18. The data transmission device according to any one of claims 14-17, wherein the first communication unit includes a client-side SerDes and a MAC module; The MAC module is configured to receive the MAC frame data sent by the processing module, and generate Ethernet data according to the MAC frame data; send the Ethernet data to the client-side SerDes; The client-side serial deserializer is used to receive the Ethernet data sent by the MAC module, and perform parallel-to-serial conversion and encoding on the Ethernet data to obtain client-side data; send the client-side data ; The second communication unit is specifically configured to perform serial-to-parallel conversion and decoding on the target transmission data to obtain at least one second data block. 19. The data transmission device according to claim 18, wherein the data transmission device further comprises an interface control module; the interface control module is connected to the MAC module; The interface control module is configured to send a control command to the MAC module; the control command includes a rate mode selection command and/or an interface receiving and sending enable command; the rate mode selection command is used to configure the MAC module Rate mode: the interface receiving and sending enabling instruction is used to instruct the MAC module to perform a data receiving operation or a data sending operation. 20. The data transmission device according to claim 19, wherein the MAC module is further configured to send statistical data to the interface control module; The interface control module is configured to receive statistical data sent by the MAC module. 21. The data transmission device according to claim 19, wherein the interface control module is also connected to the processing module; The interface control module is configured to send an FEC enabling instruction to the processing module; the FEC enabling instruction is used to instruct the processing module to perform an FEC codec operation. 22. The data transmission device according to claim 18, characterized in that, the data transmission device further comprises a preset media-independent interface; The preset media-independent interface is used to connect the client-side SerDes and the MAC module. 23. The data transmission device according to claim 18, wherein the client-side SerDes includes: a first physical medium connection sublayer PMA module, a first physical coding sublayer PCS module, and a first clock A selection module; the first PMA module is connected to the first clock selection module; the first PMA module is connected to the first PCS module. 24. The data transmission device according to claim 23, characterized in that, the data transmission device further comprises a preset media-independent interface; The preset media independent interface is used to connect the first PCS module and the MAC module. 25. The data transmission device according to any one of claims 14-17, wherein the second communication unit comprises: a second physical medium connection sublayer PMA module, a second physical coding sublayer PCS module, and a second physical coding sublayer PCS module. Two clock selection modules; the second PMA module is connected to the second clock selection module; the second PMA module is connected to the second PCS module. 26. A data transmission method, comprising: receiving client-side data, and generating MAC frame data according to the client-side data; performing fixed-length slicing and forward error correction (FEC) encoding on the MAC frame data to obtain at least one first data block; performing a scrambling operation on the at least one first data block to obtain at least one second data block; generating target transmission data according to the at least one second data block, and sending the target transmission data. 27. A data transmission method, comprising: receiving target transmission data, and generating at least one second data block according to the target transmission data; performing a descrambling operation on the at least one second data block to obtain at least one first data block; performing FEC decoding on the at least one first data block and merging to obtain MAC frame data; Generate client-side data according to the MAC frame data, and send the client-side data.

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