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CN115470141A - Fault simulation method, device and related equipment - Google Patents

Fault simulation method, device and related equipment Download PDF

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Publication number
CN115470141A
CN115470141A CN202211199507.5A CN202211199507A CN115470141A CN 115470141 A CN115470141 A CN 115470141A CN 202211199507 A CN202211199507 A CN 202211199507A CN 115470141 A CN115470141 A CN 115470141A
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China
Prior art keywords
fault
simulation
loading
link library
dynamic link
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Pending
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CN202211199507.5A
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Chinese (zh)
Inventor
汤洪亮
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Sangfor Technologies Co Ltd
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Sangfor Technologies Co Ltd
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Priority to CN202211199507.5A priority Critical patent/CN115470141A/en
Publication of CN115470141A publication Critical patent/CN115470141A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3684Test management for test design, e.g. generating new test cases
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3688Test management for test execution, e.g. scheduling of test suites

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The application discloses a fault simulation method, which comprises the following steps: loading a dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulatable faults; acquiring user configuration information, and determining target simulation fault information according to the user configuration information; calling and obtaining a target simulation fault corresponding to the target simulation fault information from the dynamic link library; and injecting the target simulation fault into the process to be tested. By applying the technical scheme provided by the application, fault injection can be realized under the condition that the normal operation of the process is not influenced, so that the reliability monitoring, recovery and other capabilities of the process in the product can be verified, the rapid and efficient process-level fault simulation is realized, and the reliability test and the automatic test of product equipment are more favorably realized. The application also discloses a fault simulation device, a system and a computer readable storage medium, which have the beneficial effects.

Description

Fault simulation method, device and related equipment
Technical Field
The present application relates to the field of device performance detection technologies, and in particular, to a fault simulation method, a fault simulation apparatus, a fault simulation system, and a computer-readable storage medium.
Background
In the performance test process of product equipment, the reliability of the product needs to be evaluated through some fault scenario tests, and in order to complete the test needs, fault simulation needs to be performed on processes in the equipment. In the related technology, methods such as kill dropping a process, making the process stop or changing the state of the process in a kernel mode are mainly used, but the methods all belong to faults of the periphery of the process, and most process level faults cannot be simulated; another method is to modify an execution function by replacing the function with a function container or ptrace (a debugging function) to simulate a process fault, but this method is not suitable for all programming languages, and different programming languages need to be implemented again, and different functions also need to modify codes again, and compilation can be performed, so that the method is inefficient, and is not beneficial to implementing reliability test and automation test.
Therefore, how to implement fast and efficient process-level fault simulation so as to implement reliability test and automation test of product equipment is an urgent problem to be solved by those skilled in the art.
Disclosure of Invention
The purpose of the application is to provide a fault simulation method, which can realize rapid and efficient process-level fault simulation so as to conveniently realize the reliability test and the automatic test of product equipment; another object of the present application is to provide a fault simulation apparatus, system and computer readable storage medium, all having the above advantages.
In a first aspect, the present application provides a fault simulation method, including:
loading a dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulatable faults;
acquiring user configuration information, and determining target simulation fault information according to the user configuration information;
calling and obtaining a target simulation fault corresponding to the target simulation fault information from the dynamic link library;
and injecting the target simulation fault into the process to be tested.
Preferably, the loading the dynamic link library according to the fault injection instruction includes:
determining the process to be tested according to the fault injection instruction;
when the process to be tested is in a running state, loading the dynamic link library in a dynamic loading mode;
and when the process to be tested is not in the running state, loading the dynamic link library in a static loading mode.
Preferably, the loading the dynamic link library in a dynamic loading manner includes:
and loading the dynamic link library through a debugging tool GDB.
Preferably, the loading the dynamic link library in a static loading manner includes:
and when a process starting signal is received, loading the dynamic link library according to the process starting signal.
Preferably, the acquiring the user configuration information includes:
determining a storage path of a user profile;
and reading the user configuration information from the user configuration file according to the storage path.
Preferably, the fault simulation method further includes:
and when a fault recovery instruction is received, clearing the target simulation fault from the tested process.
Preferably, before the loading the dynamic link library according to the fault injection instruction, the method further includes:
receiving a kill signal;
responding to the fault injection instruction when the kill signal is 1;
and responding to the fault recovery instruction when the kill signal is 0.
In a second aspect, the present application also discloses a fault simulation apparatus, including:
the link library loading module is used for loading the dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulatable faults;
the simulation fault determination module is used for acquiring user configuration information and determining target simulation fault information according to the user configuration information;
the simulation fault calling module is used for calling and obtaining a target simulation fault corresponding to the target simulation fault information from the dynamic link library;
and the simulated fault injection module is used for injecting the target simulated fault into the tested process.
In a third aspect, the present application further discloses a fault simulation system, including:
a memory for storing a computer program;
a processor for implementing the steps of any of the fault simulation methods described above when executing the computer program.
In a fourth aspect, the present application also discloses a computer readable storage medium having stored thereon a computer program which, when executed by a processor, carries out the steps of any of the fault simulation methods described above.
The application provides a fault simulation method, which comprises the following steps: loading a dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulatable faults; acquiring user configuration information, and determining target simulation fault information according to the user configuration information; calling and obtaining a target simulation fault corresponding to the target simulation fault information from the dynamic link library; and injecting the target simulation fault into the process to be tested.
Therefore, the fault simulation method provided by the application can be used for creating a dynamic link library for storing various simulative faults in advance, directly loading the dynamic link library when the fault simulation is needed, simultaneously calling actually required target simulation faults from the dynamic link library by combining with user configuration information, injecting the target simulation faults into a tested process, realizing the fault injection, and further completing the fault simulation.
The fault simulation device, the fault simulation system and the computer readable storage medium provided by the application all have the beneficial effects, and are not repeated herein.
Drawings
In order to more clearly illustrate the technical solutions in the prior art and the embodiments of the present application, the drawings that are needed to be used in the description of the prior art and the embodiments of the present application will be briefly described below. Of course, the following description of the drawings related to the embodiments of the present application is only a part of the embodiments of the present application, and it will be obvious to those skilled in the art that other drawings can be obtained from the provided drawings without any creative effort, and the obtained other drawings also belong to the protection scope of the present application.
Fig. 1 is a schematic flow chart of a fault simulation method provided in the present application;
fig. 2 is a schematic structural diagram of a fault simulation apparatus provided in the present application;
fig. 3 is a schematic structural diagram of a fault simulation system provided in the present application.
Detailed Description
The core of the application is to provide a fault simulation method, which can realize rapid and efficient process-level fault simulation so as to realize reliability test and automatic test of product equipment; another core of the present application is to provide a fault simulation apparatus, a system and a computer readable storage medium, which also have the above beneficial effects.
In order to more clearly and completely describe the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. It should be apparent that the described embodiments are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the performance test process of product equipment, the reliability of the product needs to be evaluated through some fault scenario tests, and in order to complete the test needs, fault simulation needs to be performed on processes in the equipment. In the related technology, methods such as kill dropping a process, making the process stop or changing the state of the process in a kernel mode are mainly used, but the methods all belong to faults of the periphery of the process, and most process level faults cannot be simulated; another method is to modify an execution function by replacing the function with a function container or ptrace (a debugging function) to simulate a process fault, but this method is not suitable for all programming languages, and different programming languages need to be implemented again, and different functions also need to modify codes again, and compilation can be performed, so that the method is inefficient, and is not beneficial to implementing reliability test and automation test.
Therefore, in order to solve the above technical problems, the present application provides a fault simulation method, wherein a dynamic link library for storing various types of simulatable faults is created in advance, and when fault simulation is required, the dynamic link library can be directly loaded, and simultaneously, a target simulation fault actually required is called from the dynamic link library by combining with user configuration information, and is injected into a tested process to realize fault injection, so as to complete fault simulation.
The embodiment of the application provides a fault simulation method.
Referring to fig. 1, fig. 1 is a schematic flow chart of a fault simulation method provided in the present application, where the fault simulation method includes:
s101: loading a dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulative faults;
the step aims to realize the loading of a dynamic link library, wherein the dynamic link library is used for storing various databases capable of simulating faults. Specifically, a technician performing the fault simulation operation may count various types of faults to be simulated in advance, and generate the dynamic link library through source code compiling, so that when the fault simulation is required, the dynamic link library may be directly loaded and obtained according to the received fault injection instruction.
The dynamic link library can be specifically a so library, namely, various simulative faults can be stored in the so library in the form of so files. In addition, to implement fault simulation, the tested process should match the bit number of the so library, i.e. when the tested process is 32 bits, the so library should also be 32 bits, and when the tested process is 64 bits, the so library should also be 64 bits.
The fault injection instruction is an instruction for injecting a fault to be simulated, that is, a target simulation fault to be described below, into a process to be tested, so as to implement fault simulation, and the fault injection instruction may be initiated by a technician performing fault simulation operation based on a corresponding terminal device, or may automatically respond based on a preset trigger condition (such as a timing condition, a process starting condition, and the like), that is, an obtaining manner of the fault injection instruction is not unique, and the present application does not limit this.
S102: acquiring user configuration information, and determining target simulation fault information according to the user configuration information;
the step aims to realize the determination of target simulation fault information, wherein the target simulation fault information is the relevant information of the process-level fault needing to be simulated. Specifically, a user-defined configuration function may be preset, so that a technician may set, in a user-defined manner, information related to various types of faults to be simulated, including but not limited to a fault type, a fault name, various parameters for realizing corresponding fault simulation, and the like, according to actual requirements, thereby generating the user configuration information. For example, taking simulation of a process-level memory leak fault as an example, the corresponding parameters for implementing the fault simulation may include a memory to which the process belongs, a memory leak amount, and the like. On the basis, the master controller can determine target simulation fault information through the acquired user configuration information.
It can be understood that the implementation manner of the user-defined configuration function is not unique, that is, the obtaining manner of the user configuration information is not unique, for example, a technician may directly input the user configuration information through a terminal interface, or may create a user configuration file in advance, and store the configuration information in the user configuration file in advance, so as to obtain the user configuration information by reading the user configuration file, which is not limited in this application.
S103: calling a target simulation fault corresponding to the obtained target simulation fault information from the dynamic link library;
the method comprises the steps of obtaining target simulation fault information, and directly obtaining the target simulation fault corresponding to the target simulation fault information from a dynamic link library after the target simulation fault information is determined based on user configuration information. It can be understood that the number of target simulation faults does not affect the implementation of the present technical solution, and may be one or multiple, and specifically may be set by a technician according to an actual requirement when inputting user configuration information, which is not limited in this application.
S104: and injecting the target simulation fault into the process to be tested.
The target simulation fault is injected into the tested process so as to realize fault simulation, the target simulation fault can be injected into the tested process after the target simulation fault is obtained by calling from the dynamic link library, and the tested process is only a process needing fault simulation, so that the injection of the target simulation fault into the tested process can be realized, and the fault simulation is realized. The injecting of the target simulation fault into the tested process can be implemented based on a corresponding fault injection function, such as a fault _ func fault injection function.
It should be noted that the fault simulation method provided by the present application is mainly used for implementing process-level fault simulation, where types of process-level faults to be simulated are diversified, including but not limited to a process dead loop fault, a process-level handle exhaustion fault, a process-level memory leak fault, a thread exception exit fault, and the like.
Therefore, the fault simulation method provided by the application can be used for creating a dynamic link library for storing various simulative faults in advance, directly loading the dynamic link library when the fault simulation is needed, simultaneously calling actually required target simulation faults from the dynamic link library by combining with user configuration information, injecting the target simulation faults into a tested process, realizing the fault injection, and further completing the fault simulation.
In an embodiment of the application, the loading the dynamic link library according to the fault injection instruction may include: determining a process to be tested according to the fault injection instruction; when the process to be tested is in the running state, loading a dynamic link library in a dynamic loading mode; and when the tested process is not in the running state, loading the dynamic link library in a static loading mode.
The embodiment of the application provides a method for loading a dynamic link library, which can realize the loading of the dynamic link library by adopting different loading modes aiming at the tested processes in different running states. Specifically, when a fault injection instruction is initiated, related information (such as a process name, a process ID, and the like) of a process (i.e., a process to be tested) to be subjected to fault simulation may be added to the fault injection instruction in advance, so that the main controller may determine the process to be tested through instruction analysis after receiving the fault injection instruction; further, the current state of the process to be tested is obtained, if the process to be tested is in the running state, a dynamic link library loading mode can be adopted, and if the process to be tested is not in the running state, a static link library loading mode can be adopted. It can be understood that, when the process under test is in the running state, the dynamic loading mode can be adopted to enable the process under test in the running state to be temporarily stopped, so that the dynamic link library is loaded to the process under test.
In an embodiment of the application, the loading the dynamic link library in the dynamic loading manner may include: the dynamic link library is loaded by the debugging tool GDB.
The embodiment of the application provides an implementation mode for dynamically loading a dynamic link library, which can be implemented based on a debugging tool GDB, so that the dynamic link library is dynamically loaded to a tested process in a running state. The GDB is a debugging tool under UNIX and UNIX-like, and can dynamically change the execution environment of the program. Certainly, the GDB is only one implementation manner provided in the embodiment of the present application, and is not unique, for example, the GDB may also be implemented by using a SOCKET as a debugging tool, but the GDB has the advantages of being simple, easy to understand, and more efficient than the SOCKET.
In an embodiment of the application, the loading the dynamic link library in the static loading manner may include: and when a process starting signal is received, loading the dynamic link library according to the process starting signal.
The embodiment of the application provides an implementation mode for statically loading a dynamic link library, namely the implementation mode can be realized by responding to a process starting signal so as to statically load the dynamic link library to a tested process which is not in a running state. The process starting signal is a signal for notifying the start of the tested process to enter the running state. Of course, the process start signal is only one implementation manner provided in the embodiment of the present application, and is not unique, and may also be implemented by setting other types of environment variables, which is not limited in the present application.
In an embodiment of the application, the obtaining of the user configuration information may include: determining a storage path of a user profile; and reading the user configuration information from the user configuration file according to the storage path.
The embodiment of the application provides an implementation method for obtaining user configuration information, namely the implementation method can be realized by reading a user configuration file. Specifically, a technician may create a user profile in advance and store the user profile in a corresponding storage path, and may set various types of user profile information in the user profile according to actual requirements, so that when fault simulation needs to be performed, the master controller may determine the storage path of the user profile first, and then obtain the user profile information from the user profile in the storage path.
Of course, the implementation manner of obtaining the user configuration information by reading the user configuration file is only one implementation manner provided in the embodiment of the present application, and is not unique, and may also be implemented based on other manners, for example, the user configuration information may be obtained based on the debugging tool GDB described above, or the user configuration information may be obtained by a technician directly inputting the user configuration information based on a terminal interface.
In an embodiment of the present application, the fault simulation method may further include: and when a fault recovery instruction is received, clearing the target simulation fault from the tested process.
The fault simulation method provided by the embodiment of the application can further realize fault recovery, namely after the target simulation fault is injected into the tested process and the fault simulation is completed, the target simulation fault can be removed from the tested process through the fault recovery instruction, namely the tested process is restored. It can be understood that the fault recovery instruction is similar to the fault injection instruction, and may be initiated by a technician performing the fault simulation operation based on the corresponding terminal device, or may automatically respond based on a preset trigger condition (such as a timing condition, a process starting condition, and the like), that is, the obtaining manner of the fault recovery instruction is not unique, which is not limited in this application.
Certainly, besides the fault injection instruction and the fault recovery instruction, the fault injection query can be realized through the fault query instruction, so that the verification and the inspection of technicians in the fault simulation process are facilitated, and the reliability test or the automatic test is more facilitated.
In an embodiment of the application, before the loading the dynamic link library according to the fault injection instruction, the method may further include: receiving a kill signal; when the kill signal is 1, responding to a fault injection instruction; when the kill signal is 0, a fail-over instruction is responded.
The embodiment of the application provides various instructions related to fault simulation in a specific type, namely corresponding instruction definition can be performed on kill signals in a Linux system. Specifically, a technician may send out a kill signal through a kill command, and define different types of fault instructions by defining a value of the kill signal, in this embodiment, when the value of the kill signal is 1, a fault injection command may be automatically responded, and when the value of the kill signal is 0, a fault recovery command may be automatically responded.
The kill signal refers to events that are sent asynchronously to a program, which by default will typically terminate the operation of a program. At present, 64 kill signals in a general Linux system can be divided into reliable signals and unreliable signals, wherein the first 31 signals are reliable signals, 32-64 signals are unreliable signals, and the user1 or the user2 can be selected from the first 31 signals for instruction definition, because others are already defined by the system, but since the two signals are sometimes used by products, one or more signals from the 32-64 signals can also be used for instruction definition. For example, different instructions may be defined by different kill signals, or different instructions may be defined by the same kill signal or different values as described above.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a fault simulation apparatus provided in the present application, where the fault simulation apparatus may include:
the link library loading module 1 is used for loading the dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulative faults;
the simulation fault determining module 2 is used for acquiring user configuration information and determining target simulation fault information according to the user configuration information;
the simulation fault calling module 3 is used for calling a target simulation fault corresponding to the obtained target simulation fault information from the dynamic link library;
and the simulated fault injection module 4 is used for injecting the target simulated fault into the process to be tested.
It can be seen that, the fault simulation apparatus provided in the embodiment of the present application creates a dynamic link library for storing various types of simulative faults in advance, and when fault simulation is required, the dynamic link library can be directly loaded, and meanwhile, a target simulation fault actually required is called from the dynamic link library by combining with user configuration information, and is injected into a process to be tested, so as to implement fault injection, and further complete fault simulation.
In an embodiment of the present application, the above-mentioned link library loading module 1 may include:
the device comprises a tested process determining unit, a fault detecting unit and a fault detecting unit, wherein the tested process determining unit is used for determining a tested process according to a fault injection instruction;
the dynamic loading unit is used for loading the dynamic link library in a dynamic loading mode when the process to be tested is in the running state;
and the static loading unit is used for loading the dynamic link library in a static loading mode when the process to be tested is not in the running state.
In an embodiment of the present application, the dynamic loading unit may be specifically configured to load a dynamic link library through a debugging tool GDB.
In an embodiment of the application, the static loading unit may be specifically configured to load the dynamic link library according to a process starting signal when the process starting signal is received.
In an embodiment of the present application, the simulated fault determining module 2 may be specifically configured to determine a storage path of a user profile; and reading the user configuration information from the user configuration file according to the storage path.
In an embodiment of the present application, the apparatus may further include a failure recovery module, configured to clear the target simulated failure from the process under test when the failure recovery instruction is received.
In an embodiment of the present application, the apparatus may further include an instruction identification module, configured to receive a kill signal before the dynamic link library is loaded according to the fault injection instruction; when the kill signal is 1, responding to a fault injection instruction; when the kill signal is 0, a fail-over instruction is responded.
For the introduction of the apparatus provided in the present application, please refer to the above method embodiments, which are not described herein again.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a fault simulation system provided in the present application, where the fault simulation system may include:
a memory for storing a computer program;
a processor, when executing a computer program, may implement the steps of any of the above described fault simulation system methods.
As shown in fig. 3, a schematic diagram of a component structure of a fault simulation system, the fault simulation system may include: a processor 10, a memory 11, a communication interface 12 and a communication bus 13. The processor 10, the memory 11 and the communication interface 12 all communicate with each other through a communication bus 13.
In the embodiment of the present application, the processor 10 may be a Central Processing Unit (CPU), an application specific integrated circuit, a digital signal processor, a field programmable gate array or other programmable logic device, etc.
The processor 10 may call a program stored in the memory 11, and in particular, the processor 10 may perform operations in an embodiment of the fault simulation method.
The memory 11 is used for storing one or more programs, the program may include program codes, the program codes include computer operation instructions, in this embodiment, the memory 11 stores at least the program for implementing the following functions:
loading a dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulative faults;
acquiring user configuration information, and determining target simulation fault information according to the user configuration information;
calling a target simulation fault corresponding to the obtained target simulation fault information from the dynamic link library;
and injecting the target simulation fault into the process to be tested.
In one possible implementation, the memory 11 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function, and the like; the storage data area may store data created during use.
Further, the memory 11 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device or other volatile solid state storage device.
The communication interface 12 may be an interface of a communication module for connecting with other devices or systems.
It should be noted, of course, that the structure shown in fig. 3 does not constitute a limitation to the fault simulation system in the embodiment of the present application, and the fault simulation system may include more or less components than those shown in fig. 3, or some components may be combined in practical applications.
The present application also provides a computer readable storage medium having a computer program stored thereon, which when executed by a processor, is capable of implementing the steps of any one of the above-described fault simulation methods.
The computer-readable storage medium may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, an optical disk, or other various media capable of storing program codes.
For the introduction of the computer-readable storage medium provided in the present application, please refer to the above method embodiments, which are not described herein again.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The technical solutions provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall into the protection scope of the present application.

Claims (10)

1. A method of fault simulation, comprising:
loading a dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulatable faults;
acquiring user configuration information, and determining target simulation fault information according to the user configuration information;
calling and obtaining a target simulation fault corresponding to the target simulation fault information from the dynamic link library;
and injecting the target simulation fault into the process to be tested.
2. The fault simulation method of claim 1, wherein loading the dynamically linked library according to the fault injection instruction comprises:
determining the process to be tested according to the fault injection instruction;
when the process to be tested is in a running state, loading the dynamic link library in a dynamic loading mode;
and when the process to be tested is not in the running state, loading the dynamic link library in a static loading mode.
3. The method according to claim 2, wherein the loading the dynamically linked library by a dynamic loading manner includes:
and loading the dynamic link library through a debugging tool GDB.
4. The method according to claim 2, wherein the loading the dynamically linked library by the static loading manner includes:
and when a process starting signal is received, loading the dynamic link library according to the process starting signal.
5. The method of claim 1, wherein the obtaining user configuration information comprises:
determining a storage path of a user profile;
and reading the user configuration information from the user configuration file according to the storage path.
6. The fault simulation method of claim 1, further comprising:
and when a fault recovery instruction is received, clearing the target simulation fault from the tested process.
7. The fault simulation method according to claim 6, wherein before loading the dynamically linked library according to the fault injection instruction, the method further comprises:
receiving a kill signal;
responding to the fault injection instruction when the kill signal is 1;
and responding to the fault recovery instruction when the kill signal is 0.
8. A fault simulation device, comprising:
the link library loading module is used for loading the dynamic link library according to the fault injection instruction; the dynamic link library is used for storing various simulatable faults;
the simulation fault determining module is used for acquiring user configuration information and determining target simulation fault information according to the user configuration information;
the simulation fault calling module is used for calling and obtaining a target simulation fault corresponding to the target simulation fault information from the dynamic link library;
and the simulated fault injection module is used for injecting the target simulated fault into the tested process.
9. A fault simulation system, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the fault simulation method as claimed in any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of the fault simulation method according to one of the claims 1 to 7.
CN202211199507.5A 2022-09-29 2022-09-29 Fault simulation method, device and related equipment Pending CN115470141A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
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CN116520270A (en) * 2023-07-04 2023-08-01 四川天中星航空科技有限公司 Radar electronic warfare testing method based on evaluation model
CN118467256A (en) * 2024-07-15 2024-08-09 济南浪潮数据技术有限公司 Method, device, medium and product for recovering business faults of clusters

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116520270A (en) * 2023-07-04 2023-08-01 四川天中星航空科技有限公司 Radar electronic warfare testing method based on evaluation model
CN116520270B (en) * 2023-07-04 2023-09-05 四川天中星航空科技有限公司 Radar electronic warfare testing method based on evaluation model
CN118467256A (en) * 2024-07-15 2024-08-09 济南浪潮数据技术有限公司 Method, device, medium and product for recovering business faults of clusters
CN118467256B (en) * 2024-07-15 2024-09-06 济南浪潮数据技术有限公司 Method, device, medium and product for recovering business faults of clusters

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