CN115458394A - Ultrathin wafer ion implantation process - Google Patents
Ultrathin wafer ion implantation process Download PDFInfo
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- CN115458394A CN115458394A CN202211209411.2A CN202211209411A CN115458394A CN 115458394 A CN115458394 A CN 115458394A CN 202211209411 A CN202211209411 A CN 202211209411A CN 115458394 A CN115458394 A CN 115458394A
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- ultrathin wafer
- carbon deposition
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- 238000005468 ion implantation Methods 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 title claims abstract description 30
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 65
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 40
- 230000008021 deposition Effects 0.000 claims abstract description 28
- 229910002804 graphite Inorganic materials 0.000 claims abstract description 25
- 239000010439 graphite Substances 0.000 claims abstract description 25
- 239000011261 inert gas Substances 0.000 claims abstract description 18
- 238000001020 plasma etching Methods 0.000 claims description 8
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 6
- 238000000576 coating method Methods 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 5
- 238000010329 laser etching Methods 0.000 claims description 5
- 238000010884 ion-beam technique Methods 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000001307 helium Substances 0.000 claims description 3
- 229910052734 helium Inorganic materials 0.000 claims description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- 235000012431 wafers Nutrition 0.000 claims 24
- 238000001556 precipitation Methods 0.000 claims 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 2
- 150000002500 ions Chemical class 0.000 description 17
- 238000005530 etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 241001391944 Commicarpus scandens Species 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6835—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
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- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
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- Physical Vapour Deposition (AREA)
Abstract
The invention relates to the technical field of wafer ion implantation, and particularly discloses an ultrathin wafer ion implantation process, which comprises the following steps: s1, temporarily adsorbing and fixing the ultrathin wafer by using a graphite carrier plate with air holes; s2, bonding and fixing the ultrathin wafer and the graphite carrier plate, and forming a carbon deposition layer at the edge of the ultrathin wafer; s3, forming holes in the carbon deposition layer at the edge of the ultrathin wafer; s4, fixing the ultrathin wafer in the ion implanter by using a supporting plate with a clamping jaw; and S5, completing the ion implantation of the ultrathin wafer in a vacuum environment continuously introducing inert gas. According to the ion implantation process, before ion implantation, the ultrathin wafer is bonded and fixed on the graphite carrier plate by utilizing carbon deposition treatment, then the whole wafer is placed into an ion implanter, inert gases except nitrogen are continuously supplied by utilizing an air inlet channel to add the wafer, and ion implantation is carried out by utilizing an ion generator, so that the actual processing process is reliable, and the yield is high.
Description
Technical Field
The invention relates to the technical field of wafer ion implantation, in particular to an ultrathin wafer ion implantation process.
Background
Wafer ion implantation techniques utilize the implantation of dopants in the form of ions into certain regions of the wafer to obtain precise electronic characteristics.
The prior art discloses an invention with the application number of CN202011577908.0, which is named as an ion implanter and an ion implantation system, wherein, after a wafer is directly loaded and fixed, an ion beam emitted by ions is bombarded on the wafer to carry out specific ion implantation treatment.
However, in the prior art, the operation of directly loading and fixing the wafer on the ion implantation equipment cannot be applied to the ultra-thin wafer, and the ultra-thin wafer is directly loaded and fixed, so that on one hand, the fixation is inconvenient, and the fixing operation is troublesome; on the other hand, after the direct fixation, the ultrathin wafer is easy to break and the defective rate is high during the subsequent ion implantation.
Disclosure of Invention
The present invention is directed to a solution to the problems of the prior art.
The purpose of the invention can be realized by the following technical scheme:
an ultra-thin wafer ion implantation process, comprising:
s1, temporarily adsorbing and fixing the ultrathin wafer by using a graphite carrier plate with air holes.
And S2, bonding and fixing the ultrathin wafer and the graphite carrier plate, and forming a carbon deposition layer at the edge of the ultrathin wafer.
And S3, forming holes in the carbon deposition layer at the edge of the ultrathin wafer.
And S4, fixing the ultrathin wafer in the ion implanter by using the supporting plate with the clamping jaws.
And S5, completing the ion implantation of the ultrathin wafer in a vacuum environment continuously introducing inert gas.
Furthermore, the bonding and fixing of the ultrathin wafer and the graphite carrier plate are realized through carbon deposition treatment.
Further, the carbon settling treatment comprises the following steps:
s2.1, coating a carbon layer on the ultrathin wafer and wrapping the ultrathin wafer;
s2.2, coating photoresist at the edge of the ultrathin wafer;
and S2.3, removing the carbon layer on the front surface of the ultrathin wafer by using a laser or plasma etching mode, leaving the carbon layer on the edge of the ultrathin wafer, and forming a carbon deposition layer for fixing the ultrathin wafer and the graphite carrier plate.
Further, the opening of the carbon deposition layer includes: etching the carbon deposition layer at the edge of the ultrathin wafer by using a laser or plasma etching or oxygen plasma etching mode, and forming at least two exhaust holes on the carbon deposition layer for exhausting gas between the ultrathin wafer and the graphite carrier plate.
Further, the clamping jaw on the supporting plate is fixedly attached to the carbon deposition layer, and an air inlet channel is arranged on the supporting plate and used for communicating with an air hole of the graphite support plate and supplying inert gas.
Further, the inert gas comprises helium and argon.
Further, the temperature of the inert gas is at least 500 ℃.
Further, S5 includes: and utilizing an ion generator to spray plasma towards the front surface of the ultrathin wafer to form ion beams, and carrying out ion implantation on the ultrathin wafer.
The invention has the beneficial effects that:
1. before ion implantation, firstly, bonding and fixing an ultrathin wafer on a graphite carrier plate by utilizing carbon deposition treatment, then integrally placing the ultrathin wafer into an ion implanter, continuously supplying inert gas except nitrogen by utilizing an air inlet channel, adding the wafer, and carrying out ion implantation by utilizing an ion generator;
2. the ion implantation process has the advantages that the heating temperature is at least 500 ℃, the breakage fault cannot happen when the ultrathin wafer is implanted, the ultrathin wafer bonding operation is convenient, the actual processing process is reliable, and the yield is high.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a schematic process flow diagram of S1 and S2 of the ion implantation process of the present invention;
FIG. 2 is a schematic view of the process flow of S3 of the ion implantation process of the present invention;
FIG. 3 is a schematic view of the process flow of S4 of the ion implantation process of the present invention;
FIG. 4 is a schematic view of the process flow S5 of the ion implantation process of the present invention;
fig. 5 is a schematic view of an inert gas exhaust position for the ion implantation process of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An ion implantation process of an ultrathin wafer, wherein the ultrathin wafer 1 comprises an ultrathin silicon carbide wafer and an ultrathin silicon nitride wafer, and the ion implantation process comprises the following steps:
as shown in fig. 1, S1, the surface of the ultra-thin wafer 1 is attached to the graphite carrier plate 2, and the ultra-thin wafer 1 is adsorbed and fixed through the air holes on the graphite carrier plate 2.
And S2, performing carbon deposition treatment on the ultrathin wafer 1, forming a carbon deposition layer 3 on the edge of the ultrathin wafer 1, and fixing the ultrathin wafer 1.
In this embodiment, the carbon deposition process: coating a carbon layer on the ultrathin wafer 1 to wrap the ultrathin wafer 1, coating photoresist on the edge of the ultrathin wafer 1, etching the carbon layer on the front surface of the ultrathin wafer 1 by using laser or plasma, removing the carbon layer on the front surface, leaving a carbon deposition layer 3 on the edge of the ultrathin wafer 1, and bonding and fixing the ultrathin wafer 1 and the graphite carrier plate 2.
As shown in fig. 2, S3, a hole is formed in the carbon deposition layer 3 of the ultra-thin wafer 1, and at least two exhaust holes 4 are formed in the edge of the ultra-thin wafer 1.
In this embodiment, the opening of the carbon deposition layer 3 is processed:
the carbon deposition layer 3 at the edge of the ultra-thin wafer 1 is etched by laser or plasma etching or oxygen plasma etching, and a plurality of exhaust holes 4 are formed, so that air between the ultra-thin wafer 1 and the graphite carrier plate 2 can be conveniently pumped out in a vacuum environment.
In this embodiment, the number of the exhaust holes 4 is 3.
As shown in fig. 3, S4, placing the ultra-thin wafer 1 with the through hole and the graphite carrier 2 fixed by bonding on a supporting plate 5, wherein a clamping jaw 6 is arranged on the supporting plate 5, the clamping jaw 6 is used for attaching and fixing with the carbon deposition layer 3, and the supporting plate 5 is located in the ion implanter.
The supporting plate 5 is provided with a gap which is arranged corresponding to the exhaust hole 4.
As shown in fig. 4, in step S5, an ion generator is used to align the ultra-thin wafer 1 in a vacuum environment, and plasma is ejected toward the front surface of the ultra-thin wafer 1 to form an ion beam, thereby performing ion implantation on the ultra-thin wafer 1.
Be equipped with intake duct 7 on the layer board 5, intake duct 7 communicates with the gas pocket of graphite support plate 2, and when carrying out ion implantation, inert gas gets into from heat exchanger's entry, in 7 intake ducts were discharged from the export, continuously supplied high temperature inert gas in to the gas pocket through intake duct 7, and the temperature is 500 ℃ at least, can not supply nitrogen gas, in this embodiment, heats or cools down inert gas through heat exchanger, and inert gas includes helium, argon gas.
When the device is used, the ultrathin wafer 1 bonded with the graphite carrier plate 2 is placed on a supporting plate 5 in an ion implantation machine, the supporting plates 5 are arranged on a rotating plate in an array mode, a carbon deposition layer 3 on the ultrathin wafer 1 is fixed by using a clamping jaw 6, and when the rotating plate is rotated, the ultrathin wafer 1 passes through an ion ejection position to be subjected to ion implantation operation and is cooled after leaving.
Keeping a vacuum environment with the temperature of at least 500 ℃ in the ion implantation process, and supplying high-temperature inert gas to the gap of the supporting plate 5 through the air inlet 7, wherein the inert gas enters the gap between the ultrathin wafer 1 and the graphite carrier plate 2 from the air hole corresponding to the gap of the supporting plate 5 and is exhausted from the air exhaust hole 4 and is pumped away as shown in fig. 5; the ultrathin wafer 1 is continuously and uniformly heated, and meanwhile, air between the ultrathin wafer 1 and the graphite carrier plate 2 is discharged, so that the air is prevented from being heated and expanded, the ultrathin wafer 1 is broken, the safety of ion implantation is improved, and the yield of the ultrathin wafer 1 is guaranteed.
The ion generator generates ions from an ion source, the ions are screened by an analyzer to obtain required ions, the ions are guided into an accelerating tube, and the ions pass through a beam line frame and a parallel lens after being accelerated and are emitted to an ultrathin wafer 1 on a rotating target.
In the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed.
Claims (8)
1. An ultra-thin wafer ion implantation process, comprising:
s1, temporarily adsorbing and fixing an ultrathin wafer (1) by using a graphite carrier plate (2) with air holes;
s2, bonding and fixing the ultrathin wafer (1) and the graphite carrier plate (2), and forming a carbon deposition layer (3) at the edge of the ultrathin wafer (1);
s3, forming holes in the carbon deposition layer (3) at the edge of the ultrathin wafer (1);
s4, fixing the ultrathin wafer (1) in an ion implanter by using a supporting plate (5) with a clamping jaw (6);
and S5, finishing the ion implantation of the ultrathin wafer (1) in a vacuum environment continuously introducing inert gas.
2. The ion implantation process for ultra thin wafers as claimed in claim 1, wherein the bonding of the ultra thin wafer (1) to the graphite carrier plate (2) is achieved by carbon deposition.
3. The ion implantation process of claim 2, wherein the carbon precipitation treatment comprises:
s2.1, coating a carbon layer on the ultrathin wafer (1) and wrapping the ultrathin wafer (1);
s2.2, coating photoresist at the edge of the ultrathin wafer (1);
and S2.3, removing the carbon layer on the front surface of the ultrathin wafer (1) by using a laser or plasma etching mode, leaving the carbon layer on the edge of the ultrathin wafer (1), and forming a carbon deposition layer (3) for fixing the ultrathin wafer (1) and the graphite carrier plate (2).
4. The ultra thin wafer ion implantation process according to claim 1, wherein the opening of the carbon deposition layer (3) comprises: the carbon deposition layer (3) at the edge of the ultrathin wafer (1) is etched by using a laser or plasma etching or oxygen plasma etching mode, and at least two exhaust holes (4) are formed in the carbon deposition layer for exhausting gas between the ultrathin wafer (1) and the graphite carrier plate (2).
5. The ion implantation process for ultra-thin wafers as claimed in claim 1, wherein the clamping jaws (6) on the supporting plate (5) are attached to the carbon deposition layer (3), and an air inlet channel (7) is provided on the supporting plate (5) for communicating with the air holes of the graphite carrier plate (2) to supply inert gas.
6. The ultra thin wafer ion implantation process of claim 5, wherein the inert gas comprises helium, argon.
7. The ultra thin wafer ion implantation process of claim 5 wherein the temperature of the inert gas is at least 500 ℃.
8. The ultra thin wafer ion implantation process of claim 5, wherein said S5 comprises: plasma is sprayed towards the front surface of the ultrathin wafer (1) by an ion generator to form ion beams, and ion implantation is carried out on the ultrathin wafer (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211209411.2A CN115458394A (en) | 2022-09-30 | 2022-09-30 | Ultrathin wafer ion implantation process |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211209411.2A CN115458394A (en) | 2022-09-30 | 2022-09-30 | Ultrathin wafer ion implantation process |
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| Publication Number | Publication Date |
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| CN115458394A true CN115458394A (en) | 2022-12-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202211209411.2A Pending CN115458394A (en) | 2022-09-30 | 2022-09-30 | Ultrathin wafer ion implantation process |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117219561A (en) * | 2023-11-09 | 2023-12-12 | 合肥晶合集成电路股份有限公司 | Method for reducing risk of crystal wafer in HARP (hybrid automatic repeat request) process |
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2022
- 2022-09-30 CN CN202211209411.2A patent/CN115458394A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117219561A (en) * | 2023-11-09 | 2023-12-12 | 合肥晶合集成电路股份有限公司 | Method for reducing risk of crystal wafer in HARP (hybrid automatic repeat request) process |
| CN117219561B (en) * | 2023-11-09 | 2024-02-09 | 合肥晶合集成电路股份有限公司 | Method for reducing risk of crystal wafer in HARP (hybrid automatic repeat request) process |
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