CN115361018A - ADC correction circuit - Google Patents
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- CN115361018A CN115361018A CN202211128285.8A CN202211128285A CN115361018A CN 115361018 A CN115361018 A CN 115361018A CN 202211128285 A CN202211128285 A CN 202211128285A CN 115361018 A CN115361018 A CN 115361018A
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Abstract
The invention relates to the technical field of ADC (analog to digital converter) detection, and particularly discloses an ADC (analog to digital converter) correction circuit, which comprises a chopping switch, an ADC, a chopping controller, a correction multiplier, a correction adder and a gain error correction module; a first input end of the chopping switch inputs a voltage signal to be detected, a second input end of the chopping switch is connected with a first output end of the chopping controller, and an output end of the chopping switch is connected with an input end of the ADC; the input end of the chopping controller is connected with the output end of the ADC, and the second output end of the chopping controller is connected with the first input end of the correction adder; the first input end of the correction multiplier inputs original voltage quantization data, and the second input end of the correction multiplier acquires a gain error correction coefficient output by the gain error correction module; the correction multiplier and the correction adder correct a gain error and an offset error of the original voltage quantization data to output corrected voltage quantization data. The invention can correct the offset error and the gain error in the battery voltage measurement process.
Description
Technical Field
The invention relates to the technical field of ADC detection, in particular to an ADC correction circuit.
Background
The sensing world is an important role of an Analog to Digital Converter (ADC), and a Digital system usually uses the ADC to convert external Analog signals into processable Digital signals, and then processes the data through a powerful data processing function of a Digital circuit, so as to implement a desired function. The accuracy of the ADC has a large impact on the performance of the digital system, with the higher the conversion accuracy, the better the system performance. In a Battery Management System (BMS) for an electric vehicle, various states of a battery need to be monitored, and at this time, an ADC having a high accuracy is required to achieve accurate measurement.
The ADC is a high-precision data conversion device, is susceptible to the influence of external environment in the actual use process, and often cannot reach the precision calibrated by the ADC. The loss of accuracy has a large impact on the performance of the overall system, and therefore, error correction of the ADC results is required.
The static indicators of ADC design, i.e. the error types, can be roughly classified into the following four categories: offset error (Offset error), gain error (Gain error), differential nonlinearity (Differential nonlinearity), and Integral nonlinearity (Integral nonlinearity). The offset error and the gain error are the main aspects of the external environment influence, and the differential nonlinearity and the integral nonlinearity errors are often dependent on the structure and the process of the ADC. Moreover, the correction principle of the offset error and the gain error is simpler, the required resources are less, and the method is suitable for chip-level correction; differential non-linearity and integral non-linearity errors are related to an ADC structure, so that correction is not easy, polynomial approximation, a table look-up method and the like are needed, the area cost is high, universality is not realized, and the method is not suitable for chip-level correction. The invention mainly researches the offset caused by the external environment and the correction of the gain error.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides the ADC correction circuit which can correct gain errors and offset errors in an ADC sampling channel according to multiplication and addition operations, and has the advantages of obvious effect, simple structure and easiness in implementation.
As a first aspect of the present invention, an ADC correction circuit is provided, which includes a chopping switch, an ADC, a chopping controller, a correction multiplier, a correction adder, and a gain error correction module;
the first input end of the chopping switch is used for inputting a voltage signal to be detected, the second input end of the chopping switch is connected with the first output end of the chopping controller, the output end of the chopping switch is connected with the input end of the ADC, and the chopping switch is used for controlling the direction of the voltage signal to be detected;
the input end of the chopping controller is connected with the quantized data output end of the ADC, the second output end of the chopping controller is connected with the first input end of the correction adder, and the chopping controller is used for outputting offset error correction coefficients to the correction adder;
the first input end of the correction multiplier is used for inputting original voltage quantization data of the ADC; the second input end of the correction multiplier is connected with the gain error correction module and used for acquiring a gain error correction coefficient output by the gain error correction module; the output end of the correction multiplier is connected with the second input end of the correction adder;
the correction multiplier and the correction adder are used for correcting gain errors and offset errors of the original voltage quantized data, and the output end of the correction adder outputs the corrected voltage quantized data.
Further, the gain error correction module comprises a memory, a selector, a coefficient adder, a coefficient multiplier and an interpolator;
a first output end of the memory is respectively connected with an input end of the interpolator and a selection signal input end of the selector, a second output end of the memory is connected with a first data input end of the selector, a third output end of the memory is connected with a second data input end of the selector, a fourth output end of the memory is connected with a first input end of the coefficient adder, and the memory is used for storing a temperature coefficient and a current external environment temperature value; wherein the temperature coefficient comprises a room temperature coefficient, a high temperature coefficient and a low temperature coefficient;
the output end of the selector is connected with the first input end of the coefficient multiplier, and the selector is used for selecting the high-temperature coefficient or the low-temperature coefficient according to the current external environment temperature value;
the output end of the interpolator is connected with the second input end of the coefficient multiplier, the interpolator is used for obtaining a temperature proportional coefficient according to the current external environment temperature value, the output end of the coefficient multiplier is connected with the second input end of the coefficient adder, a fixed value 1 is input into the third input end of the coefficient adder, the output end of the coefficient adder is connected with the second input end of the correction multiplier, and the coefficient adder is used for calculating the gain error correction coefficient.
Further, the gain error correction coefficient gain _ coeff is calculated as follows:
gain-coeff＝1+gain-room+K(T)×gain-hot/cold
wherein, the gain _ room is the room temperature coefficient, the K (T) is the temperature proportionality coefficient, the gain _ hot is the high temperature coefficient, and the gain _ cold is the low temperature coefficient.
Further, the calculation formula of the corrected voltage quantization data cali _ data is as follows:
cali-data＝(src-data×gain-coeff)+off-coeff
the src _ data is original voltage quantization data of the ADC, the gain _ coeff is the gain error correction coefficient, and the off _ coeff is an offset error correction coefficient.
Further, the chopping controller is configured to obtain original voltage quantization data src _ data of the ADC, and assuming that the original voltage quantization data src _ data currently sampled and output by the ADC is V2, and the original voltage quantization data src _ data sampled and output last time is V1, the chopping controller obtains the offset error correction coefficient by calculating a difference between the current original voltage quantization data V2 and the last original voltage quantization data V1.
Further, the temperature proportionality coefficient K (T) is a decimal within 1, wherein,
the temperature proportionality coefficient K (T) is larger when the current external environment temperature value T is closer to the set high-temperature coefficient gain _ hot or the low-temperature coefficient gain _ cold;
and when the current external environment temperature value T is the set room temperature coefficient gain _ room, the temperature proportionality coefficient K (T) is 0.
Further, the voltage signal to be detected at the first input end of the chopping switch is a differential signal, and the chopping controller is used for controlling the chopping switch to alternately output the differential signal.
Further, the operands of the correction multiplier and the correction adder are fixed point numbers.
Furthermore, the operands of the coefficient adder and the coefficient multiplier are fixed point numbers.
Further, the interpolator obtains the temperature proportionality coefficient according to the current external environment temperature value by using a linear interpolation method.
The ADC correction circuit provided by the invention has the following advantages: gain error correction coefficients are obtained through temperature-related gain coefficients in the interpolator and the memory, offset error correction coefficients are obtained through a chopping mechanism, and then gain errors and offset errors in an ADC sampling channel are corrected according to multiplication and addition operations.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention.
Fig. 1 is a block diagram of an ADC correction circuit according to the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description of the ADC calibration circuit according to the present invention with reference to the accompanying drawings and preferred embodiments shows the following detailed descriptions of the specific implementation, structure, features and effects thereof. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without any inventive step, are within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged under appropriate circumstances in order to facilitate the description of the embodiments of the invention herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In the explanation of the present invention, it should be noted that the terms "mounted," "connected," and "connected" should be construed broadly unless otherwise indicated. For example, the connection may be a fixed connection, a connection through a special interface, or an indirect connection via an intermediate medium. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the present embodiment, an ADC correction circuit is provided, as shown in fig. 1, the ADC correction circuit 10 includes a chopping switch 20, an ADC30, a chopping controller 40, a correction multiplier 50, a correction adder 60, and a gain error correction module;
a first input end of the chopping switch 20 is used for inputting a voltage signal to be detected, a second input end of the chopping switch 20 is connected with a first output end of the chopping controller 40, an output end of the chopping switch 20 is connected with an input end of the ADC30, and the chopping switch 20 is used for controlling the direction of the voltage signal to be detected;
an input of the chopping controller 40 is connected to the quantized data output of the ADC30, a second output of the chopping controller 40 is connected to a first input of the correction adder 60, and the chopping controller 40 is configured to output an offset error correction coefficient to the correction adder 60;
a first input terminal of the correction multiplier 50 is used for inputting the raw voltage quantization data src _ data of the ADC; a second input end of the correction multiplier 50 is connected to the gain error correction module, and is configured to obtain a gain error correction coefficient output by the gain error correction module; an output of the correction multiplier 50 is connected to a second input of the correction adder 60;
the correction multiplier 50 and the correction adder 60 are configured to correct a gain error and an offset error of the original voltage quantization data, and an output end of the correction adder 60 outputs corrected voltage quantization data cali _ data.
Preferably, the gain error correction module includes a memory 70, a selector 80, a coefficient adder 90, a coefficient multiplier 100, and an interpolator 110;
a first output terminal of the memory 70 is respectively connected to the input terminal of the interpolator 110 and the selection signal input terminal of the selector 80, a second output terminal of the memory 70 is connected to the first data input terminal of the selector 80, a third output terminal of the memory 70 is connected to the second data input terminal of the selector 80, a fourth output terminal of the memory 70 is connected to the first input terminal of the coefficient adder 90, and the memory 70 is configured to store a Temperature coefficient and a current ambient Temperature value (hereinafter, referred to as T); wherein the temperature coefficient comprises a room temperature coefficient, a high temperature coefficient and a low temperature coefficient;
the output end of the selector 80 is connected to the first input end of the coefficient multiplier 100, and the selector 80 is configured to select the high temperature coefficient or the low temperature coefficient according to the current external environment temperature value T;
the output end of the interpolator 110 is connected to the second input end of the coefficient multiplier 100, the interpolator 110 is configured to obtain a temperature scaling coefficient K (T) according to the current external environment temperature value, the output end of the coefficient multiplier 100 is connected to the second input end of the coefficient adder 90, a fixed value 1 is input to the third input end of the coefficient adder 90, the output end of the coefficient adder 90 is connected to the second input end of the correction multiplier 50, and the coefficient adder 90 is configured to calculate the gain error correction coefficient gain _ coeff.
Specifically, the selector 80 is a data selector.
Specifically, the temperature coefficient in the memory 70 is related to the ADC temperature, and is obtained by actual testing of the ADC; and the current external environment temperature value in the memory is a temperature sensor output value or a temperature value written by the MCU.
Preferably, the gain error correction coefficient gain _ coeff is calculated as follows:
gain-coeff＝1+gain-room+K(T)×gain-hot/cold (1)
wherein, gain _ room is a room temperature coefficient, K (T) is a temperature proportionality coefficient, gain _ hot is a high temperature coefficient, and gain _ cold is a low temperature coefficient.
Preferably, the calculation formula of the corrected voltage quantization data cali _ data is as follows:
cali-data＝(src-data×gain-coeff)+off-coeff (2)
the src _ data is original voltage quantization data of the ADC, the gain _ coeff is the gain error correction coefficient, and the off _ coeff is an offset error correction coefficient.
According to the ADC correction circuit provided by the invention, a gain error correction coefficient gain _ coeff is obtained through a gain coefficient related to the temperature in an interpolator 110 and a memory 70, see formula (1), an offset error correction coefficient off _ coeff is obtained through a chopping mechanism, then a gain error and an offset error in an ADC sampling channel are corrected according to multiplication and addition operation, the calculation formula is shown in formula (2), and cali _ data is output as a final corrected result. The invention has the advantages of obvious correction effect, simple structure and easy realization.
Preferably, the chopping controller 40 is configured to obtain original voltage quantization data src _ data of the ADC, and assuming that the original voltage quantization data src _ data currently sampled and output by the ADC30 is V2 and the original voltage quantization data src _ data last sampled and output by the ADC30 is V1, the chopping controller 40 obtains the offset error correction coefficient off _ coeff by calculating a difference between the current original voltage quantization data V2 and the previous original voltage quantization data V1.
Preferably, the temperature proportionality coefficient K (T) is a fraction within 1, wherein,
the closer the current external environment temperature value T is to the set high temperature coefficient gain _ hot or low temperature coefficient gain _ cold, the larger the temperature proportionality coefficient K (T) is;
and when the current external environment temperature value T is the set room temperature coefficient gain _ room, the temperature proportionality coefficient K (T) is 0.
Preferably, the voltage signal to be detected at the first input end of the chopping switch 20 is a differential signal, the chopping controller 40 is configured to control the chopping switch 20 to alternately output the differential signal, the chopping switch 20 alternately transmits the inverted voltages Vin and Vin to the input of the ADC30, the ADC30 outputs the quantized original voltage data src _ data, and if the src _ data output by the ADC after two sampling operations are V1 and V2, respectively, V1= + Vin + offset and V2= -Vin + offset; generally, data src _ data sampled and output by an ADC has deviations due to the external environment and the influence of its own circuit, so a correction circuit is used to correct the deviations to obtain corrected data cali _ data.
Preferably, the chopping controller 40 is a control core of the ADC correction circuit, controls a sampling channel and a chopping switch, and obtains an offset error correction coefficient off _ coeff according to ADC quantization data (V1 and V2)); the chopping controller 40 obtains the offset error coefficient off _ coeff = (V1 + V2)/2 by calculating the difference between the current sample (V2) and the last sample (V1).
It should be noted that the chopping switch 20 is a switch that cooperates with the chopping controller 40 to realize the chopping function, and functions to exchange the input direction, assuming that the input is + vin and-vin from top to bottom, and the switch control signal is 0, and directly outputs the input; if the value is 1, the output is exchanged, and-vin and + vin are output.
Preferably, the operands of the correction multiplier 50 and the correction adder 60 are fixed-point numbers.
Preferably, the operands of the coefficient adder 90 and the coefficient multiplier 100 are fixed-point numbers.
Preferably, the interpolator 110 obtains the temperature scaling factor according to the current ambient temperature value by using a linear interpolation method.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. An ADC correction circuit (10) comprises a chopping switch (20), an ADC (30), a chopping controller (40), a correction multiplier (50), a correction adder (60) and a gain error correction module;
a first input end of the chopping switch (20) is used for inputting a voltage signal to be detected, a second input end of the chopping switch (20) is connected with a first output end of the chopping controller (40), an output end of the chopping switch (20) is connected with an input end of the ADC (30), and the chopping switch (20) is used for controlling the direction of the voltage signal to be detected;
an input of the chopping controller (40) is coupled to the quantized data output of the ADC (30), a second output of the chopping controller (40) is coupled to a first input of the correction adder (60), and the chopping controller (40) is configured to output an offset error correction coefficient to the correction adder (60);
a first input terminal of the correction multiplier (50) is used for inputting the original voltage quantization data of the ADC; a second input end of the correction multiplier (50) is connected with the gain error correction module and is used for acquiring a gain error correction coefficient output by the gain error correction module; an output of the correction multiplier (50) is connected to a second input of the correction adder (60);
the correction multiplier (50) and the correction adder (60) are used for correcting gain errors and offset errors of the original voltage quantized data, and the output end of the correction adder (60) outputs the corrected voltage quantized data.
2. An ADC correction circuit according to claim 1, wherein the gain error correction module comprises a memory (70), a selector (80), a coefficient adder (90), a coefficient multiplier (100) and an interpolator (110);
a first output end of the memory (70) is respectively connected with an input end of the interpolator (110) and a selection signal input end of the selector (80), a second output end of the memory (70) is connected with a first data input end of the selector (80), a third output end of the memory (70) is connected with a second data input end of the selector (80), a fourth output end of the memory (70) is connected with a first input end of the coefficient adder (90), and the memory (70) is used for storing a temperature coefficient and a current external environment temperature value; wherein the temperature coefficient comprises a room temperature coefficient, a high temperature coefficient and a low temperature coefficient;
the output end of the selector (80) is connected with the first input end of the coefficient multiplier (100), and the selector (80) is used for selecting the high-temperature coefficient or the low-temperature coefficient according to the current external environment temperature value;
the output end of the interpolator (110) is connected with the second input end of the coefficient multiplier (100), the interpolator (110) is used for obtaining a temperature proportionality coefficient according to the current external environment temperature value, the output end of the coefficient multiplier (100) is connected with the second input end of the coefficient adder (90), the third input end of the coefficient adder (90) inputs a fixed value 1, the output end of the coefficient adder (90) is connected with the second input end of the correction multiplier (50), and the coefficient adder (90) is used for calculating the gain error correction coefficient.
3. The ADC correction circuit of claim 2, wherein the gain error correction coefficient gain _ coeff is calculated as follows:
gain-coeff＝1+gain-room+K(T)×gain-hot/cold
wherein, the gain _ room is the room temperature coefficient, the K (T) is the temperature proportionality coefficient, the gain _ hot is the high temperature coefficient, and the gain _ cold is the low temperature coefficient.
4. The ADC correction circuit of claim 3, wherein the corrected voltage quantization data cali _ data is calculated as follows:
cali-data＝(src-data×gain-coeff)+off-coeff
the src _ data is original voltage quantization data of the ADC, the gain _ coeff is the gain error correction coefficient, and the off _ coeff is an offset error correction coefficient.
5. The ADC correction circuit of claim 4, wherein the chopping controller (40) is configured to obtain original voltage quantization data src _ data of the ADC, assuming that the original voltage quantization data src _ data output by the current sampling of the ADC (30) is V2 and the original voltage quantization data src _ data output by the last sampling is V1, the chopping controller (40) obtains the offset error correction coefficient by calculating a difference between the current original voltage quantization data V2 and the last original voltage quantization data V1.
6. An ADC correction circuit according to claim 3, wherein said temperature scaling factor K (T) is a fractional number within 1, wherein,
the temperature proportionality coefficient K (T) is larger when the current external environment temperature value T is closer to the set high-temperature coefficient gain _ hot or the low-temperature coefficient gain _ cold;
and when the current external environment temperature value T is the set room temperature coefficient gain _ room, the temperature proportionality coefficient K (T) is 0.
7. An ADC correction circuit according to claim 1, wherein the voltage signal to be detected at the first input of the chopping switch (20) is a differential signal, and the chopping controller (40) is configured to control the chopping switch (20) to output the differential signal alternately.
8. An ADC correction circuit according to claim 1, wherein the operands of the correction multiplier (50) and the correction adder (60) are fixed-point numbers.
9. An ADC correction circuit according to claim 2, wherein the operands of the coefficient adder (90) and the coefficient multiplier (100) are fixed-point numbers.
10. An ADC correction circuit according to claim 2, wherein the interpolator (110) is configured to derive the temperature scaling factor from the current ambient temperature value using linear interpolation.
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| CN202211128285.8A CN115361018A (en) | 2022-09-16 | 2022-09-16 | ADC correction circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119135169A (en) * | 2024-11-08 | 2024-12-13 | 湖南进芯电子科技有限公司 | Offset error calibration circuit and offset error calibration method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119135169A (en) * | 2024-11-08 | 2024-12-13 | 湖南进芯电子科技有限公司 | Offset error calibration circuit and offset error calibration method |
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