CN115314568A

CN115314568A - SPI data broadcasting system and method

Info

Publication number: CN115314568A
Application number: CN202210955131.XA
Authority: CN
Inventors: 朱文博; 刘蓉杰; 郑彬; 王东会
Original assignee: Hunan Beiyun Technology Co ltd
Current assignee: Hunan Beiyun Technology Co ltd
Priority date: 2022-08-10
Filing date: 2022-08-10
Publication date: 2022-11-08

Abstract

The embodiment of the invention provides an SPI data broadcasting method, when detecting that a first slave device needs to distribute data to a second slave device, a master device pulls down a chip selection signal; the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through a chip selection signal port of the master device, so that the first slave device sends data to the master device and the second slave device through an output port of the first slave device. When data distribution is required to be carried out from the slave equipment to the slave equipment, the master equipment pulls down the chip selection signal, so that the master equipment and the second slave equipment enter a data receiving state, the first slave equipment enters a data distribution state, and data are distributed to the master equipment and the second slave equipment through the first slave equipment.

Description

SPI data broadcasting system and method

Technical Field

The invention relates to the technical field of data communication, in particular to an SPI data broadcasting system and an SPI data broadcasting method.

Background

A high-speed synchronous Serial Interface SPI (Serial peripheral Interface) is a standard four-wire synchronous bidirectional Serial bus, which is a Serial peripheral Interface. When the SPI communication is carried out, a host and a slave need to be specified, and for the slave, data transmission cannot be initiated actively. In the conventional method, the slave cannot distribute data to other SPI devices except the master. As for the conventional method for data distribution of the slave, data is mainly forwarded, and the data to be forwarded is forwarded as a host through an additional SPI interface, as shown in fig. 1, when an SPI chip in the middle of fig. 1 sends data to two SPI chips on the right side, an additional SPI port is needed as the SPI host; and data need be sent from the left SPI slave port and the right SPI master port, and data conversion can occupy certain system time and influence data communication efficiency.

Disclosure of Invention

The embodiment of the invention provides an SPI data broadcasting method, aiming at solving the problems that the conventional data broadcasting method needs to additionally use an SPI port as an SPI host, so that data needs to be transmitted from a left SPI slave port and a right SPI master port, data conversion occupies certain system time and influences data communication efficiency. When data distribution is required to be carried out from the slave equipment to the slave equipment, the master equipment pulls down the chip selection signal, so that the master equipment and the second slave equipment enter a data receiving state, the first slave equipment enters a data distribution state, and data are distributed to the master equipment and the second slave equipment through the first slave equipment.

In a first aspect, an embodiment of the present invention provides an SPI data dissemination system, where the SPI data dissemination system includes a master device, a first slave device, and a second slave device, and both the first slave device and the second slave device are connected to the master device in a communication manner;

the chip selection signal port of the master device is in communication connection with the chip selection signal port of the first slave device and the chip selection signal port of the second slave device respectively, the output port of the master device is in communication connection with the input port of the first slave device, the input port of the master device is in communication connection with the output port of the first slave device and the input port of the second slave device respectively, and the output port of the first slave device is in communication connection with the input port of the second slave device.

Optionally, the input port of the first slave device is further connected in communication with the output port of the second slave device.

Optionally, the master device, the first slave device, and the second slave device each include an SS port and an SCK port, the master device further includes a MISO port and a MOSI port, and the first slave device and the second slave device further include an SDO port and an SDI port;

the SS port of the master device is respectively in communication connection with the SS port of the first slave device and the SS port of the second slave device, the SCK port of the master device is respectively in communication connection with the SCK port of the first slave device and the SCK port of the second slave device, the MISO port of the master device is respectively in communication connection with the SDO port of the first slave device and the SDI port of the second slave device, and the MOSI port of the master device is in communication connection with the SDI port of the first slave device;

the SDO port of the first slave device is also in communication connection with the SDI port of the second slave device.

Optionally, the SDI port of the first slave device is further communicatively connected to the SDO port of the second slave device.

Optionally, the number of the second slave devices is multiple.

In a second aspect, an embodiment of the present invention provides an SPI data broadcasting method, including the following steps:

when detecting that the first slave equipment is required to distribute data to the second slave equipment, the master equipment pulls down a chip selection signal;

and the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through a chip selection signal port of the master device, so that the first slave device sends data to the master device and the second slave device through an output port of the first slave device.

Optionally, the step that the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through a chip selection signal port of the master device includes:

the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through an SS port of the master device, wherein the first slave device enters a data sending state after receiving the pulled-down chip selection signal through the SS port of the first slave device, and the second slave device enters a data receiving state after receiving the pulled-down chip selection signal through the SS port of the second slave device.

Optionally, the step of sending, by the first slave device, data to the master device and the second slave device through the output port of the first slave device includes:

the first slave device transmits data to the master device and the second slave device through the SDO port of the first slave device, wherein the master device receives the transmission data of the first slave device through the MISO port of the master device, and the second slave device receives the transmission data of the first slave device through the SDI port of the second slave device.

Optionally, the SPI data broadcasting method further includes:

the master device sends a reference clock signal to the first slave device and the second slave device through the SCK port of the master device, wherein the first slave device receives the reference clock signal through the SCK port of the first slave device and performs clock synchronization according to the reference clock signal, and the second slave device receives the reference clock signal through the SCK port of the second slave device and performs clock synchronization according to the reference clock signal.

In the embodiment of the invention, when detecting that the first slave equipment needs to distribute data to the second slave equipment, the master equipment pulls down a chip selection signal; the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through a chip selection signal port of the master device, so that the first slave device sends data to the master device and the second slave device through an output port of the first slave device. When data distribution is required to be carried out from the slave equipment to the slave equipment, the master equipment pulls down the chip selection signal, so that the master equipment and the second slave equipment enter a data receiving state, the first slave equipment enters a data distribution state, and data are distributed to the master equipment and the second slave equipment through the first slave equipment.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a diagram of an architecture for a prior art SPI data dissemination system;

fig. 2 is an architecture diagram of an SPI data dissemination system according to an embodiment of the present invention;

FIG. 3 is a schematic timing diagram of an SPI provided by an embodiment of the present invention;

fig. 4 is a flowchart of an SPI data broadcasting method according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, fig. 1 is an architecture diagram of an SPI data dissemination system according to an embodiment of the present invention, and as shown in fig. 1, the SPI data dissemination system includes a master device, a first slave device, and a second slave device, and both the first slave device and the second slave device are communicatively connected to the master device.

Further, the master device may be any type of master device supporting an SPI mode, and the first slave device and the second slave device may be any type of slave devices supporting an SPI mode. It should be noted that the SPI is a high-speed synchronous serial port, is a standard four-wire synchronous bidirectional serial bus, and is a serial peripheral interface.

The master device is provided with four ports, the slave device is also provided with four ports, and the four ports on the master device are correspondingly connected with the four ports of the slave device through signal lines. The synchronization between the master device and the slave device may be synchronized by a clock signal, and one of the four ports transmits the clock signal. The master device and the slave device are provided with shift registers, when the master device writes data into the shift registers of the slave device, the data can be transmitted into the shift registers of the slave device through signal lines, and meanwhile, the data in the shift registers of the slave device can also be transmitted into the shift registers of the master device through the signal lines, so that one-time data exchange is completed.

The master device comprises a chip selection signal port, an input port, an output port and a clock synchronization port, the slave device comprises a chip selection signal port, an input port, an output port and a clock synchronization port, and the slave device is a first slave device and a second slave device. The ports described above may also be referred to as pins or interfaces.

The chip select signal port of the master device is communicatively coupled to the chip select signal port of the first slave device and the chip select signal port of the second slave device, the output port of the master device is communicatively coupled to the input port of the first slave device, the input port of the master device is communicatively coupled to the output port of the first slave device and the input port of the second slave device, and the output port of the first slave device is communicatively coupled to the input port of the second slave device.

The chip select signal may be transmitted to the first slave device and the second slave device through a chip select signal port of the master device, and the first slave device receives the chip select signal from the master device through the chip select signal port of the first slave device. It should be noted that, if the slave device is selected, the operation of the slave device is enabled only when the chip select signal is a predetermined enable signal (high or low). And selecting and operating the first slave device and the second slave device through the chip selection signal.

The output port of the master device is communicatively connected to the input port of the first slave device, and the input port of the master device is communicatively connected to the output port of the first slave device and the input port of the second slave device, respectively.

When data needs to be sent to the second slave device through the first slave device, the master device pulls down the chip selection signal, and sends the pulled-down chip selection signal to the first slave device and the second slave device through a chip selection signal port of the master device, the first slave device enters a data distribution state after receiving the pulled-down chip selection signal through a chip selection signal port of the first slave device, and the second slave device enters a data receiving state after receiving the pulled-down chip selection signal through a chip selection signal port of the second slave device.

The master device transmits data to the first slave device through an output port of the master device, the first slave device receives the data transmitted by the master device through an input port of the first slave device, the first slave device transmits the data to the second slave device through an output port of the first slave device, and the second slave device receives the data transmitted by the first slave device through an input port of the second slave device. Meanwhile, the first slave device sends data to the master device through an output port of the first slave device, and the master device receives the data sent by the first slave device through an input port of the master device.

In the embodiment of the invention, when the slave device needs to distribute data to the slave device, the master device pulls down the chip selection signal, so that the master device and the second slave device enter a data receiving state, the first slave device enters a data distribution state, and the data is distributed to the master device and the second slave device through the first slave device.

Optionally, the input port of the first slave device is further connected to the output port of the second slave device in a communication manner.

Specifically, the input port of the first slave device is in communication connection with the output port of the second slave device, so that the second slave device sends data to the first slave device through the output port of the second slave device, data exchange between the first slave device and the second slave device is completed, and data exchange between the first slave device and the master device is performed through the first slave device.

In a possible embodiment, the output port of the second slave device may not be connected to other ports, or the output port of the second slave device may be in signal connection with the input port of the first slave device, but the second slave device does not send any signal.

Optionally, the master device, the first slave device, and the second slave device are devices supporting an SPI mode, each of the master device, the first slave device, and the second slave device includes an SS port and an SCK port, the master device further includes an MISO port and an MOSI port, and the first slave device and the second slave device further include an SDO port and an SDI port.

The SS port is a chip selection signal port, the SCK port is a clock synchronization port, the MISO port is an input port of the main device, and the MOSI port is an output port of the main device. The SDO port is an output port of the slave device, and the SDI port is an input port of the slave device. The SS port is used for chip selection of the SPI signal, which when pulled low, indicates that the slave can send data to the host.

The SS port of the master device is communicatively connected to the SS port of the first slave device and the SS port of the second slave device, the SCK port of the master device is communicatively connected to the SCK port of the first slave device and the SCK port of the second slave device, the MISO port of the master device is communicatively connected to the SDO port of the first slave device and the SDI port of the second slave device, and the MOSI port of the master device is communicatively connected to the SDI port of the first slave device. The SDO port of the first slave device is also connected with the SDI port of the second slave device in a communication mode.

In the embodiment of the invention, when a first slave device distributes a message to a second slave device, the SCK port of the master device is connected to the SCK port of the slave device through a signal line for clock synchronization; the SS port of the host is connected to the SS ports of all the slave devices through signal lines, and is used for controlling the second slave device to be capable of receiving data, and the first slave device can send data. The SDO port of the second slave device is connected to the MISO port of the host through a signal line, and is connected to the SDI port of the first slave device for communicating with the master device and transmitting data to the second slave device.

The communication of the slave devices is initiated by the master device, and when the master device pulls the SS signal low, it indicates that the first slave device can send data to the master device and the second slave device. And after the SS chip selection signal is pulled down by the host, the second slave device enters a signal receiving state to receive data.

Specifically, the SDI port of the first slave device is communicatively connected to the SDO port of the second slave device, so that the second slave device sends data to the first slave device through the SDO port of the second slave device, data exchange between the first slave device and the second slave device is completed, and then data exchange between the first slave device and the master device is performed.

In a possible embodiment, the SDO port of the second slave device may not be connected to other ports, or the SDO port of the second slave device is in signal connection with the SDI port of the first slave device, but the second slave device does not send any signal.

Optionally, the number of the second slave devices is multiple.

Data can be transmitted to a plurality of second slave devices through one first slave device without additionally arranging a master device port.

It should be noted that the transmission of the SPI data is performed under the control of the serial synchronous clock signal. Specifically, referring to fig. 3, fig. 3 is a timing chart of an SPI according to an embodiment of the present invention, as shown in fig. 3, a clock generator of a master controls a shift register of the master on one hand, and controls a shift register of a slave on the other hand through an SCK signal line of the slave, so as to ensure that data exchange between the master and the slave is performed synchronously. The SPI serial synchronization Clock may be set to different polarities (CPOL) and phases (CPHA). The polarity of the Clock (CPOL) is used to determine whether the potential on the Synchronous Clock (SCK) signal line is high or low when the bus is idle. When Zhong Jixing is 0 (CPOL = 0), the SCK signal line is low when idle; when Zhong Jixing is 1 (CPOL = 1), the SCK signal line is high when idle; the phase of the Clock (CPHA) is used to determine when to sample the signal. When the clock phase is 1 (CPHA = 1), sampling is performed at the second transition edge of the SCK signal line; whether the transition edge is a rising edge or a falling edge depends on the polarity of the clock. When Zhong Jixing is 0 (CPOL = 0), the falling edge is taken; when Zhong Jixing is 1 (CPOL = 1), the rising edge is taken. When the clock phase is 0 (CPHA = 0), sampling is performed at the first transition edge of the SCK signal line. The transition edge is also related to the clock polarity, and when Zhong Jixing is 0 (CPOL = 0), the rising edge is taken; when Zhong Jixing is 1 (CPOL = 1), the falling edge is removed.

Optionally, referring to fig. 4, fig. 4 is a flowchart of an SPI data broadcasting method provided in the embodiment of the present invention, which is used in any SPI data broadcasting system in the embodiment of the present invention, and as shown in fig. 4, the SPI data broadcasting method includes the following steps:

401. when it is detected that the first slave device is required to distribute data to the second slave device, the master device pulls down the chip select signal.

In the embodiment of the present invention, whether the first slave device is required to distribute data to the second slave device may be detected by the switch signal, and when the switch signal is detected to be turned on, it may be considered that the first slave device is detected to distribute data to the second slave device.

When it is detected that the first slave device is required to distribute data to the second slave device, the master device pulls down the chip select signal so that the chip select signal is at a low level.

402. And the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through the chip selection signal port of the master device, so that the first slave device sends data to the master device and the second slave device through the output port of the first slave device.

In the embodiment of the present invention, the master device is provided with four ports, the slave device is also provided with four ports, and the four ports on the master device and the four ports of the slave device are correspondingly connected through signal lines. The synchronization between the master device and the slave device may be synchronized by a clock signal, and one of the four ports transmits the clock signal. The master device and the slave device are provided with shift registers, when the master device writes data into the shift registers of the slave device, the data can be transmitted into the shift registers of the slave device through signal lines, and meanwhile, the data in the shift registers of the slave device can also be transmitted into the shift registers of the master device through the signal lines, so that one-time data exchange is completed.

The chip select signal port of the master device is communicatively connected to the chip select signal port of the first slave device and the chip select signal port of the second slave device, the output port of the master device is communicatively connected to the input port of the first slave device, the input port of the master device is communicatively connected to the output port of the first slave device and the input port of the second slave device, and the output port of the first slave device is communicatively connected to the input port of the second slave device.

Further, the input port of the first slave device is also communicatively connected to the output port of the second slave device.

Optionally, the master device, the first slave device, and the second slave device are devices supporting an SPI mode, each of the master device, the first slave device, and the second slave device includes an SS port and an SCK port, the master device further includes a MISO port and a MOSI port, and the first slave device and the second slave device further include an SDO port and an SDI port.

In the step that the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through the chip selection signal port of the master device, the master device may send the pulled-down chip selection signal to the first slave device and the second slave device through the SS port of the master device, where the first slave device enters a data sending state after receiving the pulled-down chip selection signal through the SS port of the first slave device, and the second slave device enters a data receiving state after receiving the pulled-down chip selection signal through the SS port of the second slave device.

Optionally, in the step of transmitting data from the first slave device to the master device and the second slave device through the output port of the first slave device, the first slave device may transmit data to the master device and the second slave device through the SDO port of the first slave device, wherein the master device receives the transmission data of the first slave device through the MISO port of the master device, and the second slave device receives the transmission data of the first slave device through the SDI port of the second slave device.

In the embodiment of the invention, when the first slave device distributes the message to the second slave device, the SCK port of the master device is connected to the SCK port of the slave device through the signal line for clock synchronization; the SS port of the host is connected to the SS ports of all the slave devices through signal lines and used for controlling the second slave device to be capable of receiving data, and the first slave device can send data. The SDO port of the second slave device is connected to the MISO port of the host and the SDI port of the first slave device through signal lines, and is used for communicating with the master device and sending data to the second slave device.

Optionally, in the SPI data broadcasting method, the master device may further send a reference clock signal to the first slave device and the second slave device through an SCK port of the master device, where the first slave device receives the reference clock signal through the SCK port of the first slave device and performs clock synchronization according to the reference clock signal, and the second slave device receives the reference clock signal through the SCK port of the second slave device and performs clock synchronization according to the reference clock signal.

It should be noted that the transmission of the SPI data is performed under the control of the serial synchronous clock signal. Specifically, the clock generator of the master controls the shift register of the master on one hand, and controls the shift register of the slave on the other hand through the SCK signal line of the slave, so that the data exchange between the master and the slave is ensured to be carried out synchronously. The SPI serial synchronous clock may be set to different polarities and phases. The polarity of the clock is used to determine whether the potential on the synchronous clock line is high or low when the bus is idle. When Zhong Jixing is 0, the SCK signal line is at low level when idle; when Zhong Jixing is 1, the SCK signal line is at high level when idle; the phase of the clock is used to determine when to sample the signal. When the clock phase is 1, sampling is carried out on the second jumping edge of the SCK signal line; whether the transition edge is a rising edge or a falling edge depends on the polarity of the clock. When Zhong Jixing is 0, the falling edge is taken down; when Zhong Jixing is 1, the rising edge is taken. When the clock phase is 0, sampling is performed at the first transition edge of the SCK signal line. The jump edge is also related to the clock polarity, and when Zhong Jixing is 0, the rising edge is taken; when Zhong Jixing is 1, the falling edge is taken.

In the embodiment of the invention, when the data distribution from the first slave equipment to the second slave equipment is needed, the master equipment pulls down the chip selection signal; the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through a chip selection signal port of the master device, so that the first slave device sends data to the master device and the second slave device through an output port of the first slave device. When data distribution is required to be carried out from the slave equipment to the slave equipment, the master equipment pulls down the chip selection signal, so that the master equipment and the second slave equipment enter a data receiving state, the first slave equipment enters a data distribution state, and data are distributed to the master equipment and the second slave equipment through the first slave equipment.

It should be noted that the SPI data broadcasting method provided by the embodiment of the present invention may be applied to a single chip microcomputer, a smart phone, a computer, a server, and other devices that can broadcast SPI data.

It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware related to instructions of a computer program, and the program can be stored in a computer readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.

While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not to be limited to the disclosed embodiment, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. An SPI data broadcasting system is characterized by comprising a master device, a first slave device and a second slave device, wherein the first slave device and the second slave device are in communication connection with the master device;

the chip selection signal port of the master device is respectively connected with the chip selection signal port of the first slave device and the chip selection signal port of the second slave device in a communication mode, the output port of the master device is connected with the input port of the first slave device in a communication mode, the input port of the master device is respectively connected with the output port of the first slave device and the input port of the second slave device in a communication mode, and the output port of the first slave device is connected with the input port of the second slave device in a communication mode.

2. The SPI data dissemination system according to claim 1, wherein said input port of said first slave device is further communicatively connected to said output port of said second slave device.

3. The SPI data dissemination system according to claim 1, wherein said master device, said first slave device and said second slave device each comprise an SS port and an SCK port, said master device further comprises a MISO port and a MOSI port, said first slave device and said second slave device further comprise an SDO port and an SDI port;

the SS port of the master device is respectively connected with the SS port of the first slave device and the SS port of the second slave device in a communication mode, the SCK port of the master device is respectively connected with the SCK port of the first slave device and the SCK port of the second slave device in a communication mode, the MISO port of the master device is respectively connected with the SDO port of the first slave device and the SDI port of the second slave device in a communication mode, and the MOSI port of the master device is connected with the SDI port of the first slave device in a communication mode;

4. The SPI data dissemination system of claim 3, wherein said SDI port of said first slave device is further communicatively connected to said SDO port of said second slave device.

5. The SPI data dissemination system according to claim 1, wherein said second slave device is plural in number.

6. A method for SPI data dissemination, for use in an SPI data dissemination system as claimed in any one of claims 1 to 6, said method comprising:

when detecting that the first slave equipment is required to distribute data to the second slave equipment, the master equipment pulls down the chip selection signal;

the master device sends the pulled-down chip selection signal to the first slave device and the second slave device through a chip selection signal port of the master device, so that the first slave device sends data to the master device and the second slave device through an output port of the first slave device.

7. The SPI data dissemination method according to claim 6, wherein the step of the master device sending a pulled down chip select signal to the first and second slave devices through a chip select signal port of the master device comprises:

8. The SPI data dissemination method of claim 7, wherein the step of said first slave device transmitting data to said master device and said second slave device through an output port of said first slave device comprises:

9. The method of claim 7, wherein the SPI data dissemination method further comprises: