CN115294931A

CN115294931A - Display device, pixel circuit and driving method thereof

Info

Publication number: CN115294931A
Application number: CN202211046152.6A
Authority: CN
Inventors: 白久园; 穆鑫; 张家祥; 鞠亮亮; 王畅; 张育仁; 罗赞; 路保福; 吴承龙; 张斌
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2022-08-30
Filing date: 2022-08-30
Publication date: 2022-11-04

Abstract

The present disclosure provides a display device, a pixel circuit and a driving method thereof. The pixel circuit includes: a data writing sub-circuit coupled to the first node and the scan signal terminal for charging the first node; a light-emitting control sub-circuit, coupled to the first power terminal, the light-emitting control signal terminal, the second node, the third node, and the first electrode of the light-emitting device, for controlling the first power terminal to be coupled to the second node under the control of the light-emitting control signal terminal, and for controlling the third node to be coupled to the first electrode of the light-emitting device under the control of the light-emitting control signal terminal; the driving sub-circuit is coupled with the first node, the second node and the third node and is used for controlling the second node to be coupled with the third node under the control of the first node; and the first reset sub-circuit is coupled with the first pole of the light-emitting element and the first reset signal end and is used for resetting the first pole of the light-emitting element under the control of the first reset signal end. The present disclosure can reduce the occurrence of a black picture brightening phenomenon.

Description

Display device, pixel circuit and driving method thereof

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a display device, a pixel circuit, and a driving method thereof.

Background

The organic electroluminescent display is a new generation of display products following the liquid crystal display, and is becoming the mainstream and leading people in the display field due to its better color saturation, fast response speed, foldability, light weight and other properties. The organic electroluminescent display is yet to be further improved.

Disclosure of Invention

The present disclosure provides a display device, a pixel circuit and a driving method thereof, which can reduce the occurrence of a black frame brightening phenomenon.

According to an aspect of the present disclosure, there is provided a pixel circuit including:

a data writing sub-circuit, coupled to a first node and a scan signal terminal, for charging the first node under the control of the scan signal terminal;

a light-emitting control sub-circuit, coupled to the first power terminal, the light-emitting control signal terminal, the second node, the third node, and the first electrode of the light-emitting device, for controlling the first power terminal to be coupled to the second node under the control of the light-emitting control signal terminal, and for controlling the third node to be coupled to the first electrode of the light-emitting device under the control of the light-emitting control signal terminal;

a driving sub-circuit coupled to the first node, the second node and the third node, for controlling the second node to be coupled to the third node under the control of the first node;

a first reset sub-circuit, coupled to the first pole of the light emitting element and a first reset signal terminal, for resetting the first pole of the light emitting element under the control of the first reset signal terminal;

in a display frame, the output signal of the first reset signal end comprises a plurality of first time intervals, the output signal of the light-emitting control signal end comprises a plurality of second time intervals, the output signal of the first reset signal end is at an active level in the first time intervals, and the output signal of the light-emitting control signal end is at an inactive level in the second time intervals; the plurality of first time intervals are in one-to-one correspondence with the plurality of second time intervals, and each first time interval is located in the corresponding second time interval.

Further, the light emission control sub-circuit includes:

a first light emission control transistor having a control electrode coupled to the light emission control signal terminal, a first electrode coupled to the first power terminal, and a second electrode coupled to the second node;

a second emission control transistor, a control electrode of which is coupled to the emission control signal terminal, a first electrode of which is coupled to the third node, and a second electrode of which is coupled to the first electrode of the light emitting device.

Further, the driving sub-circuit includes:

a drive transistor having a control electrode coupled to the first node, a first electrode coupled to the second node, and a second electrode coupled to the third node; and/or

The first reset sub-circuit comprises a first reset transistor, a control electrode of the first reset transistor is coupled with the first reset signal end, a first electrode of the first reset transistor is coupled with a first electrode of the light-emitting element, and a second electrode of the first reset transistor is coupled with an initialization signal end; and/or

The data writing sub-circuit comprises a data writing transistor, wherein a control electrode of the data writing transistor is coupled with the scanning signal end, a first electrode of the data writing transistor is coupled with the data signal end, and a second electrode of the data writing transistor is coupled with the second node.

Further, the pixel circuit further includes:

a compensation sub-circuit coupled to the first node, the third node and the scan signal terminal, for controlling the coupling of the first node and the third node under the control of the scan signal terminal.

Further, the compensation sub-circuit comprises:

a compensation transistor having a control electrode coupled to the scan signal terminal, a first electrode coupled to the first node, and a second electrode coupled to the third node.

Further, the pixel circuit further includes:

and the second reset sub-circuit is coupled with the first node and the second reset signal terminal and is used for resetting the first node under the control of the second reset signal terminal.

Further, the pixel circuit further includes:

and a storage sub-circuit coupled between the first node and the first power source terminal.

Further, the second reset sub-circuit includes:

a second reset transistor, a control electrode of the second reset transistor being coupled to the second reset signal terminal, a first electrode of the second reset transistor being coupled to the first node, and a second electrode of the second reset transistor being coupled to an initialization signal terminal.

According to an aspect of the present disclosure, there is provided a driving method of a pixel circuit, the driving method for driving the pixel circuit, the driving method including:

enabling the data writing sub-circuit to charge the first node under the control of the scanning signal end;

the light-emitting control sub-circuit controls the first power terminal to be coupled to the second node under the control of the light-emitting control signal terminal, and controls the third node to be coupled to the first electrode of the light-emitting element under the control of the light-emitting control signal terminal;

causing the drive subcircuit to control the second node to be coupled to the third node under control of the first node;

and enabling the first reset sub-circuit to reset the first pole of the light-emitting element under the control of the first reset signal terminal.

According to an aspect of the present disclosure, a display device is provided, which includes the pixel circuit and a light emitting element coupled to the pixel circuit.

According to the display device, the pixel circuit and the driving method thereof, the output signals of the light-emitting control signal end are invalid levels in the second time intervals, the time periods between the adjacent second time intervals are valid levels, and the first time intervals are correspondingly arranged in the second time intervals because the first time intervals are in one-to-one correspondence with the second time intervals, so that the first reset sub-circuit can reset the first electrode of the light-emitting element after the light-emitting control signal end outputs the valid levels every time, the light-emitting element is turned off as soon as possible, and the phenomena of black picture lightening, picture quality deterioration and the like can be reduced.

Drawings

Fig. 1 is a schematic diagram of a pixel circuit of an embodiment of the present disclosure.

Fig. 2 is an operation timing diagram of the pixel circuit shown in fig. 1.

Fig. 3 is a schematic view of a display device according to an embodiment of the present disclosure.

Description of the reference numerals: 1. a data write sub-circuit; 2. a compensation sub-circuit; 3. a first reset sub-circuit; 4. a second reset sub-circuit; 5. a light emission control sub-circuit; 6. a drive sub-circuit; 7. a storage sub-circuit; 8. a display area; 9. a peripheral region; 10. a first gate drive circuit; 11. a second gate drive circuit; 12. and a third gate drive circuit.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Rather, they are merely examples of devices consistent with certain aspects of the present disclosure, as detailed in the appended claims.

The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in the description and in the claims, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. "plurality" or "a number" means two or more. Unless otherwise indicated, "front", "rear", "lower" and/or "upper" and the like are for convenience of description and are not limited to one position or one spatial orientation. The word "comprising" or "comprises", and the like, means that the element or item listed as preceding "comprising" or "includes" covers the element or item listed as following "comprising" or "includes" and its equivalents, and does not exclude other elements or items. In describing some embodiments, expressions of "coupled" and "connected," along with their derivatives, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, some embodiments may be described using the term "coupled" to indicate that two or more elements are in direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. As used in this disclosure and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

The embodiment of the disclosure provides a pixel circuit. As shown in fig. 1 and 2, the pixel circuit may include a data writing sub-circuit 1, a light emission control sub-circuit 5, a driving sub-circuit 6, and a first reset sub-circuit 3, in which:

the data writing sub-circuit 1 is coupled to the first node N1 and the scan signal terminal GATE, and is configured to charge the first node N1 under the control of the scan signal terminal GATE. The light-emitting control sub-circuit 5 is coupled to a first power source terminal VDD, a light-emitting control signal terminal EM, a second node N2, a third node N3, and a first electrode of the light-emitting device L0, and is configured to control the first power source terminal VDD to be coupled to the second node N2 under the control of the light-emitting control signal terminal EM, and further control the third node N3 to be coupled to the first electrode of the light-emitting device L0 under the control of the light-emitting control signal terminal EM. The driving sub-circuit 6 is coupled to the first node N1, the second node N2 and the third node N3, and is configured to control the second node N2 to be coupled to the third node N3 under the control of the first node N1. The first reset sub-circuit 3 is coupled to the first pole of the light emitting element L0 and the first reset signal terminal RST1, and is configured to reset the first pole of the light emitting element L0 under the control of the first reset signal terminal RST1. In a display frame W, the output signal of the first reset signal terminal RST1 includes a plurality of first time intervals t1, the output signal of the emission control signal terminal EM includes a plurality of second time intervals t2, the output signal of the first reset signal terminal RST1 is at an active level in the first time intervals t1, and the output signal of the emission control signal terminal EM is at an inactive level in the second time intervals t 2; the first time intervals t1 correspond to the second time intervals t2 one by one, and each of the first time intervals t1 is located in the corresponding second time interval t2.

In the pixel circuit according to the embodiment of the disclosure, the output signal of the emission control signal terminal EM is at an inactive level in the second time interval t2, and the time period between adjacent second time intervals t2 is at an active level, and since the plurality of first time intervals t1 are in one-to-one correspondence with the plurality of second time intervals t2, and each first time interval t1 is correspondingly located in the second time interval t2, such an arrangement can ensure that the first reset sub-circuit 3 can reset the first pole of the light-emitting element L0 after the emission control signal terminal EM outputs the active level each time, so that the light-emitting element L0 is turned off as soon as possible, and the occurrence of phenomena such as black frame lightening and image quality deterioration can be reduced.

The following describes each part of the pixel circuit according to the embodiment of the present disclosure in detail:

the driving sub-circuit 6 is coupled to the first node N1, the second node N2 and the third node N3, and is configured to control the second node N2 to be coupled to the third node N3 under the control of the first node N1. For example, the driving sub-circuit 6 may include a driving transistor T1. A control electrode of the driving transistor T1 is coupled to the first node N1, a first electrode of the driving transistor T1 is coupled to the second node N2, and a second electrode of the driving transistor T1 is coupled to the third node N3.

The light-emitting control sub-circuit 5 is coupled to the first power terminal VDD, the light-emitting control signal terminal EM, the second node N2, the third node N3, and the first electrode of the light-emitting device L0, and is configured to control the first power terminal VDD to be coupled to the second node N2 under the control of the light-emitting control signal terminal EM, and further control the third node N3 to be coupled to the first electrode of the light-emitting device L0 under the control of the light-emitting control signal terminal EM. For example, the light emission control sub-circuit 5 may include a first light emission control transistor T6 and a second light emission control transistor T7. A control electrode of the first light-emitting control transistor T6 is coupled to the light-emitting control signal terminal EM, a first electrode of the first light-emitting control transistor T6 is coupled to the first power terminal VDD, and a second electrode of the first light-emitting control transistor T6 is coupled to the second node N2. A control electrode of the second emission control transistor T7 is coupled to the emission control signal terminal EM, a first electrode of the second emission control transistor T7 is coupled to the third node N3, and a second electrode of the second emission control transistor T7 is coupled to the first electrode of the light emitting element L0. The second electrode of the light emitting device L0 may be coupled to a second power source terminal VSS.

The pixel circuit may further comprise a compensation sub-circuit 2. The compensation sub-circuit 2 is coupled to the first node N1, the third node N3 and the scan signal terminal GATE, and is configured to control the coupling of the first node N1 and the third node N3 under the control of the scan signal terminal GATE. For example, the compensation sub-circuit 2 may comprise a compensation transistor T2. A control electrode of the compensation transistor T2 is coupled to the scan signal terminal GATE, a first electrode of the compensation transistor T2 is coupled to the first node N1, and a second electrode of the compensation transistor T2 is coupled to the third node N3.

The data writing sub-circuit 1 is coupled to the first node N1 and the scan signal terminal GATE, and is configured to charge the first node N1 under the control of the scan signal terminal GATE. For example, the data writing sub-circuit 1 includes a data writing transistor T3, a control electrode of the data writing transistor T3 is coupled to the scan signal terminal GATE, a first electrode of the data writing transistor T3 is coupled to a data signal terminal VDATA, and a second electrode of the data writing transistor T3 is coupled to the second node N2. When the data writing transistor T3, the compensation transistor T2 and the driving transistor T1 are all turned on, the data signal terminal VDATA is turned on with the first node N1 to charge the first node N1.

The first reset sub-circuit 3 is coupled to the first pole of the light emitting element L0 and a first reset signal terminal RST1, and is configured to reset the first pole of the light emitting element L0 under the control of the first reset signal terminal RST1. For example, the first reset sub-circuit 3 includes a first reset transistor T5, a control electrode of the first reset transistor T5 is coupled to the first reset signal terminal RST1, a first electrode of the first reset transistor T5 is coupled to the first electrode of the light emitting element L0, and a second electrode of the first reset transistor T5 is coupled to the initialization signal terminal VINI.

The pixel circuit may further comprise a second reset sub-circuit 4. The second reset sub-circuit 4 is coupled to the first node N1 and the second reset signal terminal RST2, and is configured to reset the first node N1 under the control of the second reset signal terminal RST 2. For example, the second reset sub-circuit 4 includes a second reset transistor T4. A control electrode of the second reset transistor T4 is coupled to the second reset signal terminal RST2, a first electrode of the second reset transistor T4 is coupled to the first node N1, and a second electrode of the second reset transistor T4 is coupled to an initialization signal terminal VINI. Furthermore, the pixel circuit may further include a storage sub-circuit 7. The memory sub-circuit 7 is coupled between the first node N1 and the first power source terminal VDD. For example, the storage sub-circuit 7 may include a storage capacitor C1. A first electrode of the storage capacitor C1 is coupled to the first node N1, and a second electrode of the storage capacitor C1 is coupled to the first power source terminal VDD.

The transistors used in the embodiments of the present disclosure may be thin film transistors, field effect transistors, or other devices having the same characteristics. Taking the above transistor as an example of a thin film transistor, the source and the drain of the thin film transistor are symmetrical, so the source and the drain can be interchanged. In the present disclosure, a gate electrode of the thin film transistor is referred to as a control electrode of the thin film transistor, a source electrode of the thin film transistor is referred to as a first electrode of the thin film transistor, and a drain electrode of the thin film transistor is referred to as a second electrode of the thin film transistor, or alternatively, the drain electrode may be referred to as the first electrode of the thin film transistor and the source electrode may be referred to as the second electrode of the thin film transistor.

The operation of the pixel circuit in fig. 1 will be described in detail with reference to the operation timing diagram of the pixel circuit shown in fig. 2, in which all the transistors are P-type thin film transistors, and the turn-on levels of all the transistors are low.

As shown in fig. 1 and 2, in the first reset phase S1 of the pixel circuit, the second reset signal terminal RST2 outputs a low level, the second reset transistor T4 is turned on, and the initialization signal terminal VINI is turned on with the first node N1 to reset the first node N1.

As shown in fig. 1 and 2, in the data writing phase S2 of the pixel circuit, the scan signal terminal GATE outputs a low level, and the data writing transistor T3 and the compensation transistor T2 are turned on. By setting the value of the output signal of the second reset signal terminal RST2 in advance, the difference between the potential of the control electrode of the driving transistor T1 and the potential of the first electrode can be made smaller than the threshold voltage Vth of the driving transistor T1, the driving transistor T1 can be also in the on state, the data signal terminal VDATA and the first node N1 are turned on to charge the first node N1, and the driving transistor T1 is turned off when the potential of the control electrode of the driving transistor T1 becomes (VDATA + Vth). Vdata is the potential of an output signal of a data signal end VDATA. The potential (Vdata + Vth) of the control electrode of the driving transistor T1 is stored and held in the storage capacitor C1.

As shown in fig. 1 and 2, in the light-emitting phase S3 of the pixel circuit, when the light-emitting control signal terminal EM outputs a low level, the first light-emitting control transistor T6 and the second light-emitting control transistor T7 are turned on, and the first power terminal VDD is coupled to the first electrode of the driving transistor T1. The driving transistor T1 generates an operating current applied to the light emitting element L0 as follows:

wherein mu is electron mobility, cox is gate oxide capacitance, and V _GS The voltage of the control electrode of the driving transistor T1 relative to the first electrode,

The channel region width-to-length ratio of the driving transistor T1. It can be known that the magnitude of the operating current is independent of the threshold voltage Vth of the driving transistor T1, so that the influence of the threshold voltage on the operating current is eliminated, and the pixel compensation is realized.

Furthermore, in one display frame W, the output signal of the first reset signal terminal RST1 includes a plurality of first time intervals t1, the output signal of the emission control signal terminal EM includes a plurality of second time intervals t2, the output signal of the first reset signal terminal RST1 is at an active level (low level) in the first time intervals t1, and the output signal of the emission control signal terminal EM is at an inactive level (high level) in the second time intervals t 2; the first time intervals t1 correspond to the second time intervals t2 one by one, and each first time interval t1 is located in the corresponding second time interval t 2; by the arrangement, the first reset transistor T5 can reset the first pole of the light-emitting element L0 before the light-emitting control signal end EM outputs a low level each time, the uniformity of the pulse intensity output by the light-emitting control signal can be improved, and the flicker feeling (flicker) of display is improved; meanwhile, it is ensured that the first reset transistor T5 can reset the first electrode of the light-emitting element L0 after the emission control signal terminal EM outputs the low level each time, so that the light-emitting element L0 is turned off as soon as possible, and the occurrence of the phenomena such as the lightening of the black screen and the deterioration of the image quality can be avoided.

The embodiment of the present disclosure further provides a driving method of a pixel circuit, which is used for driving the pixel circuit described in the above embodiment. The driving method of the pixel circuit may include: the data writing sub-circuit 1 charges the first node N1 under the control of the scan signal terminal GATE; the light-emitting control sub-circuit 5 is enabled to control the first power terminal VDD to be coupled to the second node N2 under the control of the light-emitting control signal terminal EM, and the light-emitting control sub-circuit 5 is enabled to control the third node N3 to be coupled to the first pole of the light-emitting element L0 under the control of the light-emitting control signal terminal EM; the driving sub-circuit 6 is made to control the second node N2 to be coupled with the third node N3 under the control of the first node N1; the first reset sub-circuit 3 is caused to reset the first pole of the light emitting element L0 under the control of the first reset signal terminal RST1. Since the pixel circuits driven by the driving method of the embodiment of the present disclosure are the same as the pixel circuits in the above embodiments, the same advantageous effects are obtained, and are not described herein again.

The embodiment of the disclosure also provides a display device. The display device may include the pixel circuit described in any one of the above and a light-emitting element L0 connected to the pixel circuit. As shown in fig. 3, the display device may include a display area 8 and a peripheral area 9 surrounding the display area 8. The peripheral region 9 may be provided with a first gate driving circuit 10 (GOA), a second gate driving circuit 11 and a third gate driving circuit 12. The output terminal of the first GATE driving circuit 10 may be the emission control signal terminal EM, the output terminal of the second GATE driving circuit 11 may be the scan signal terminal GATE, and the output terminal of the third GATE driving circuit 12 may be the first reset signal terminal RST1. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator and the like. Since the pixel circuits in the display device according to the embodiments of the present disclosure are the same as those in the above embodiments, the same advantageous effects are obtained, and are not described herein again.

Although the present disclosure has been described with reference to preferred embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the present disclosure.

Claims

1. A pixel circuit, comprising:

a light-emitting control sub-circuit, coupled to a first power source terminal, a light-emitting control signal terminal, a second node, a third node, and a first electrode of a light-emitting device, for controlling the first power source terminal to be coupled to the second node under the control of the light-emitting control signal terminal, and for controlling the third node to be coupled to the first electrode of the light-emitting device under the control of the light-emitting control signal terminal;

2. The pixel circuit of claim 1, wherein the light emission control sub-circuit comprises:

3. The pixel circuit of claim 1, wherein the drive sub-circuit comprises:

The data writing sub-circuit comprises a data writing transistor, a control electrode of the data writing transistor is coupled with the scanning signal end, a first electrode of the data writing transistor is coupled with the data signal end, and a second electrode of the data writing transistor is coupled with the second node.

4. The pixel circuit according to claim 1, further comprising:

5. The pixel circuit of claim 4, wherein the compensation sub-circuit comprises:

6. The pixel circuit according to claim 1 or 4, further comprising:

and the second reset sub-circuit is coupled with the first node and a second reset signal end and is used for resetting the first node under the control of the second reset signal end.

7. The pixel circuit of claim 6, further comprising:

a memory sub-circuit coupled between the first node and the first power source terminal.

8. The pixel circuit of claim 6, wherein the second reset sub-circuit comprises:

9. A driving method of a pixel circuit, the driving method being for driving the pixel circuit according to any one of claims 1 to 8, the driving method comprising:

and enabling the first reset sub-circuit to reset the first pole of the light-emitting element under the control of the first reset signal end.

10. A display device comprising the pixel circuit according to any one of claims 1 to 9 and a light-emitting element coupled to the pixel circuit.