CN115225424A - CAN bus signal analysis method, device and system based on multi-core SoC - Google Patents
CAN bus signal analysis method, device and system based on multi-core SoC Download PDFInfo
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Abstract
The application provides a CAN bus signal analysis method, device and system based on a multi-core SoC. The method comprises the following steps: acquiring a first signal of a CAN bus through an MCU, wherein the first signal is a CAN signal; converting the first signal into a second signal through the MCU, wherein the second signal is an ETH signal; sending the second signal to an MPU; converting the second signal by the MPU to obtain the first signal; analyzing the first signal through the MPU to obtain an analysis result, wherein the analysis result comprises a signal value of the first signal; and updating the signal value to a corresponding signal value storage area.
Description
Technical Field
The application relates to the technical field of automotive electronics and electrical, in particular to a CAN bus signal analysis method, device and system based on a multi-core SoC.
Background
With the development of automobile technology, automobiles are rapidly developing on technical lines such as electrification, intellectualization and networking, signals required to be processed and executed instructions on the automobiles are more and more, and the development method of a traditional single-core MCU (Micro Control Unit) is difficult to process increasingly complex CAN (Controller Area Network) bus data and instructions.
Disclosure of Invention
The application provides a method, a device and a system for analyzing CAN bus information based on a multi-core SoC, which are used for processing CAN bus data in an automobile electronic and electrical system.
In a first aspect, the present application provides a method for analyzing a CAN bus signal based on a multi-core SoC, including:
acquiring a first signal of a Controller Area Network (CAN) bus through a Micro Control Unit (MCU), wherein the first signal is a CAN signal;
converting the first signal into a second signal through the MCU, wherein the second signal is an Ethernet (ETH) signal;
sending the second signal to a Micro Processing Unit (MPU);
converting the second signal by the MPU to obtain the first signal;
analyzing the first signal through the MPU to obtain an analysis result, wherein the analysis result comprises a signal value of the first signal;
and updating the signal value to a corresponding signal value storage area.
In some optional embodiments, said converting, by said MCU, said first signal into a second signal comprises:
and the MCU converts the first signal into the second signal according to a preset control area network-Ethernet CAN-ETH routing table.
In some optional embodiments, said sending said second signal to an MPU comprises:
and the MCU transmits the second signal to the MPU through a communication channel.
In some optional embodiments, the parsing, by the MPU, the first signal to obtain a parsing result includes:
and determining the ID and the data of the first signal, and determining the signal value of the first signal in the data of the first signal according to a signal resolution mapping table corresponding to the ID of the first signal.
In some optional embodiments, the signal parsing mapping table is a structure array, and each entry of the structure array includes an ID of the CAN signal, a signal start byte, a signal start bit, a signal length, a signal value storage area index, and an offset of the signal in the signal value storage area.
In some optional embodiments, the determining, according to the ID-to-signal resolution mapping table of the first signal, a signal value of the first signal in the data of the first signal includes:
and searching the table entry of the signal analysis mapping table through the MPU, and analyzing the data of the first signal according to the signal start byte, the signal start bit and the signal length in the table entry to obtain the signal value.
In some optional embodiments, the updating the signal value to the corresponding signal value storage area includes:
and storing the signal value into a corresponding signal value storage area according to the signal value storage area index in the table entry and the offset of the signal in the signal value storage area.
In some optional embodiments, the signal value storage area is a structure variable, a structure member of the structure variable is a signal value to be stored, and the structure alignment mode is byte alignment.
In a second aspect, the present application provides a device for analyzing a CAN bus signal based on a multi-core SoC, including:
the device comprises an acquisition unit, a processing unit and a control unit, wherein the acquisition unit is configured to acquire a first signal of a CAN bus through an MCU (microprogrammed control unit), and the first signal is a CAN signal;
a first conversion unit configured to convert the first signal into a second signal through the MCU, wherein the second signal is an Ethernet (ETH) signal;
a transmission unit configured to transmit the second signal to an MPU;
the second conversion unit is configured to convert a second signal into the first signal through the MPU;
an analysis unit configured to analyze the first signal by the MPU to obtain an analysis result, wherein the analysis result includes a signal value of the first signal;
a storage unit configured to update the signal value to a corresponding signal value storage area.
In a third aspect, the present application provides a system for analyzing a CAN bus signal based on a multi-core SoC, including: the system comprises a CAN controller and a multi-core SoC, wherein the multi-core SoC comprises an MCU and an MPU; wherein,
the CAN controller receives a first signal from a CAN bus and sends the first signal to the MCU, wherein the first signal is a CAN signal;
the MCU receives the first signal and converts the first signal into a second signal, wherein the second signal is an Ethernet (ETH) signal;
the MCU sends the second signal to the MPU;
the MPU converts the second signal to obtain the first signal;
the MPU analyzes the first signal to obtain an analysis result, wherein the analysis result comprises a signal value of the first signal;
and the MPU updates the signal value to a corresponding signal value storage area.
According to the CAN bus signal analysis method based on the multi-core SoC, a first signal of a CAN bus is obtained through an MCU, wherein the first signal is a CAN signal; converting the first signal into a second signal through the MCU, wherein the second signal is an Ethernet (ETH) signal; sending the second signal to the MPU; converting the second signal by the MPU to obtain a first signal; analyzing the first signal through the MPU to obtain an analysis result, wherein the analysis result comprises a signal value of the first signal; and updating the signal value to a corresponding signal value storage area. Through above-mentioned technical scheme, put the acquirement of CAN data on MCU, put the analysis of CAN data on MPU, MPU analyzes the signal value in the CAN data, and with the signal value storage to corresponding signal memory area, MPU's dominant frequency is higher than MCU, through the receipt of the MCU processing CAN data of low dominant frequency, the MPU of high dominant frequency handles the analysis of CAN, the performance bottleneck problem of CAN data processing in the current MCU development has been solved.
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The drawings illustrate generally, by way of example, but not by way of limitation, various embodiments discussed herein.
Fig. 1 is a schematic flow chart of a method for analyzing a CAN bus signal based on a multi-core SoC according to the present application;
fig. 2 is a schematic flowchart of a method for analyzing a CAN bus signal based on a multi-core SoC according to another embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an embodiment of a multi-core SoC-based CAN bus signal analysis apparatus according to the present application;
fig. 4 is a schematic structural diagram of a CAN bus signal analysis system based on a multi-core SoC according to the present application.
Detailed Description
So that the manner in which the above recited features and aspects of the present invention can be understood in detail, a more particular description of the embodiments of the invention, briefly summarized above, may be had by reference to the appended drawings, which are included to illustrate, but are not intended to limit the embodiments of the invention.
In the description of the embodiments of the present application, it should be noted that, unless otherwise specified and limited, the term "connected" should be interpreted broadly, for example, as an electrical connection, a communication between two elements, a direct connection, or an indirect connection via an intermediate, and the specific meaning of the terms may be understood by those skilled in the art according to specific situations.
It should be noted that the terms "first \ second \ third" referred to in the embodiments of the present application are only used for distinguishing similar objects, and do not represent a specific ordering for the objects, and it should be understood that "first \ second \ third" may interchange a specific order or sequence when allowed. It should be understood that "first \ second \ third" distinct objects may be interchanged under appropriate circumstances such that the embodiments of the application described herein may be implemented in an order other than those illustrated or described herein.
In the embodiment of the present application, a multi-core SoC (System on Chip) includes one or more MCUs and one or more corresponding MPUs (Micro Processor units), where ETH (EtherNet) signal transmission may be performed between the MCUs and the MPUs through a communication channel. The form of the communication channel is not particularly limited in this application and in some embodiments, the communication channel may comprise, for example, a channel provided based on an ETH controller.
Referring to fig. 1, a flow 100 of one embodiment of a multi-core SoC based CAN bus signal parsing method according to the present application is shown. The CAN bus signal analysis method based on the multi-core SoC comprises the following steps:
and 101, acquiring a first signal of the CAN bus through the MCU.
Wherein, the first signal is a CAN signal.
Here, the CAN signal is a CAN bus signal. The CAN bus signal is a frame transmitted in the CAN bus, and the type of the frame in the CAN bus is not specifically limited in the present application, and may include, for example, a data frame, a remote frame, an error frame, an overload frame, and a frame interval.
And 102, converting the first signal into a second signal through the MCU.
Wherein the second signal is an ETH signal.
In some optional embodiments, converting the first signal into the second signal by the MCU may include:
and the MCU converts the first signal into a second signal according to a preset CAN-ETH routing table.
In some optional embodiments, sending the second signal to the MPU may include:
the MCU transmits the second signal to the MPU through the communication channel.
Here, the communication channel may include, for example, a channel controlled by the ETH controller, or the like.
And 104, converting the second signal by the MPU to obtain a first signal.
In some optional embodiments, converting the second signal into the first signal by the MPU may include:
and converting the second signal into the first signal by the MPU according to a preset CAN-ETH routing table.
And 105, analyzing the first signal through the MPU to obtain an analysis result.
Wherein the analysis result comprises a signal value of the first signal.
In some optional embodiments, parsing, by the MPU, the first signal to obtain a parsing result may include:
and determining the ID and the data of the first signal, and determining the signal value of the first signal in the data of the first signal according to the ID corresponding signal resolution mapping table of the first signal.
In this embodiment, the signal parsing mapping table is a structure array, and each item of the structure array includes an ID of a CAN signal, a signal start byte, a signal start bit, a signal length, a signal value storage area index, and an offset of the signal in a signal value storage area.
In some optional embodiments, determining a signal value of the first signal in the data of the first signal according to the ID corresponding signal resolution mapping table of the first signal may include:
and searching the table entry of the signal analysis mapping table through the MPU, and analyzing the data of the first signal according to the signal start byte, the signal start bit and the signal length in the table entry of the mapping table to obtain a signal value.
In some optional embodiments, parsing, by the MPU, the first signal to obtain a parsing result may include: determining an end byte and an end bit of the first signal; acquiring data from a starting byte to an ending byte in a first signal; shifting the data of the start byte to the right by the start bit length, and storing the shifted data into a temporary variable; and storing the data from the initial byte-1 to the end byte into a temporary variable to obtain a signal value.
And step 106, updating the signal value to a corresponding signal value storage area.
In the embodiment of the application, the signal value storage area is a structure variable, the structure member of the structure variable is a signal value to be stored, and the structure alignment mode is byte alignment.
In some optional embodiments, updating the signal value to the corresponding signal value storage area may include:
and storing the signal value into a corresponding signal value storage area according to the signal value storage area index in the table entry and the offset of the signal in the signal value storage area.
This application is through above-mentioned embodiment technical scheme, put the acquirement of CAN data on MCU, put the analysis of CAN data on MPU, MPU analyzes the signal value in the CAN data, and with signal value storage to corresponding signal memory area, MPU's dominant frequency is higher than MCU, the receipt of the MCU processing CAN data through low dominant frequency, the analysis of the MPU processing CAN of high dominant frequency, the performance bottleneck problem of CAN data processing in the current MCU development has been solved.
Referring now to fig. 2, therein is shown a flow chart 200 of yet another embodiment of a multi-core SoC based CAN bus signal parsing method according to the present application. The CAN bus signal analysis method based on the multi-core SoC comprises the following steps:
Here, the signal value storage area is defined, illustratively, as follows:
void* dc_data_mem_table[E_DC_Total_Data_Mem]。
illustratively, the signal resolution mapping table is defined as follows:
typedef struct {
int can _ id,/trigger resolution can _ id
charg sig _ byte// start byte of associated signal
Initial bit of char sig _ bit// related signal
char sig _ length// length of signal
char data _ type// data storage type
int data _ mem _ offset// offset of data member in data type
}dc_signal_map_t。
In step 202, the MCU acquires the CAN message, converts the CAN message into an ETH message and sends the ETH message to the MPU.
Illustratively, the CAN message 1 acquired by the MCU is: CANID1+ CANData1:0x30000000,0x01,0x02,0x03,0x04,0x05,0x6,0x07,0x08;
the CAN message 2 acquired by the MCU is: CANID2+ CANData2:0x30000001,0x10,0x12,0x13,0x14,0x15,0x16,0x17,0x18;
the MCU encapsulates the received CAN message 1 and CAN message 2 into Ethernet messages and sends the Ethernet messages to the MPU, and the ETH data packet is as follows:
ETHID1+ETHDateLength1+ETHData1+ETHID2+ETHDateLength2+ETHData2：0x100，0x00 0x00，0x00，0x08，0x01，0x02，0x03，0x04，0x05，0x6，0x07，0x08,0x101，0x00 0x00，0x00，0x08，0x10，0x12，0x13，0x14，0x15，0x16，0x17，0x18。
step 203: and the MPU maps the ETH message into a CAN message and acquires the ID and data of the CAN message.
Illustratively, the ETH packet received by the MPU is the ETH packet in step 202, and the MPU parses out CAN message 1:0x30000000,0x01,0x02,0x03,0x04,0x05,0x6,0x07,0x08;
CAN message 2:0x30000001,0x10,0x12,0x13,0x14,0x15,0x16,0x17, and 0x18.
The MPU acquires that the ID of the CAN message 1 is 0x30000000, and the data is 0x01,0x02,0x03,0x04,0x05,0x6,0x07,0x08.
The MPU acquires that the ID of the CAN message 2 is 0x30000001, and the data is 0x10,0x12,0x13,0x14,0x15,0x16,0x17,0x18.
Step 204: and the MPU searches a signal analysis mapping table according to the ID of the CAN message, and analyzes a signal value in the CAN message.
Illustratively, the signal mapping table of CAN message 1 and the signal mapping table of CAN message 2 are defined as follows:
const dc_signal_map_t dc_signal_map_table[]={
{0x30000000,0, 8, E _DC _vehicle _data _me _index, (int) & (((dc _ vehicle _ data _ t) _ 0) - > vehicle _ state) },// vehicle start state;
{0x30000000,1,0,8, e _dc _u _ vehicle _data _ mem _index, (int) & (((dc _ vehicle _ data _ t) _ 0) - > run _ mode) },// run mode;
{0x30000001,0, 16, E _DC _vehicle _data _me _index, (int) & (((dc _ vehicle _ data _ t) _ 0) - > speed) },// vehicle speed;
}。
according to the defined signal parsing mapping table, the MPU parses out that the signal value 1 included in CAN message 1 is 0x01, the signal value 2 included in CAN message 1 is 0x02, and the signal value 1 included in CAN message 2 is 0x1012.
Step 205: and the MPU updates the analyzed signal value to a corresponding signal value storage area.
Illustratively, according to the signal parsing map table and the signal value storage region defined in step 201, the MPU stores the signal value 1 in the CAN message 1 in the storage region DC _ data _ mem _ table [ E _ DC _ vehicle _ data _ mem _ index ] + (int) & (((DC _ vehicle _ data _ t _ 0) - > vehicle _ state), stores the signal value 2 in the CAN message 1 in the signal value storage region DC _ data _ mem _ table [ E _ DC _ vehicle _ data _ mem _ index ] + (int) & (((DC _ vehicle _ data _ t _ 0) - > run _ mode), and stores the signal value 1 in the CAN message 2 in the signal value storage region DC _ data _ mem _ table [ E _ DC _ vehicle _ data _ m _ index ] + (int) ((DC _ vehicle _ data _ t) 0) - > run _ mode).
Referring to fig. 3, as an implementation of the method shown in fig. 1, the present application provides an embodiment of a CAN bus signal analysis apparatus based on a multi-core SoC. As shown in fig. 3, the device 300 for analyzing a CAN bus signal based on a multi-core SoC of the present embodiment includes: acquisition unit 301, first conversion unit 302, transmission unit 303, second conversion unit 304, analysis unit 305, and storage unit 306. The acquiring unit 301 is configured to acquire a first signal of a CAN bus through the MCU, where the first signal is a CAN signal; a first conversion unit 302 configured to convert the first signal into a second signal through the MCU, wherein the second signal is an ethernet ETH signal; a transmission unit 303 configured to transmit the second signal to the MPU; a second conversion unit 304 configured to convert the second signal into a first signal by the MPU; an analysis unit 305 configured to analyze the first signal by the MPU to obtain an analysis result, wherein the analysis result includes a signal value of the first signal; a storage unit 306 configured to update the signal values to corresponding signal value storage areas.
In this embodiment, specific processing of the obtaining unit 301, the first converting unit 302, the sending unit 303, the second converting unit 304, the analyzing unit 305, and the storing unit 306 of the multi-core SoC-based CAN bus signal analyzing apparatus 300 and technical effects thereof may refer to the related descriptions of step 101 to step 106 in the corresponding embodiment of fig. 1, and are not repeated herein.
In some optional embodiments, the first conversion unit 302 is further configured to convert the first signal into the second signal by the MCU according to a preset CAN-ETH routing table.
In some optional embodiments, the transmitting unit 303 is further configured to transmit the second signal to the MPU through the communication channel by the MCU.
Here, the communication channel may include, for example, a channel controlled by the ETH controller, or the like.
In some optional embodiments, the second conversion unit 304 is further configured to convert the second signal into the first signal by the MPU according to a preset CAN-ETH routing table.
In some optional embodiments, the parsing unit 305 is further configured to determine an ID and data of the first signal, and determine a signal value of the first signal in the data of the first signal according to the ID of the first signal corresponding to the signal parsing mapping table.
In this embodiment, the signal parsing mapping table is a structure array, and each item of the structure array includes an ID of a CAN signal, a signal start byte, a signal start bit, a signal length, a signal value storage area index, and an offset of the signal in a signal value storage area.
In some optional embodiments, the parsing unit 305 is further configured to find an entry of the signal parsing mapping table by the MPU, and parse the data of the first signal according to the signal start byte, the signal start bit, and the signal length in the entry to obtain a signal value.
In some optional embodiments, parsing, by the MPU, the first signal to obtain a parsing result may include: determining an end byte and an end bit of the first signal; acquiring data from a starting byte to an ending byte in a first signal; shifting the data of the start byte by the length of the start bit to the right, and storing the shifted data into a temporary variable; and storing the data from the initial byte-1 to the end byte into a temporary variable to obtain a signal value.
In the embodiment of the application, the signal value storage area is a structure variable, the structure member of the structure variable is a signal value to be stored, and the structure alignment mode is byte alignment.
In some optional embodiments, the storage unit 306 is further configured to store the signal value into the corresponding signal value storage area according to the signal value storage area index in the table entry and the offset of the signal in the signal value storage area.
It should be noted that details of implementation and technical effects of the units in the multi-core SoC-based CAN bus signal analysis device provided in the embodiments of the present application may refer to descriptions of other embodiments in the present disclosure, and are not described herein again.
Referring now to fig. 4, therein is shown a system architecture 400 of one embodiment of a multi-core SoC based CAN bus signal resolution system according to the present application. The CAN bus signal analysis system based on the multi-core SoC CAN comprise: a CAN controller 401 and a multi-core SoC402, wherein the multi-core SoC402 includes an MCU403 and an MPU404.
The multi-core SoC-based CAN bus signal analysis system CAN be used for operating the multi-core SoC-based CAN bus signal analysis method shown in fig. 1, and exemplarily includes:
the CAN controller 401 receives a first signal from the CAN bus, and transmits the first signal to the MCU, where the first signal is a CAN signal.
The MCU403 receives the first signal and converts the first signal into a second signal, wherein the second signal is an ETH signal.
The MCU403 transmits the second signal to the MPU404.
The MPU404 converts the second signal to obtain a first signal.
The MPU404 analyzes the first signal to obtain an analysis result, wherein the analysis result includes a signal value of the first signal.
The MPU404 updates the signal values to the corresponding signal value storage areas.
In this embodiment, the CAN controller 401 may include a CAN controller and a transceiver, and the CAN controller 401 may be configured to receive CAN signals from a CAN bus and may be configured to transmit CAN signals to the MCU 403.
Illustratively, when the CAN controller and the transceiver receive CAN1 messages with CAN signal ID of 0x30000000, CAN signal data of 0x01,0x02,0x03,0x04,0x05,0x6,0x07,0x08 from the CAN bus, CAN1 messages are transmitted to the MCU processor.
The MCU processor converts the CAN1 message into an ETH1 message, the message format is ETH1ID + ETH1DataLength + ETH1Data, wherein ETH1ID =0x100, ETH1DataLength =0x00000008, ETH1Data is 0x01,0x02,0x03,0x04,0x05,0x6,0x07,0x08, the converted ETH1 message is packaged into a UDP message by the MCU and is sent to the MPU through the ETH controller.
The MPU receives a UDP message from the ETH controller, analyzes a CAN message contained in the UDP message, and maps ETH1ID =0x100 into CAN1ID =0x30000000 according to an ID mapping table {0x30000000,0x100} stored in an MPU memory; analyzing ETH1DataLength =0x00000008 in the UDP message to obtain CAN1DLC =8; the ETH1Data in the UDP message is analyzed to obtain CAN1Data of 0x01,0x02,0x03,0x04,0x05,0x6,0x07,0x08.
The MPU searches a signal mapping table according to the CAN1ID obtained by analysis:
constdc_signal_map_tdc_signal_map_table[]={
{0x30000000,0, 8, e _dc _u _ vehicle _udata _ mem _index, (int) & (((dc _ vehicle _ data _ t) _ 0) - > vehicle _ state) },// vehicle start-up state;
{0x30000000,1,0,8, e _dc _u _ vehicle _data _ mem _index, (int) & (((dc _ vehicle _ data _ t) _ 0) - > run _ mode) },// run mode;
{0x30000001,0, 16, e _dc _u _ vehicle _data _ mem _index, (int) & (((dc _ vehicle _ data _ t) _ 0) - > speed) },// vehicle speed;
}。
and analyzing the signal value in the CAN1 message, wherein the analysis algorithm is as follows:
and traversing each item in the dc _ signal _ map _ table, and when the CAN1ID and the CANID of a certain item in the dc _ signal _ map _ table are matched, obtaining a starting byte, a starting bit and a signal length of a signal to be analyzed from the item.
From the signal start byte, start bit, and signal length, the signal value 1=0x01 and the signal value 2=0x02 included in the CAN1 message are calculated.
The MPU updates the signal value 1 and the signal value 2 of the analyzed CAN1 message to the corresponding signal storage area, and the updating algorithm is as follows:
and traversing each item in the dc _ signal _ map _ table, and when the CAN1ID and the CANID of a certain item in the dc _ signal _ map _ table are matched, obtaining the index of the signal storage area to be analyzed and the storage area offset from the item.
According to the signal bank index and the bank offset, the signal value 1 is stored into DC _ data _ mem _ table [ E _ DC _ vehicle _ data _ mem _ index ] + (int) & (((DC _ vehicle _ data _ t × 0) - > vehicle _ state), and the signal value 2 is stored into DC _ data _ mem _ table [ E _ DC _ vehicle _ data _ mem _ index ] + (int) & (((DC _ vehicle _ data _ t × 0) - > run _ mode).
The technical solutions described in the embodiments of the present application may be arbitrarily combined without conflict.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A CAN bus signal analysis method based on a multi-core SoC comprises the following steps:
acquiring a first signal of a Controller Area Network (CAN) bus through a Micro Control Unit (MCU), wherein the first signal is a CAN signal;
converting the first signal into a second signal through the MCU, wherein the second signal is an Ethernet (ETH) signal;
sending the second signal to a Micro Processing Unit (MPU);
converting the second signal by the MPU to obtain the first signal;
analyzing the first signal through the MPU to obtain an analysis result, wherein the analysis result comprises a signal value of the first signal;
and updating the signal value to a corresponding signal value storage area.
2. The method of claim 1, wherein said converting, by the MCU, the first signal into a second signal comprises:
and the MCU converts the first signal into the second signal according to a preset control area network-Ethernet CAN-ETH routing table.
3. The method of claim 1, wherein said sending the second signal to an MPU comprises:
the MCU transmits the second signal to the MPU through a communication channel.
4. The method of claim 1, wherein said parsing the first signal by the MPU to obtain a parsed result comprises:
and determining the ID and the data of the first signal, and determining the signal value of the first signal in the data of the first signal according to a signal resolution mapping table corresponding to the ID of the first signal.
5. The method of claim 4, wherein the signal resolution mapping table is an array of structures, each of which includes an ID of the CAN signal, a signal start byte, a signal start bit, a signal length, a signal value storage area index, and an offset of the signal in the signal value storage area.
6. The method of claim 5, wherein the determining a signal value of the first signal in the data of the first signal according to the ID to signal resolution mapping table of the first signal comprises:
and searching the table entry of the signal analysis mapping table through the MPU, and analyzing the data of the first signal according to the signal start byte, the signal start bit and the signal length in the table entry to obtain the signal value.
7. The method of claim 6, wherein said updating said signal values to corresponding signal value storage areas comprises:
and storing the signal value into a corresponding signal value storage area according to the signal value storage area index in the table entry and the offset of the signal in the signal value storage area.
8. The method according to claim 1, wherein the signal value storage area is a structure variable, a structure member of the structure variable is a signal value to be stored, and the structure alignment mode is byte alignment.
9. A CAN bus signal analysis device based on a multi-core SoC comprises:
the CAN bus control device comprises an acquisition unit, a control unit and a control unit, wherein the acquisition unit is configured to acquire a first signal of a CAN bus through an MCU (microprogrammed control unit), and the first signal is a CAN signal;
a first conversion unit configured to convert the first signal into a second signal through the MCU, wherein the second signal is an ETH signal;
a transmission unit configured to transmit the second signal to an MPU;
the second conversion unit is configured to convert a second signal into the first signal through the MPU;
an analysis unit configured to analyze the first signal by the MPU to obtain an analysis result, wherein the analysis result includes a signal value of the first signal;
a storage unit configured to update the signal value to a corresponding signal value storage area.
10. A CAN bus signal analysis system based on multi-core SoC comprises: the system comprises a CAN controller and a multi-core SoC, wherein the multi-core SoC comprises an MCU and an MPU; wherein,
the CAN controller receives a first signal from a CAN bus and sends the first signal to the MCU, wherein the first signal is a CAN signal;
the MCU receives the first signal and converts the first signal into a second signal, wherein the second signal is an ETH signal;
the MCU sends the second signal to the MPU;
the MPU converts the second signal to obtain the first signal;
the MPU analyzes the first signal to obtain an analysis result, wherein the analysis result comprises a signal value of the first signal;
and the MPU updates the signal value to a corresponding signal value storage area.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116016024A (en) * | 2023-01-03 | 2023-04-25 | 重庆长安汽车股份有限公司 | Can message packaging system |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107566344A (en) * | 2017-08-03 | 2018-01-09 | 智车优行科技（北京）有限公司 | A kind of CAN signal analytic method and system |
| US20180062988A1 (en) * | 2016-08-31 | 2018-03-01 | Faraday&Future Inc. | Ethernet communication of can signals |
| CN112422358A (en) * | 2019-08-23 | 2021-02-26 | 上海汽车集团股份有限公司 | Bus signal analyzer and bus signal analyzing method |
| CN113132313A (en) * | 2019-12-31 | 2021-07-16 | 厦门雅迅网络股份有限公司 | Distributed CAN data processing method and system |
| CN114201416A (en) * | 2021-11-26 | 2022-03-18 | 智新科技股份有限公司 | Communication scheduling method for control core MCU and calculation core MPU |
| CN114282519A (en) * | 2021-12-13 | 2022-04-05 | 经纬恒润(天津)研究开发有限公司 | CAN data analysis method and device |
-
2022
- 2022-09-21 CN CN202211147115.4A patent/CN115225424A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20180062988A1 (en) * | 2016-08-31 | 2018-03-01 | Faraday&Future Inc. | Ethernet communication of can signals |
| CN107566344A (en) * | 2017-08-03 | 2018-01-09 | 智车优行科技（北京）有限公司 | A kind of CAN signal analytic method and system |
| CN112422358A (en) * | 2019-08-23 | 2021-02-26 | 上海汽车集团股份有限公司 | Bus signal analyzer and bus signal analyzing method |
| CN113132313A (en) * | 2019-12-31 | 2021-07-16 | 厦门雅迅网络股份有限公司 | Distributed CAN data processing method and system |
| CN114201416A (en) * | 2021-11-26 | 2022-03-18 | 智新科技股份有限公司 | Communication scheduling method for control core MCU and calculation core MPU |
| CN114282519A (en) * | 2021-12-13 | 2022-04-05 | 经纬恒润(天津)研究开发有限公司 | CAN data analysis method and device |
Non-Patent Citations (1)
| Title |
|---|
| 辛明华等: "纯电动汽车CAN信号解析", 《汽车工程师》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116016024A (en) * | 2023-01-03 | 2023-04-25 | 重庆长安汽车股份有限公司 | Can message packaging system |
| CN116016024B (en) * | 2023-01-03 | 2024-05-17 | 重庆长安汽车股份有限公司 | Can message packaging system |
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