CN115037382A - Shift operation method and device of adaptive channel equalization algorithm - Google Patents
Shift operation method and device of adaptive channel equalization algorithm Download PDFInfo
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Abstract
The invention relates to a shift operation method and a shift operation device of a shift operation method of a self-adaptive channel equalization algorithm, wherein the method comprises the following steps: taking the product of the real part of the polarization input signal and the first displacement as the numerical value of the shifter; taking a modulus value according to a real part of an equalization coefficient from the polarization input signal to the polarization output signal, and calculating a product of the modulus value and a second displacement quantity, wherein the second displacement quantity is the reciprocal of the minimum value in the first displacement quantity; acquiring a binary number of a product of the modulus value and a second displacement, and setting an enabling switch according to the bit distribution of the binary number, wherein the enabling switch is used for allowing the numerical value of the shifter to pass through in an on state; and acquiring a substitution result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switches. The problem of a large number of multipliers in the related art can be solved.
Description
Technical Field
The present invention relates to the field of digital signal processing technologies, and in particular, to a shift operation method and apparatus for an adaptive channel equalization algorithm.
Background
With the rapid development of network services and the continuous update of communication demands, the demands for improving communication speed in other scenarios outside the backbone network are increasing, such as short-distance communication scenarios of data centers, access networks, and the like. The coherent optical communication technology can fully play the advantage of high speed and play a role in a short-distance communication scene. However, due to the higher demands for low cost and low power consumption in short-distance scenes, the traditional complex coherent optical communication technology is difficult to be directly applied. The traditional coherent optical communication technology is high in complexity of a system and an algorithm, and needs to depend on a complex Digital Signal Processing (DSP) chip, so that the large-scale application of the coherent optical communication technology in a short-distance scene is restricted.
An adaptive channel equalization algorithm in the related art adopts a butterfly algorithm structure of 2 × 2 Multiple Input Multiple Output (MIMO) based on a complex multiplier, and is composed of 4 nth-order complex calculation modules. For an N-order 2 × 2 butterfly adaptive equalization module, N complex multipliers are required for each calculation, and 4N complex multipliers are consumed for four calculations. The multiplier is a scarcer hardware resource, and is more difficult to implement compared with other algorithm resources such as an adder or a comparator, so that the chip cost of the multiplier with a large number is higher. Meanwhile, the use of a large number of multipliers can cause the increase of chip power consumption, and is not favorable for the application of the high-speed coherent optical communication technology in short-distance scenes.
Disclosure of Invention
The embodiment of the invention provides a shift operation method and a shift operation device for a self-adaptive channel equalization algorithm, which are used for solving the problem of more multipliers in the related art.
The embodiment of the invention provides a shift operation method of a self-adaptive channel equalization algorithm, which is characterized by comprising the following steps:
taking the product of the real part of the polarization input signal and a first displacement amount as the numerical value of the shifter, wherein the first displacement amount is M +1 numerical values which are more than 0 and less than 1, and M is an integer which is more than or equal to 0;
taking a modulus value according to a real part of an equilibrium coefficient from the polarization input signal to the polarization output signal, and calculating a product of the modulus value and a second displacement quantity, wherein the second displacement quantity is the reciprocal of the minimum value in the first displacement quantity;
acquiring a binary number of a product of the modulus value and a second displacement, and setting an enabling switch according to the bit distribution of the binary number, wherein the enabling switch is used for allowing the numerical value of the shifter to pass through in an on state;
and acquiring a substitution result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switches.
In some embodiments, said taking the product of the real part of the polarized input signal and the first amount of displacement as the value of the displacer comprises the steps of:
setting a displacement step number M, and acquiring a corresponding first displacement amount under the condition that M is sequentially from 0 to M;
the first displacement amount is a m Wherein a is a number greater than 0 and less than 1;
and multiplying the real part of the polarization input signal by a first displacement quantity when m takes different values in sequence, and taking the product as the numerical value of the shifter.
In some embodiments, the setting the enable switch according to the bit distribution of the binary number includes:
correspondingly setting an enable switch on the bit of the binary number, so that the enable switches from the highest bit to the lowest bit sequentially and correspondingly control the on-off of the numerical value of the shifter when M is 0 to M;
the corresponding enable switch state is on when the bit is 1.
In some embodiments, the obtaining a substitute result of the multiplication of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the enable switch output values includes:
carrying out sign bit compensation on the accumulated value of the output values of the enable switches according to the sign bit of the real part of the equalization coefficient;
and taking the result after sign bit compensation as a substitute result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient.
In some embodiments, the compensating the sign bit of the accumulated value of the output value of the enable switch according to the sign bit of the real part of the equalization coefficient includes:
if the sign bit is negative, inverting the accumulated value of the output values of the enable switches, and taking the inverted result as the result after sign bit compensation;
and if the sign bit is positive, directly taking the accumulated value of the output values of the enable switches as the result of sign bit compensation.
In another aspect, an embodiment of the present invention provides a shift operation device for an adaptive channel equalization algorithm, including:
a displacement module to:
taking the product of the real part of the polarization input signal and a first displacement quantity as the numerical value of the shifter, wherein the first displacement quantity is M +1 numerical values which are more than 0 and less than 1, and M is an integer which is more than or equal to 0;
taking a modulus value according to a real part of an equalization coefficient from the polarization input signal to the polarization output signal, and calculating a product of the modulus value and a second displacement quantity, wherein the second displacement quantity is the reciprocal of the minimum value in the first displacement quantity;
a gating module to:
acquiring a binary number of the product of the modulus value and the second displacement, and setting an enable switch according to the bit distribution of the binary number, wherein the enable switch is used for allowing the numerical value of the shifter to pass through when in an on state;
and acquiring a substitution result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switches.
In some embodiments, the displacement module is further configured to:
setting a displacement step number M, and acquiring a corresponding first displacement amount under the condition that M is sequentially from 0 to M;
the first displacement amount is a m Wherein a is a number greater than 0 and less than 1;
and multiplying the real part of the polarization input signal by a first displacement quantity when m takes different values in sequence, and taking the product as the numerical value of the shifter.
In some embodiments, the gating module is further configured to:
correspondingly setting an enabling switch on the bit of the binary number, so that the enabling switches from the highest bit to the lowest bit sequentially and correspondingly control the on-off of the numerical value of the shifter when M is between 0 and M;
when the bit is 1, the corresponding enable switch is on.
In some embodiments, the gating module is further configured to:
carrying out sign bit compensation on the accumulated value of the output values of the enable switches according to the sign bit of the real part of the equalization coefficient;
and taking the result after sign bit compensation as a substitute result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient.
In some embodiments, the gating module is further configured to:
if the sign bit is negative, inverting the accumulated value of the output values of the enable switches, and taking the inverted result as the result after sign bit compensation;
and if the sign bit is positive, directly taking the accumulated value of the output values of the enable switches as the result of sign bit compensation.
The embodiment of the invention replaces the multiplication operation of the original polarization input signal real part and the equilibrium coefficient real part by using the mode that the equilibrium coefficient real part shifts and accumulates the polarization input signal real part, thereby realizing the self-adaptive channel equilibrium algorithm by replacing a multiplier in the self-adaptive channel equilibrium algorithm based on simple logic units such as an adder, a shifter, an enable switch and the like, and achieving the purpose of reducing the cost and the power consumption of a DSP (digital signal processor) at a receiving end without the participation of the multiplier in the algorithm.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a shift operation method of an adaptive channel equalization algorithm according to an embodiment of the present invention;
fig. 2 is a block diagram of a conventional 2 × 2 butterfly adaptive channel equalization algorithm according to an embodiment of the present invention;
fig. 3 is a block diagram of an N-order complex calculation module in a conventional 2 × 2 butterfly adaptive channel equalization algorithm according to an embodiment of the present invention;
fig. 4 is a block diagram of a complex multiplier in an N-th order complex computing module according to an embodiment of the present invention;
FIG. 5 is a block diagram of the logic units in the shift operation method according to the embodiment of the present invention;
fig. 6 is a schematic structural diagram of a shift operation device of an adaptive channel equalization algorithm according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
As shown in fig. 1, an embodiment of the present invention provides a shift operation method for an adaptive channel equalization algorithm, which includes the steps of:
s100, taking the product of the real part of the polarization input signal and a first displacement quantity as the numerical value of a shifter, wherein the first displacement quantity is M +1 numerical values which are more than 0 and less than 1, and M is an integer which is more than or equal to 0;
s200, taking a modulus value according to a real part of an equilibrium coefficient from the polarization input signal to the polarization output signal, and calculating a product of the modulus value and a second displacement, wherein the second displacement is the reciprocal of the minimum value in the first displacement;
s300, acquiring a binary number of the product of the modulus value and the second displacement, and setting an enabling switch according to the bit distribution of the binary number, wherein the enabling switch is used for allowing the numerical value of the shifter to pass through in an on state;
and S400, acquiring a substitution result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switch.
It should be noted that, as shown in fig. 2 and 3, the conventional 2 × 2 butterfly adaptive channel equalization algorithm is composed of 4N-order complex calculation modules. Einx and Einy are X, Y two-path polarized input complex signals, F xx ，F yx ，F xy ，F yy Four paths of complex coefficients are respectively updated in real time by a coefficient updating algorithm. The input complex signal is multiplied by the complex coefficient and then summed to obtain the output signal. The intersymbol interference caused by chromatic dispersion, polarization-dependent loss, polarization-dependent dispersion and various device damages can be compensated through the self-adaptive channel equalization module, polarization demultiplexing is completed, and X, Y two paths of polarization signals Eoutx and Eouty are recovered. The calculation of the 2 × 2 butterfly adaptive channel equalization algorithm is shown in equations (1) and (2):
wherein Einx and Einy are respectively input of X, Y two paths of polarization signals, Eoutx and Eouty are respectively output of the equalization algorithm module, and F is bothUpdating coefficient of the balance algorithm module, and the upper right small mark represents the input and output directions of the polarization state, wherein F xx Is the coefficient of the X-polarized input signal to the X-polarized output signal, F xy Is the coefficient of the X-polarized input signal to the Y-polarized output signal, F yx Is the coefficient of the Y-polarized input signal to the X-polarized output signal, F yy Is the coefficient of the Y-polarized input signal to the Y-polarized output signal. i is the index of the number of the equalization module stages, and the value range is 1 to N. For an N-order 2 × 2 butterfly adaptive equalization module, N complex multipliers are required for each calculation, and 4N complex multipliers are consumed for four calculations. The multiplier is a scarcer hardware resource, and is more difficult to implement than other algorithm resources such as an adder or a comparator, so that the chip cost of the multiplier with a large number is higher. Meanwhile, the use of a large number of multipliers can cause the increase of chip power consumption, and is not favorable for the application of the high-speed coherent optical communication technology in short-distance scenes.
The embodiment of the invention replaces the multiplication operation of the original polarization input signal real part and the equilibrium coefficient real part by using the mode that the equilibrium coefficient real part shifts and accumulates the polarization input signal real part, thereby realizing the self-adaptive channel equilibrium algorithm by replacing a multiplier in the self-adaptive channel equilibrium algorithm based on simple logic units such as an adder, a shifter, an enable switch and the like, and achieving the purpose of reducing the cost and the power consumption of a DSP (digital signal processor) at a receiving end without participating in the algorithm by the multiplier.
In some embodiments, S100 comprises the steps of:
s110, setting a displacement step number M, and acquiring a corresponding first displacement amount under the condition that M is sequentially 0-M;
s120, the first displacement is a m Wherein a is a number greater than 0 and less than 1;
and S130, multiplying the real part of the polarization input signal by the first displacement amount when m takes different values in sequence, and taking the product as the numerical value of the shifter.
Preferably, a may be 2, and thus, the first displacement amount is a value composed of one set of 1, 1/2, 1/4, 1/8.
In some embodiments, the setting the enable switch according to the bit distribution of the binary number in S300 includes:
s310, correspondingly setting an enable switch on the bit of the binary number, so that the enable switches from the highest bit to the lowest bit sequentially and correspondingly control the on-off of the numerical value of the shifter when M is between 0 and M;
and S320, when the bit is 1, the corresponding enabling switch is in an on state.
In some embodiments, S400 comprises the steps of:
s410, carrying out sign bit compensation on the accumulated value of the output values of the enable switch according to the sign bit of the real part of the equalization coefficient;
and S420, taking the result after sign bit compensation as a substitute result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient.
Further, S410 includes the steps of:
s411, if the sign bit is negative, the accumulated value of the output value of the enable switch is inverted, and the inverted result is used as the result after sign bit compensation;
and S412, if the sign bit is positive, directly taking the accumulated value of the output values of the enable switch as the result of sign bit compensation.
In a specific embodiment, for the case that 1 complex multiplier is composed of 4 real multipliers (including another case that 1 complex multiplier is composed of 3 real multipliers) provided as shown in fig. 4, the shift operation method provided in the embodiment of the present invention can be used for alternative processing. As shown in FIG. 5, the real part Einx1_ re of the input signal is polarized in the first order X and the corresponding real part coefficient F xx 1_ re as a replacement object, the shift operation method comprises the following steps:
s1: moving Einx1_ re to M bits from 0 to right in sequence to obtain Einx1_ re, Einx1_ re/2 and Einx1_ re/4 M The value of (b) is inputted as the value of the shifter corresponding to the enable switch set in step S3.
It should be noted that the size of the value M determines the precision of the shift operation module, and the larger M, the higher precision. From practical test results, the value of the QPSK modulation format M can be selected to be more than 6.
S2: obtaining F xx The module value Mod of 1_ re is shifted to M bit to obtain Mod × 2 M The numerical value of (c).
S3: will Mod x 2 M After the value of (2) is converted into a binary number, enable switches En0, En1 to EnM are respectively set on the Bit bits of the binary number by setting a binary Mod × 2 M The highest control En0, the next highest control Mod × 2M En1 M EnM. The enable switches En0, En1 to EnM are sequentially used to control the value of the shifter obtained when the shift to the right is 0 bit, 1 bit to the right is M bit in S1.
It should be noted that the enable switch may be set to be turned on when the corresponding Bit is 1, and may be set to be turned off when the Bit is 0. In this way, from F xx 1_ re controls the state of the M +1 enable switches, and the value of the shifter can only pass when the enable switch is open.
S4: the M +1 values Einx1_ re, Einx1_ re/2, Einx1_ re/4.. Einx1_ re/2 obtained in step S1 M Outputs from M +1 enable switches determined in step S3, and based on F xx 1_ re, the sign bit of the output data of step S3 is compensated, if F xx Negative 1_ re, inverting the output data, and if F is negative xx 1_ re is regular output data unchanged.
Based on the shift operation of this embodiment, the original Einx1_ re and F are compared xx Multiplication of 1_ re, approximated by F xx 1_ re performs shift and accumulate complete operations on Einx1_ re. The use number of multipliers in the DSP is reduced, and the purposes of reducing the power consumption and the cost of a receiving end are achieved.
As shown in fig. 6, an embodiment of the present invention further provides a shift operation apparatus for adaptive channel equalization algorithm, including:
a displacement module to:
taking the product of the real part of the polarization input signal and a first displacement quantity as the numerical value of the shifter, wherein the first displacement quantity is M +1 numerical values which are more than 0 and less than 1, and M is an integer which is more than or equal to 0;
taking a modulus value according to a real part of an equalization coefficient from the polarization input signal to the polarization output signal, and calculating a product of the modulus value and a second displacement quantity, wherein the second displacement quantity is the reciprocal of the minimum value in the first displacement quantity;
a gating module to:
acquiring a binary number of a product of the modulus value and a second displacement, and setting an enabling switch according to the bit distribution of the binary number, wherein the enabling switch is used for allowing the numerical value of the shifter to pass through in an on state;
and acquiring a substitution result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switches.
In some embodiments, the displacement module is further to:
setting a displacement step number M, and acquiring a corresponding first displacement amount under the condition that M is sequentially from 0 to M;
the first displacement amount is a m Wherein a is a number greater than 0 and less than 1;
and multiplying the real part of the polarization input signal by the first displacement amount when m takes different values in sequence, and taking the product as the numerical value of the shifter.
In some embodiments, the gating module is further configured to:
correspondingly setting an enabling switch on the bit of the binary number, so that the enabling switches from the highest bit to the lowest bit sequentially and correspondingly control the on-off of the numerical value of the shifter when M is between 0 and M;
the corresponding enable switch state is on when the bit is 1.
In some embodiments, the gating module is further configured to:
carrying out sign bit compensation on the accumulated value of the output values of the enable switches according to the sign bit of the real part of the equalization coefficient;
and taking the result after sign bit compensation as a substitute result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient.
In some embodiments, the gating module is further configured to:
if the sign bit is negative, inverting the accumulated value of the output values of the enable switches, and taking the inverted result as the result after sign bit compensation;
and if the sign bit is positive, directly taking the accumulated value of the output values of the enable switches as the result of sign bit compensation.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, or suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable storage media, which may include computer readable storage media (or non-transitory media) and communication media (or transitory media).
It is to be noted that, in the present invention, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A shift operation method of a self-adaptive channel equalization algorithm is characterized by comprising the following steps:
taking the product of the real part of the polarization input signal and a first displacement amount as the numerical value of the shifter, wherein the first displacement amount is M +1 numerical values which are more than 0 and less than 1, and M is an integer which is more than or equal to 0;
taking a modulus value according to a real part of an equilibrium coefficient from the polarization input signal to the polarization output signal, and calculating a product of the modulus value and a second displacement quantity, wherein the second displacement quantity is the reciprocal of the minimum value in the first displacement quantity;
acquiring a binary number of a product of the modulus value and a second displacement, and setting an enabling switch according to the bit distribution of the binary number, wherein the enabling switch is used for allowing the numerical value of the shifter to pass through in an on state;
and acquiring a substitution result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switches.
2. The method for performing shift operations in an adaptive channel equalization algorithm according to claim 1, wherein the step of multiplying the real part of the polarized input signal by the first amount of shift is used as the value of the shifter, comprising the steps of:
setting a displacement step number M, and acquiring a corresponding first displacement amount under the condition that M is sequentially from 0 to M;
the first displacement amount is a m Wherein a is a number greater than 0 and less than 1;
and multiplying the real part of the polarization input signal by a first displacement quantity when m takes different values in sequence, and taking the product as the numerical value of the shifter.
3. The method for performing shift operation of adaptive channel equalization algorithm according to claim 2, wherein said setting the enable switch according to the bit distribution of said binary number comprises the steps of:
correspondingly setting an enabling switch on the bit of the binary number, so that the enabling switches from the highest bit to the lowest bit sequentially and correspondingly control the on-off of the numerical value of the shifter when M is between 0 and M;
the corresponding enable switch state is on when the bit is 1.
4. The method for shift operation of adaptive channel equalization algorithm according to claim 1, wherein said obtaining a substitute result of multiplication of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switches comprises the steps of:
carrying out sign bit compensation on the accumulated value of the output values of the enable switches according to the sign bit of the real part of the equalization coefficient;
and taking the result after sign bit compensation as a substitute result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient.
5. The method for shift operation of an adaptive channel equalization algorithm as claimed in claim 4, wherein said sign bit compensating said accumulated value of said enable switch output value according to the sign bit of the real part of said equalization coefficient comprises the steps of:
if the sign bit is negative, negating an accumulated value of the output numerical values of the enable switches, and taking a negated result as the result after sign bit compensation;
and if the sign bit is positive, directly taking the accumulated value of the output values of the enable switches as the result of sign bit compensation.
6. A shift operation device for adaptive channel equalization algorithm, comprising:
a displacement module to:
taking the product of the real part of the polarization input signal and a first displacement amount as the numerical value of the shifter, wherein the first displacement amount is M +1 numerical values which are more than 0 and less than 1, and M is an integer which is more than or equal to 0;
taking a modulus value according to a real part of an equilibrium coefficient from the polarization input signal to the polarization output signal, and calculating a product of the modulus value and a second displacement quantity, wherein the second displacement quantity is the reciprocal of the minimum value in the first displacement quantity;
a gating module to:
acquiring a binary number of a product of the modulus value and a second displacement, and setting an enabling switch according to the bit distribution of the binary number, wherein the enabling switch is used for allowing the numerical value of the shifter to pass through in an on state;
and acquiring a substitution result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient based on the accumulated value of the output values of the enable switch.
7. The apparatus for performing shift operation on an adaptive channel equalization algorithm as claimed in claim 6, wherein said shift module is further configured to:
setting a displacement step number M, and acquiring a corresponding first displacement amount under the condition that M is sequentially from 0 to M;
the first displacement amount is a m Wherein a is a number greater than 0 and less than 1;
and multiplying the real part of the polarization input signal by the first displacement amount when m takes different values in sequence, and taking the product as the numerical value of the shifter.
8. The apparatus for performing shift operations in an adaptive channel equalization algorithm as claimed in claim 7, wherein said gating module is further configured to:
correspondingly setting an enable switch on the bit of the binary number, so that the enable switches from the highest bit to the lowest bit sequentially and correspondingly control the on-off of the numerical value of the shifter when M is 0 to M;
the corresponding enable switch state is on when the bit is 1.
9. The apparatus for performing shift operations in an adaptive channel equalization algorithm as claimed in claim 6, wherein said gating module is further configured to:
carrying out sign bit compensation on the accumulated value of the output value of the enable switch according to the sign bit of the real part of the equalization coefficient;
and taking the result after sign bit compensation as a substitute result of multiplication operation of the real part of the polarization input signal and the real part of the equalization coefficient.
10. The method for performing a shift operation in an adaptive channel equalization algorithm as claimed in claim 9, wherein said gating module is further configured to:
if the sign bit is negative, inverting the accumulated value of the output values of the enable switches, and taking the inverted result as the result after sign bit compensation;
and if the sign bit is positive, directly taking the accumulated value of the output values of the enable switches as the result of sign bit compensation.
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