CN115020446B - Display screen, manufacturing method thereof and terminal equipment - Google Patents

Abstract

Embodiments of the present application provide a display screen, a manufacturing method thereof, and a terminal device, which are applied in the technical field of terminals. The display screen includes a substrate, a plurality of photosensitive units arranged on the substrate, and a stress protection layer arranged on the side of the photosensitive unit away from the substrate, the stress protection layer includes a plurality of first stress protection structures, and each of the first stress protection structures An orthographic projection of the stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate. The photosensitive unit is rigidly reinforced by the first stress protection structure, and when it is subjected to external mechanical stress, the stress acting on the photosensitive unit is reduced by the first stress protection structure, thereby reducing the deformation of the photosensitive unit due to stress and improving the performance of the photosensitive unit. The stability of the performance of the photosensitive unit is improved, thereby improving the stability of the performance of the photoelectric sensor.

Description

Display screen, manufacturing method thereof, and terminal device

technical field

The present application relates to the technical field of terminals, in particular to a display screen, a manufacturing method thereof, and a terminal device.

Background technique

With the rapid development of terminal equipment, various photoelectric sensors are integrated on the terminal equipment to realize corresponding functions, for example, photoelectric sensors such as proximity light sensors, ambient light sensors, and fingerprint sensors are provided on the terminal equipment.

When the terminal device is subjected to external mechanical stress, the photoelectric sensor installed in the display screen will be deformed due to the stress, thereby affecting the performance of the photoelectric sensor.

Contents of the invention

Embodiments of the present application provide a display screen, a manufacturing method thereof, and a terminal device. By setting a first stress protection structure covering the photosensitive unit in the display screen, the first stress protection structure is used to rigidly reinforce the photosensitive unit to reduce the impact of stress on the photosensitive unit. The deformation caused by the cell improves the performance of the photoelectric sensor.

In the first aspect, an embodiment of the present application proposes a display screen, including a substrate, a photoelectric sensor disposed on the substrate, and a stress protection layer disposed on the side of the photoelectric sensor away from the substrate; the photoelectric sensor includes a plurality of photosensitive units, The stress protection layer includes a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate.

In this way, the photosensitive unit is rigidly reinforced by the first stress protection structure, and when subjected to external mechanical stress, the stress acting on the photosensitive unit is reduced by the first stress protection structure, thereby reducing the deformation of the photosensitive unit due to stress , improving the stability of the performance of the photosensitive unit, thereby improving the stability of the performance of the photoelectric sensor.

In an optional implementation manner, the first stress protection structure is in one-to-one correspondence with the photosensitive units, and the first stress protection structures corresponding to two adjacent photosensitive units are disconnected. In this way, by disconnecting the first stress protection structure corresponding to two adjacent photosensitive units, the conductive film layer in the pixel unit between two adjacent photosensitive units can be connected through the via hole, and the via hole can be reduced. The manufacturing process is difficult, and the probability of breaking the two conductive film layers in the via hole is reduced.

In an optional implementation manner, the photoelectric sensor further includes a signal reading circuit and an amplification circuit, and the signal reading circuit is respectively connected to each photosensitive unit and the amplification circuit. In this way, the photosensitive signal generated by the photosensitive unit is read by the signal reading circuit, and the photosensitive signal is amplified by the amplifier circuit to increase the signal strength of the photosensitive signal transmitted to the driving chip.

In an optional implementation manner, the stress protection layer further includes a second stress protection structure, an orthographic projection of the second stress protection structure on the substrate, and an orthographic projection of the covering signal reading circuit and the amplification circuit on the substrate. In this way, the signal reading circuit and the amplifying circuit are rigidly reinforced by the second stress protection structure, and when the terminal device is subjected to external mechanical stress, the stress acting on the signal reading circuit and the amplifying circuit is reduced by the second stress protection structure, Therefore, the deformation of the transistors in the signal reading circuit and the amplifying circuit due to external stress is reduced, and the stability of the transistors in the signal reading circuit and amplifying circuit is improved, thereby improving the performance stability of the photoelectric sensor.

In an optional implementation, the stress protection layer further includes a third stress protection structure and a fourth stress protection structure, the third stress protection structure is disconnected from the fourth stress protection structure; the third stress protection structure is formed on the substrate The orthographic projection on the substrate covers the orthographic projection of the signal reading circuit on the substrate, and the orthographic projection of the fourth stress protection structure on the substrate covers the orthographic projection of the amplification circuit on the substrate. In this way, the signal reading circuit is rigidly reinforced by the third stress protection structure, and when the terminal equipment is subjected to external mechanical stress, the stress acting on the signal reading circuit is reduced by the third stress protection structure; and by the fourth stress protection The structure rigidly reinforces the amplifying circuit, and when the terminal equipment is subjected to external mechanical stress, the fourth stress protection structure reduces the stress acting on the amplifying circuit.

In an optional implementation manner, the stress protection layer includes at least one organic protection layer. In this way, the use of organic materials to make the stress protection layer can reduce the difficulty of patterning the stress protection layer and facilitate the manufacture of the stress protection layer.

In an optional implementation, each photosensitive unit includes at least one photosensitive element, and each photosensitive element is a first transistor; the first transistor includes an active layer, a gate insulating layer, a gate layer, and a stacked layer. an interlayer dielectric layer and a source-drain electrode layer, the source-drain electrode layer includes a source electrode and a drain electrode, and the source electrode and the drain electrode are respectively connected to the active layer through via holes penetrating the interlayer dielectric layer and the gate insulating layer; the active layer It includes a channel region and doping regions located on both sides of the channel region, and the doping ions in the doping region are P-type ions. In this way, the use of the first transistor as the photosensitive unit makes the photosensitive element compatible with the manufacturing process of the OLED screen, and facilitates the integration of the photosensitive element on the OLED display screen.

In an optional implementation manner, the gate layer of the first transistor is a first conductive layer, and a material of the first conductive layer is a transparent conductive material. In this way, by using a transparent conductive material to make the gate layer of the first transistor, the intensity of incident light incident on the active layer of the first transistor can be increased, thereby increasing the intensity of the photosensitive signal generated.

In an optional implementation manner, the transistor in the signal reading circuit and the transistor in the amplifier circuit are second transistors, the gate layer of the second transistor includes a first conductive layer and a second conductive layer stacked, and the second transistor The second conductive layer is located on the side of the first conductive layer away from the substrate; the orthographic projection of the second conductive layer on the substrate covers the orthographic projection of the first conductive layer on the substrate, and the material of the second conductive layer is light-shielding and conductive Material. In this way, the second conductive layer is made of a light-shielding conductive material, and the first conductive layer is covered by the second conductive layer, so as to reduce the intensity of incident light incident on the channel region of the second transistor, thereby reducing the intensity of light generated by the second transistor. leakage current.

In an optional implementation, the display screen has a display area and a non-display area surrounding the display area, a plurality of photosensitive units are evenly distributed in the display area, and a signal reading circuit and an amplification circuit are located in the non-display area. In this way, by arranging the photosensitive unit in the display area, the area occupied by the photoelectric sensor in the non-display area can be reduced, thereby increasing the screen ratio of the terminal device.

In the second aspect, an embodiment of the present application proposes a method for manufacturing a display screen, including: forming a photoelectric sensor on a substrate, the photoelectric sensor including a plurality of photosensitive units; forming a stress protection layer on the side of the photoelectric sensor away from the substrate; wherein, The stress protection layer includes a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate.

In an optional implementation, the photoelectric sensor also includes a signal reading circuit and an amplification circuit; each photosensitive unit includes at least one photosensitive element, each photosensitive element is a first transistor, and the transistor and the amplifier in the signal reading circuit The transistor in the circuit is a second transistor; forming a photosensor on the substrate includes: forming an active layer of the first transistor and an active layer of the second transistor on the substrate; forming a gate insulating layer, a gate insulating layer Covering the active layer of the first transistor and the active layer of the second transistor; forming the gate layer of the first transistor and the gate layer of the second transistor on the gate insulating layer; forming an interlayer dielectric layer, an interlayer dielectric layer Covering the gate layer of the first transistor and the gate layer of the second transistor; forming the source and drain of the first transistor and the source and drain of the second transistor on the interlayer dielectric layer.

In this way, the active layer of the first transistor can be called the first active layer, the gate layer of the first transistor can be called the first gate layer, the active layer of the first transistor can be called the first source, and the first transistor can be called the first gate layer. The drain of the transistor can be called the first drain; the active layer of the second transistor can be called the second active layer, the gate layer of the second transistor can be called the second gate layer, and the source of the second transistor can be called the second gate layer. may be referred to as a second source, and the drain of the second transistor may be referred to as a second drain.

In an optional implementation manner, forming the gate layer of the first transistor and the gate layer of the second transistor on the gate insulating layer includes: sequentially forming a first conductive film and a second conductive film on the gate insulating layer Conductive thin film; the first conductive thin film and the second conductive thin film are patterned by using a half-tone mask to form the gate layer of the first transistor and the gate layer of the second transistor; wherein, the gate layer of the first transistor is The first conductive layer, the gate layer of the second transistor includes a first conductive layer and a second conductive layer stacked; the first conductive layer is obtained by patterning the first conductive film, and the second conductive layer is obtained by patterning the first conductive film Two conductive thin films are obtained by patterning.

In an optional implementation manner, forming the gate layer of the first transistor and the gate layer of the second transistor on the gate insulating layer includes: forming a first conductive film on the gate insulating layer; The conductive film is patterned to form the gate layer of the first transistor, and the first conductive layer included in the gate layer of the second transistor. The gate layer of the first transistor is the first conductive layer; A second conductive film is formed on one side of the substrate; patterning is performed on the second conductive film to form a second conductive layer included in the gate layer of the second transistor.

In a third aspect, the embodiment of the present application provides a terminal device, including a driver chip and the above-mentioned display screen, and the driver chip is connected to a signal output end of an amplification circuit included in the display screen.

The effects of the possible implementations of the second aspect and the third aspect are similar to those of the first aspect and the possible designs of the first aspect, and will not be repeated here.

Description of drawings

FIG. 1 is a schematic structural diagram of a terminal device provided in an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a display screen provided by an embodiment of the present application;

FIG. 3 is a schematic plan view of the photosensitive unit provided in the embodiment of the present application;

Fig. 4 is a sectional view obtained along section B-B' shown in Fig. 3;

FIG. 5 is a cross-sectional view of a transistor in a signal reading circuit or amplifying circuit provided by an embodiment of the present application;

FIG. 6 is a schematic structural diagram of another display screen provided by the embodiment of the present application;

Fig. 7 is a schematic diagram of the connection between the photosensitive unit, the signal reading circuit, the amplifier circuit and the driving chip provided by the embodiment of the present application;

FIG. 8 is a flowchart of a method for manufacturing a display screen provided by an embodiment of the present application.

Detailed ways

In order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with basically the same function and effect. For example, the first chip and the second chip are only used to distinguish different chips, and their sequence is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the number and execution order, and words such as "first" and "second" do not necessarily limit the difference.

It should be noted that, in the embodiments of the present application, words such as "exemplary" or "for example" are used as examples, illustrations or descriptions. Any embodiment or design described herein as "exemplary" or "for example" is not to be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete manner.

In the embodiments of the present application, "at least one" means one or more, and "multiple" means two or more. "And/or" describes the association relationship of associated objects, indicating that there may be three types of relationships, for example, A and/or B, which can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A, B can be singular or plural. The character "/" generally indicates that the contextual objects are an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one item (piece) of a, b, or c can represent: a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, c can be single or multiple .

At present, various photoelectric sensors are integrated on terminal equipment to realize corresponding functions. For example, a proximity light sensor is provided on the terminal device, and the photosensitive signal generated by the proximity light sensor is output to the driver chip to detect whether there is an obstruction approaching the terminal device. Therefore, the terminal device can use the proximity light sensor to detect that the user holds the terminal device close Ear talk, in order to automatically turn off the screen to save power, the proximity light sensor can also be used in leather case mode, automatic unlock and lock screen in pocket mode, etc.; and/or, set the ambient light sensor on the terminal device to generate The photosensitive signal is output to the driver chip to detect the ambient light brightness. The terminal device can adaptively adjust the brightness of the display screen according to the perceived ambient light brightness. The ambient light sensor can also be used to automatically adjust the white balance when taking pictures. The ambient light sensor can also be used with proximity The optical sensor cooperates to detect whether the terminal device is in the pocket to prevent accidental touch.

Wherein, the photoelectric sensor includes a plurality of photosensitive units, a signal reading circuit connected to each photosensitive unit, and an amplifying circuit connected to the output end of the signal reading circuit, and the signal output end of the amplifying circuit is connected to the driving chip through wires. The photosensitive unit may include multiple photosensitive elements connected in parallel, and the photosensitive elements may be phototransistors.

However, during the actual use of the terminal device, the terminal device may be subjected to external mechanical stress. For example, if the terminal device is bent, or the terminal device is hit by an external object, the external stress will act on the display screen. On the photosensitive unit, the phototransistor in the photosensitive unit is deformed, thereby affecting the performance stability of the transistor in the photosensitive unit. For example, when the phototransistor in the photosensitive unit is deformed, the threshold voltage of the phototransistor will shift, and even problems such as inability to receive light may occur.

Based on this, an embodiment of the present application provides a display screen, which includes a substrate, a plurality of photosensitive units disposed on the substrate, and a stress protection layer disposed on the side of the photosensitive units away from the substrate. The layer includes a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate. The photosensitive unit is rigidly reinforced by the first stress protection structure, and when it is subjected to external mechanical stress, the stress acting on the photosensitive unit is reduced by the first stress protection structure, thereby reducing the deformation of the photosensitive unit due to stress, and improving the performance of the photosensitive unit. The stability of the performance of the photosensitive unit is improved, thereby improving the stability of the performance of the photoelectric sensor.

The display screen provided by the embodiment of the present application can be applied in a terminal device, the display screen can be an organic light-emitting diode (organic light-emitting diode, OLED) display screen, and the terminal device can be a mobile phone, a tablet computer, a notebook computer, a wearable device For devices that are equipped with photoelectric sensors and require stress protection for the photosensitive units in the photoelectric sensors, this embodiment of the present application does not limit the specific technology and specific device form adopted by the terminal device.

As shown in FIG. 1, the terminal device 100 includes a display screen 10 and a housing 20. The display screen 10 is installed on the housing 20 and covers the housing cavity. It is used for displaying images or videos, and can be integrated in the display screen 10. There is a photoelectric sensor, which includes a plurality of photosensitive units, a signal reading circuit connected to each photosensitive unit, and an amplifying circuit connected to the output end of the signal reading circuit. The signal output end of the amplifying circuit is connected to the driver chip by wiring connect.

When the incident light is irradiated on the photosensitive unit, the photosensitive unit converts the light signal received from the incident light into a corresponding photosensitive signal, and reads it through the signal reading circuit, and the photosensitive signal read by the signal reading circuit is transmitted to the amplification circuit The amplifying circuit amplifies the input photosensitive signal, and the amplified photosensitive signal is input to the driver chip, and the driver chip performs detection according to the received photosensitive signal.

Schematically, FIG. 2 is a schematic structural diagram of a display screen provided by an embodiment of the present application. With reference to shown in Figure 2, display screen 10 has display area 11 and the non-display area 12 that surrounds display area 11, is provided with a plurality of pixel units (not shown in Figure 2) in display area 11, and in display area 11 A plurality of photosensitive units 31 are also arranged in the interior, and a signal reading circuit 32 and an amplification circuit 40 are arranged in the non-display area 12 .

In the embodiment of the present application, a plurality of photosensitive units 31 are evenly distributed in the display area 11 . For example, as shown in FIG. 2 , there are 4×3 photosensitive units 31 distributed in an array in the display area 11, that is, three photosensitive units 31 are evenly arranged on the row direction of the display screen 10, and evenly arranged on the column direction of the display screen 10. There are four photosensitive units 31; and, along the row direction of the display screen 10, the spacing between two adjacent photosensitive units 31 is equal, and along the column direction of the display screen 10, the distance between two adjacent photosensitive units 31 is equal. The distances between them are also equal, so that the plurality of photosensitive units 31 are evenly distributed in the display area 11 . By arranging the photosensitive unit 31 in the display area 11, the occupied area of the photoelectric sensor in the non-display area 12 is reduced, thereby increasing the screen ratio of the terminal device.

Of course, it can be understood that the number of photosensitive units 31 arranged in the display area 11 is not limited to 12 as shown in FIG. Units 31 , that is, eight photosensitive units 31 are evenly arranged in the row direction of the display screen 10 , and eight photosensitive units 31 are also evenly arranged in the column direction of the display screen 10 .

In addition, the driver chip 50 connected to the signal output end of the amplifier circuit 40 can also be arranged in the non-display area 12 of the display screen 10 . Specifically, the driver chip 50 can be directly bound in the non-display area 12, or a flexible printed circuit (FPC) can be used to bind the driver chip 50 in the non-display area 12 of the display screen 10. Examples are not limited to this.

It should be noted that, as shown in FIG. 2 , both the signal reading circuit 32 and the amplifier circuit 40 can be arranged at the upper border of the non-display area 12, and the driver chip 50 can be arranged at the lower border of the non-display area 12; Certainly, the positions of the signal reading circuit 32, the amplifier circuit 40 and the driver chip 50 on the display screen 10 are not limited to the positional relationship shown in FIG. limited.

FIG. 3 is a schematic diagram of the actual structure of the area A shown in FIG. 2 , and each photosensitive unit 31 is respectively connected to the control signal line V0 , the high-level signal line VDD and the first output signal line Out1 . The control signal line V0 extends along the row direction of the display screen 10, the number of the control signal line V0 is equal to the number of rows of photosensitive units 31 distributed in the display screen 10, and the plurality of photosensitive units 31 located in the same row are connected to the same control signal line V0 connection; while the high-level signal line VDD and the first output signal line Out1 extend along the column direction of the display screen 10, the number of the high-level signal line VDD is equal to the column number of the photosensitive units 31 distributed in the display screen 10, and is located at the same A plurality of photosensitive units 31 in a column are connected to the same high-level signal line VDD, and the number of first output signal lines Out1 is equal to the column number of photosensitive units 31 distributed in the display screen 10, and the plurality of photosensitive units in the same column Unit 31 is connected to the same first output signal line Out1.

The photosensitive unit 31 includes at least one photosensitive element, and each photosensitive element is a first transistor, which can also be called a phototransistor. When the photosensitive unit 31 includes a plurality of phototransistors, the plurality of phototransistors are connected in parallel, for example, each Each photosensitive unit 31 includes 50 to 1000 phototransistors connected in parallel.

Specifically, in the same photosensitive unit 31, the first gate layer of each phototransistor is connected to the control signal line V0, the source of each phototransistor is connected to the high-level signal line VDD, and the The drains are all connected to the first output signal line Out1.

Under the action of the control voltage input by the control signal line V0 and the high-level voltage input by the high-level signal line VDD, the phototransistor in the photosensitive unit 31 works in the cut-off region. However, since the phototransistor has a certain leakage current, When the phototransistor is irradiated by incident light, it will produce a characteristic drift, which will lead to an increase in the leakage current. When the intensity of the incident light is greater, the leakage current generated by the phototransistor will be greater. At this time, the leakage current can also be called The photocurrent of the photosensitive signal.

When the number of phototransistors connected in parallel in each photosensitive unit 31 is more, the photocurrent of the photosensitive signal generated by the photosensitive unit 31 is larger when the photosensitive unit 31 is irradiated by incident light. However, if one of the phototransistors is short-circuited, it will Therefore, by reasonably setting the number of phototransistors included in the photosensitive unit 31 at 50 to 1000, the photocurrent of the photosensitive signal generated by the photosensitive unit 31 is increased, and the photosensitive unit 31 is reduced. probability of short circuit.

In actual products, as shown in FIG. 3 , the display screen 10 also includes a substrate 101 on which the photosensitive unit 31 is disposed. Of course, the signal reading circuit 32 and the amplification circuit 40 are also disposed on the substrate 101 . The substrate 101 can be a rigid substrate, such as a glass substrate, or the substrate 101 can also be a flexible substrate, such as polyimide (polyimide, PI) and the like.

As shown in FIG. 4, the phototransistor in the photosensitive unit 31 includes: a first active layer 311, a first gate insulating layer 312, a first gate layer 313, a first interlayer dielectric layer 314 and a first A source-drain electrode layer, the first source-drain electrode layer includes a first source electrode 315 and a first drain electrode 316, and the first source electrode 315 and the first drain electrode 316 pass through the first interlayer dielectric layer 314 and the first The via holes of the gate insulating layer 312 are connected to the first active layer 311 .

The material of the first active layer 311 is low temperature polysilicon (low temperature poly-silicon, LTPS), which includes a first channel region 3111 and doped regions located on both sides of the first channel region 3111, namely the first doped region 3112 and the second doped region 3113, the dopant ions in the first doped region 3112 and the second doped region 3113 are P-type ions, therefore, by doping P-type ions on both sides of the first channel region 3111, This makes the phototransistor a P-type transistor.

The material of the first gate insulating layer 312 is an inorganic insulating material. For example, the first gate insulating layer 312 is a silicon nitride layer, or the first gate insulating layer 312 is a silicon oxide layer, or the first gate insulating layer 312 is a silicon nitride layer. The pole insulating layer 312 is a laminated structure of a silicon nitride layer and a silicon oxide layer. Correspondingly, the material of the first interlayer dielectric layer 314 can also be an inorganic insulating material, such as the first interlayer dielectric layer 314 is a silicon nitride layer, or the first interlayer dielectric layer 314 is a silicon oxide layer, or, The first interlayer dielectric layer 314 is a stacked structure of a silicon nitride layer and a silicon oxide layer. The material of the first source electrode 315 and the first drain electrode 316 is a conductive material, for example, the material of the first source electrode 315 and the first drain electrode 316 is a metal material such as copper.

Specifically, the first source electrode 315 is connected to the first doped region 3112 through a via hole penetrating through the first interlayer dielectric layer 314 and the first gate insulating layer 312, and the first drain electrode 316 is connected to the first doped region 3112 through a via hole penetrating through the first interlayer dielectric layer 314 and the first gate insulating layer 312. The dielectric layer 314 and the via hole of the first gate insulating layer 312 are connected to the second doped region 3113 .

Due to the pixel driving circuit included in the pixel unit arranged in the OLED display screen, the switching transistor and the driving transistor arranged therein can both adopt PMOS transistors, and the materials of the active layer are all low-temperature polysilicon; or, the driving transistor arranged in the pixel driving circuit It is a PMOS transistor, and its active layer material is low-temperature polysilicon, while the switching transistor is an NMOS transistor, and its active layer material is indium gallium zinc oxide (IGZO). Therefore, by using a P-type phototransistor to manufacture a photosensitive element, the photosensitive element can be compatible with the manufacturing process of the OLED screen.

等。通过采用透明导电材料制作光电晶体管的第一栅极层313，可提高入射至第一有源层311的入射光的强度，从而提高生成的感光信号的强度。Wherein, the first gate layer 313 of the phototransistor is the first conductive layer, and the material of the first conductive layer is a transparent conductive material, and the material of the first conductive layer is indium tin oxide (indium tin oxide, ITO), and its thickness can be set to

wait. By using a transparent conductive material to make the first gate layer 313 of the phototransistor, the intensity of incident light incident on the first active layer 311 can be increased, thereby increasing the intensity of the photosensitive signal generated.

It should be noted that the phototransistor shown in FIG. 4 is a top-gate transistor. In some products, the phototransistor can also be a bottom-gate transistor. At this time, the phototransistor includes a stacked first gate layer, A first gate insulating layer, a first active layer, and a first source and a first drain partially covering the first active layer.

In addition, only one phototransistor is shown in FIG. 3 and FIG. 4 to represent the photosensitive unit 31 . It can be understood that the photosensitive unit 31 in the embodiment of the present application may also be a plurality of phototransistors connected in parallel.

In addition, the display screen 10 also includes a signal reading circuit 32 and an amplifying circuit 40 arranged on the substrate 101. The signal reading circuit 32 includes a plurality of transistors, and the amplifying circuit 40 also includes a plurality of transistors. The signal reading circuit 32 The transistors in and the transistors in the amplifying circuit 40 are both referred to as second transistors.

As shown in FIG. 5, the second transistor also includes a second active layer 321, a second gate insulating layer 322, a second gate layer 323, a second interlayer dielectric layer 324 and a second source-drain electrode layer stacked. , the second source-drain electrode layer includes a second source electrode 325 and a second drain electrode 326, and the second source electrode 325 and the second drain electrode 326 respectively pass through the second interlayer dielectric layer 324 and the second gate insulating layer The via hole 322 is connected to the second active layer 321 .

The second active layer 321 includes a second channel region 3211 and doped regions located on both sides of the second channel region 3211, that is, a third doped region 3212 and a fourth doped region 3213, specifically, the second source 325 is connected to the third doped region 3212 through the via hole penetrating the second interlayer dielectric layer 324 and the second gate insulating layer 322, and the second drain 326 is connected to the third doped region 3212 through the second interlayer dielectric layer 324 and the second gate insulating layer 322. The vias of layer 322 are connected to the fourth doped region 3213 . The doping ions in the third doping region 3212 and the fourth doping region 3213 and the material of the second active layer 321 can be determined according to the specific type of the corresponding transistor.

Wherein, the second gate layer 323 of the second transistor includes a first conductive layer 3231 and a second conductive layer 3232 stacked, and the second conductive layer 3232 is located on a side of the first conductive layer 3231 away from the substrate 101 . The material of the first conductive layer 3231 is a transparent conductive material, for example, the material of the first conductive layer 3231 is ITO; the material of the second conductive layer 3232 is a light-shielding conductive material, for example, the material of the second conductive layer 3232 is Mo ( molybdenum).

Moreover, the orthographic projection of the second conductive layer 3232 on the substrate 101 covers the orthographic projection of the first conductive layer 3231 on the substrate 101 . In some embodiments, the orthographic projection of the second conductive layer 3232 on the substrate 101 completely coincides with the orthographic projection of the first conductive layer 3231 on the substrate 101. At this time, the orthographic projection of the second conductive layer 3232 on the substrate 101 The area of the orthographic projection is equal to the area of the orthographic projection of the first conductive layer 3231 on the substrate 101; in other embodiments, the second conductive layer 3232 not only covers the first conductive layer 3231, but also covers part of the second gate In this case, the area of the orthographic projection of the second conductive layer 3232 on the substrate 101 is greater than the area of the orthographic projection of the first conductive layer 3231 on the substrate 101 .

In addition, the second active layer 321 and the first active layer 311 can be disposed on the substrate 101 in the same layer, and the second gate insulating layer 322 and the first gate insulating layer 312 can be disposed in the same layer and made of the same material. The second interlayer dielectric layer 324 and the first interlayer dielectric layer 314 can be arranged in the same layer and made of the same material, and the second source-drain electrode layer and the first source-drain electrode layer can be arranged in the same layer and made of the same material.

In the embodiment of the present application, the second conductive layer 3232 is obtained by using a light-shielding conductive material, and the first conductive layer 3231 is covered by the second conductive layer 3232 to reduce the second channel region 3211 incident into the second active layer 321 The intensity of the incident light, thereby reducing the leakage current generated by the second transistor. In addition, using the first conductive layer 3231 and the second conductive layer 3232 together as the second gate layer 323 of the second transistor can also reduce the wiring resistance corresponding to the second gate layer 323 of the second transistor to a certain extent. .

It should be noted that the second transistor shown in FIG. 5 is a top-gate transistor, and in some products, the second transistor may also be a bottom-gate transistor. Moreover, FIG. 5 shows only one second transistor to represent all the transistors included in the signal reading circuit 32 and the amplifying circuit 40 . In fact, both the signal reading circuit 32 and the amplifying circuit 40 include a plurality of transistors.

In the embodiment of the present application, in order to reduce the deformation caused by external mechanical stress to the photoelectric sensor, a stress protection layer can be provided on the side of the photoelectric sensor away from the substrate 101, as shown in Figures 2 to 4, the stress protection layer includes A plurality of first stress protection structures 61, the first stress protection structures 61 are directly covered on the surface of the photosensitive unit 31 away from the substrate 101, that is, the first stress protection structures 61 can be connected with the first phototransistor in the photosensitive unit 31 The interlayer dielectric layer 314, the first source 315 and the first drain 316 are in direct contact, so that the orthographic projection of each first stress protection structure 61 on the substrate 101 covers the orthographic projection of the photosensitive unit 31 on the substrate 101 projection.

In actual products, the first stress protection structure 61 is also in contact with part of the substrate 101 outside the area where the photosensitive unit 31 is located. At this time, the area of the orthographic projection of the first stress protection structure 61 on the substrate 101 is larger than that of the photosensitive unit. 31 is the area of the orthographic projection on the substrate 101 .

As shown in FIG. 4 , the first gate insulating layer 312 between two adjacent photosensitive units 31 is disconnected, and the first interlayer dielectric layer 314 between two adjacent photosensitive units 31 is also disconnected, Of course, it can be understood that the first gate insulating layer 312 between two adjacent photosensitive units 31 can also be connected, and the first interlayer dielectric layer 314 between two adjacent photosensitive units 31 can also be connected.

Therefore, in the embodiment of the present application, the photosensitive unit 31 is rigidly reinforced by the first stress protection structure 61. When external mechanical stress is applied, the stress acting on the photosensitive unit 31 is reduced by the first stress protection structure 61, thereby reducing the photosensitive unit 31. The deformation of the unit 31 due to stress improves the performance stability of the phototransistor in the photosensitive unit 31 , thereby improving the performance stability of the photosensor.

In some embodiments, the first stress protection structure 61 corresponds to the photosensitive unit 31 one by one, and the orthographic projection of each first stress protection structure 61 on the substrate 101 covers the orthographic projection of one photosensitive unit 31 on the substrate 101 projection, and the first stress protection structures 61 corresponding to two adjacent photosensitive units 31 are disconnected.

At this time, the number of the first stress protection structures 61 is equal to the number of the photosensitive units 31 , and the distribution of the first stress protection structures 61 and the distribution of the photosensitive units 31 are also the same. That is to say, when the photosensor includes M×N photosensitive units 31 distributed in an array, the stress protection layer also includes M×N first stress protection structures 61 distributed in an array, and each first stress protection structure 61 is located at in display area 11.

Since not only the photosensitive unit 31 needs to be provided in the display area 11, but also the pixel unit needs to be provided, the pixel drive circuit in the pixel unit and some conductive film layers that need to be connected in the light-emitting device are not arranged on the same layer, such as the anode of the light-emitting device and the pixel driver. The drains of the driving transistors in the circuit are not set on the same layer. At this time, it is necessary to etch the insulating film layer between the two conductive film layers to form a through hole, and the two conductive film layers pass through the through hole. Vias for connection. If the first stress protection structure 61 corresponding to two adjacent photosensitive units 31 is not disconnected, the stress protection layer between the two photosensitive units 31 needs to be patterned to form through holes. However, Due to the large thickness of the stress protection layer, it is difficult to pattern the stress protection layer to form via holes; Large, and the area of the via hole is often small, which easily leads to the breakage of the two layers of conductive film in the via hole.

Therefore, in the embodiment of the present application, by disconnecting the first stress protection structures 61 corresponding to two adjacent photosensitive units 31 , it is possible to reduce the problem of the connection between the two conductive film layers in the pixel unit through the through hole. The manufacturing process is difficult, and the probability of breaking the two conductive film layers in the via hole is reduced.

In the embodiment of the present application, the stress protection layer includes at least one organic protection layer, that is, the first stress protection structure 61 is manufactured through at least one organic protection layer, and the material of the organic protection layer is an organic insulating material, for example, the organic The protective layer is made of organic resin or polyimide. In some embodiments, the organic resin can be a photosensitive resin, so that, in the process of patterning the photosensitive resin film to form an organic protective layer, it is not necessary to coat the photoresist on the photosensitive resin film , thereby reducing the manufacturing process of the stress protection layer.

Moreover, compared with inorganic insulating materials, the patterning treatment of organic insulating materials is less difficult. Therefore, using organic insulating materials to make the stress protection layer in the embodiment of the present application can reduce the difficulty of patterning the stress protection layer, which is convenient. Fabrication of the stress protection layer.

When the stress protection layer includes multiple organic protection layers, each layer of organic protection layers is sequentially stacked along the thickness direction of the display screen 10 (ie, from the substrate 101 to the direction where the photosensitive unit 31 is located). For example, as shown in Figure 2, the stress protection layer includes 2 layers of organic protection layers, so that the first stress protection structure 61 includes a first stress protection layer 611 and a second stress protection layer 612, and the first stress protection layer 611 directly covers the photosensitive unit 31 , the second stress protection layer 612 is disposed on the surface of the first stress protection layer 611 away from the photosensitive unit 31 .

Of course, the number of layers of the organic protective layer included in the stress protection layer is not limited to 2 layers, and can also be 3 layers, 4 layers, etc. When the number of layers of the organic protection layer included in the stress protection layer is more, the total number of stress protection layers The greater the thickness, the smaller the stress acting on the photosensitive unit 31, but it will affect the thickness of the display screen 10. Therefore, by reasonably setting the number of organic protective layers included in the stress protection layer, the stress acting on the photosensitive unit will be reduced. At the same time, the stress of 31 makes the thickness of the display screen 10 thinner.

It should be noted that when the stress protection layer includes multiple organic protection layers, the thicknesses of the organic protection layers of each layer can be equal or not equal; when the stress protection layer includes multiple organic protection layers, the thickness of each organic protection layer The materials can be the same or different; and the number of organic protective layers included in the first stress protection structure 61 corresponding to each photosensitive unit 31 can be set to be equal, for example, the first stress protection structure 61 corresponding to each photosensitive unit 31 Both include two organic protective layers.

As shown in FIG. 2 and FIG. 5 , the stress protection layer further includes a second stress protection structure 62, and the second stress protection structure 62 directly covers the surface of the signal reading circuit 31 and the amplification circuit 40 on the side away from the substrate 101, namely The second stress protection structure 62 may be in direct contact with the second interlayer dielectric layer 324, the second source 325, and the second drain 326 in the second transistor, and the second stress protection structure 62 is also in contact with the region where the second transistor is located. The outer part of the substrate 101 is in contact, so that the orthographic projection of the second stress protection structure 62 on the substrate 101 covers the orthographic projection of the signal reading circuit 32 and the amplification circuit 40 on the substrate 101. At this time, the second stress protection structure 62 The area of the orthographic projection of the structure 62 on the substrate 101 is larger than the area of the orthographic projection of the signal reading circuit 32 and the amplification circuit 40 on the substrate 101 .

When the terminal equipment is subjected to external mechanical stress, the stress may also act on the positions where the signal reading circuit 32 and the amplifying circuit 40 are located, causing the transistors in the signal reading circuit 32 and the amplifying circuit 40 to deform, thus affecting the signal reading The stability of the transistors within circuit 32 and amplifier circuit 40 is taken. Therefore, in the embodiment of the present application, the second stress protection structure 62 covering the signal reading circuit 32 and the amplifying circuit 40 can be set in the display screen 10, and the signal reading circuit 32 and the amplifying circuit 40 are rigidly provided by the second stress protection structure 62. Reinforcement, when the terminal equipment is subjected to external mechanical stress, the stress acting on the signal reading circuit 32 and the amplifying circuit 40 is reduced through the second stress protection structure 62, thereby reducing the stress in the signal reading circuit 32 and the amplifying circuit 40 The deformation of the transistors due to external stress improves the stability of the transistors in the signal reading circuit 32 and the amplifier circuit 40, thereby improving the performance stability of the photoelectric sensor.

In some embodiments, the number of film layers included in the second stress protection structure 62 is equal to the number of film layers included in the first stress protection structure 61 . For example, as shown in FIG. 4, the first stress protection structure 61 includes a first stress protection layer 611 and a second stress protection layer 612. As shown in FIG. 5, the second stress protection structure 62 includes a third stress protection layer 621 and a second stress protection layer Four stress protection layers 622 .

In the embodiment of the present application, the number of signal reading circuits 32 is smaller than the number of photosensitive units 31 , and the number of amplifying circuits 40 is one. When the reading speed of the signal reading circuit 32 to the photosensitive signal is fast, the number of the signal reading circuit in the embodiment of the present application can be set to one. At this time, all the photosensitive units 31 connected to the first The output signal line Out1 is all connected to the signal input end of the signal reading circuit; and when the signal reading circuit reads the photosensitive signal at a slower speed, the number of signal reading circuits in the embodiment of the application can be It is set to be multiple, for example, 4 signal reading circuits are set.

The number of the second stress protection structure 62 is one, which can cover all the signal reading circuits 32 and the amplifying circuits 40 to reduce the stress acting on the signal reading circuits 32 and the amplifying circuits 40 . Moreover, since the signal reading circuit 32 and the amplifying circuit 40 are both located in the non-display area 12 , the second stress protection structure 62 is also located in the non-display area 12 .

Schematically, FIG. 6 is a schematic structural diagram of another display screen provided by an embodiment of the present application. 6, the stress protection layer also includes a third stress protection structure 63 and a fourth stress protection structure 64, the third stress protection structure 63 is disconnected from the fourth stress protection structure 64, the third stress protection structure 63 and the fourth stress protection structure The number of the four stress protection structures 64 is one.

The third stress protection structure 63 directly covers the surface of the signal reading circuit 32 away from the substrate 101 , so that the orthographic projection of the third stress protection structure 63 on the substrate 101 covers the signal reading circuit 32 on the substrate 101 At this time, the area of the orthographic projection of the third stress protection structure 63 on the substrate 101 is larger than the area of the orthographic projection of the signal reading circuit 32 on the substrate 101 .

Correspondingly, the fourth stress protection structure 64 directly covers the surface of the amplification circuit 40 away from the substrate 101 , so that the orthographic projection of the fourth stress protection structure 64 on the substrate 101 covers the area of the amplification circuit 40 on the substrate 101 Orthographic projection, at this time, the area of the orthographic projection of the fourth stress protection structure 64 on the substrate 101 is larger than the area of the orthographic projection of the amplifier circuit 40 on the substrate 101 .

The signal reading circuit 32 is rigidly reinforced by the third stress protection structure 63. When the terminal device is subjected to external mechanical stress, the stress acting on the signal reading circuit 32 is reduced by the third stress protection structure 63, thereby reducing the The deformation of the transistors in the signal reading circuit 32 due to external stress; and the rigidity of the amplifying circuit 40 is reinforced by the fourth stress protection structure 64. When the terminal device is subjected to external mechanical stress, the fourth stress protection The structure 64 reduces the stress acting on the amplifying circuit 40 , thereby reducing the deformation of the transistors in the amplifying circuit 40 due to external stress.

It should be noted that the difference between the display screen 10 shown in FIG. 6 and the display screen 10 shown in FIG. 2 lies in the distribution of the stress protection structure for rigid reinforcement of the signal reading circuit 32 and the amplifying circuit 40. In FIG. 2 The orthographic projection of the second stress protection structure 62 on the substrate 101 covers the orthographic projection of the signal reading circuit 32 and the amplification circuit 40 on the substrate 101, while the third stress protection structure 63 in FIG. 6 is on the substrate 101 The orthographic projection of the signal reading circuit 32 on the substrate 101 is covered by the orthographic projection of the signal reading circuit 32 on the substrate 101, the orthographic projection of the fourth stress protection structure 64 on the substrate 101 covers the orthographic projection of the amplification circuit 40 on the substrate 101, and the other structures are basically similar .

In order to understand more clearly the connection relationship between the photosensitive unit 31, the signal reading circuit 32, the amplifier circuit 40 and the drive chip 50 in the embodiment of the present application, as shown in FIG. The level signal line VDD is connected, and the high-level signal line VDD is connected with the VDD pin of the driver chip 50, and the driver chip 50 provides a high-level voltage to the photosensitive unit 31 through the VDD pin and the high-level signal line VDD; The row photosensitive unit 31 is connected to the same control signal line V0, and the control signal line V0 is connected to the V0 pin of the driving chip 50, and the driving chip 50 provides control voltage to the photosensitive unit 31 through the V0 pin and the control signal line V0.

And the photosensitive unit 31 of the same column is also connected with the same first output signal line Out1, the first output signal line Out1 is connected with the signal input terminal In1 of the signal reading circuit 31, and the signal reading circuit 32 is also connected with the high The level signal line VDD, the first scanning signal line Scan1, the initialization signal line Vint, the second scanning signal line Scan2, the grounding line GND, and the reading signal line Tx are connected, while the high level signal line VDD, the first scanning signal line Scan1 , the initialization signal line Vint, the second scanning signal line Scan2, the grounding line GND, and the reading signal line Tx are all connected to corresponding pins of the driving chip 50 respectively.

The signal output terminal Out2 of the signal reading circuit 32 is connected with the signal input terminal In2 of the amplifying circuit 40, and the amplifying circuit 40 is also respectively connected with the high-voltage signal line Vgh, the low-voltage signal line Vgl and the third output signal line Out3, and the high-voltage signal line Vgh and the low-voltage signal line Vgl are also respectively connected to the corresponding pins of the driver chip 50, and the third output signal line Out3 is connected to the input pin In3 of the driver chip 50, so that the photosensitive signal generated by the photosensitive unit 31 in the embodiment of the present application, The first output signal line Out1 is transmitted to the signal reading circuit 32, and the signal reading circuit 32 inputs the read photosensitive signal to the signal input terminal In2 of the amplifying circuit 40. After the photosensitive signal is amplified by the amplifying circuit 40, it passes through the third The output signal line Out3 is transmitted to the driving chip 50 , and the amplified photosensitive signal is recognized by the driving chip 50 .

It should be noted that, in some embodiments, some external resistors and/or external capacitors may also be provided between the amplifier circuit 40 and the driver chip 50 according to actual needs, which will not be described too much in this embodiment of the present application.

Schematically, FIG. 8 is a flow chart of a method for manufacturing a display screen provided by an embodiment of the present application. Referring to FIG. 8 , a method for manufacturing a display screen provided by an embodiment of the present application may specifically include the following steps:

Step 801, forming a photoelectric sensor on a substrate.

In the embodiment of the present application, firstly, a substrate 101 is provided, and then a photosensor is formed on the substrate 101. Signal reading circuit 32 and amplifying circuit 40 in 12, a plurality of photosensitive units 31 are connected with the signal input end of signal reading circuit 32, and the signal output end of signal reading circuit 32 is connected with the signal input end of amplifying circuit 40, amplifies The signal output end of the circuit 40 is extended to the location of the driver chip 50 through the third output signal line Out3 so as to be bound with the driver chip 50 .

Wherein, each photosensitive unit 31 includes at least one photosensitive element, each photosensitive element is a first transistor, the transistor in the signal reading circuit 32 and the transistor in the amplifier circuit 40 are the second transistor, the first transistor and the second transistor The specific formation process is as follows:

First, the first active layer 311 of the first transistor and the second active layer 321 of the second transistor are formed on the substrate 101 by patterning; then, a layer covering the first active layer 311 and the second active layer 321 is formed. The gate insulating layer, the gate insulating layer can also cover the substrate 101 outside the area where the first active layer 311 and the second active layer 321 are located, when the second gate insulating layer 322 and the first gate insulating layer When the layers 312 are arranged in the same layer and are connected to each other, the second gate insulating layer 322 and the first gate insulating layer 312 can be collectively referred to as a gate insulating layer; then, a first transistor is formed on the gate insulating layer using a patterning process. The first gate layer 313 of the second transistor and the second gate layer 323 of the second transistor; then, an interlayer dielectric layer covering the first gate layer 313 and the second gate layer 323 is formed, and the interlayer dielectric layer may also cover For the gate insulating layer outside the area where the first gate layer 313 and the second gate layer 323 are located, when the first interlayer dielectric layer 314 and the second interlayer dielectric layer 324 are arranged on the same layer and connected to each other, the second The interlayer dielectric layer 314 and the second interlayer dielectric layer 324 are collectively referred to as an interlayer dielectric layer; finally, a patterning process is used on the interlayer dielectric layer to form the first source 315 and the first drain 316 of the first transistor , and the second source 325 and the second drain 326 of the second transistor.

Since the first gate layer 313 of the first transistor is the first conductive layer, and the second gate layer 323 of the second transistor includes the first conductive layer 3231 and the second conductive layer 3232 stacked, therefore, when forming the first The first gate layer 313 of the transistor and the second gate layer 323 of the second transistor can be produced in the following two ways.

In an optional implementation mode, a first conductive film and a second conductive film are sequentially formed on the gate insulating layer by sputtering and other processes, and then a photoresist is coated on the second conductive film, and then half-tone is used to The mask plate exposes the photoresist, develops it after exposure, and then etches it by an etching process, so as to form the first gate layer 313 of the first transistor and the second gate layer 323 of the second transistor.

Taking the photoresist coated on the second conductive film as an example of a negative photoresist, in the half-tone mask, the light transmittance at the corresponding region of the second grid layer 323 is greater than that of the first grid layer. 313 corresponds to the light transmittance at the area, and the light transmittance at the area corresponding to the first grid layer 313 is greater than the light transmittance at the area outside the area where the second grid layer 323 and the first grid layer 313 are located. Overrate. Therefore, after exposing and developing the photoresist with a half-tone mask, the photoresist in the area where the second gate layer 323 is located is completely retained, and the photoresist in the area where the first gate layer 313 is located is partially removed. Removal, the photoresist at the region outside the region where the second gate layer 323 and the first gate layer 313 are located is completely removed; correspondingly, the first conductive film and the second conductive film are etched After etching, the first conductive film and the second conductive film at the second gate layer 323 remain completely, so that the second gate layer 323 includes a first conductive layer 3231 and a second conductive layer 3232 stacked, and the first gate The second conductive film at the region where the layer 313 is located is etched, while the first conductive film is not etched, so that the first gate layer 313 is the first conductive layer.

Of course, the photoresist coated on the second conductive film can also be a positive photoresist. At this time, in the half-tone mask, the light transmittance at the corresponding region of the second grid layer 323 is less than The light transmittance at the region corresponding to the first gate layer 313, and the light transmittance at the region corresponding to the first gate layer 313 is smaller than that outside the region where the second gate layer 323 and the first gate layer 313 are located. The light transmittance at the area.

In another optional implementation manner, a first conductive film is formed on the gate insulating layer by using a sputtering process; the first conductive film is patterned to form the first gate layer 313 of the first transistor, and the first gate layer 313 of the first transistor is formed. The second gate layer 323 of the second transistor includes a first conductive layer 3231, and the first gate layer 313 of the first transistor is the first conductive layer; then, the first conductive layer 3231 is far away from the substrate 101 by using a sputtering process. A second conductive film is formed on one side; the second conductive film is patterned to form the second conductive layer 3232 included in the second gate layer 323 of the second transistor.

It should be noted that the patterning process mainly includes processes such as photoresist coating, exposure, development, etching, and photoresist stripping.

Step 802, forming a stress protection layer on the side of the photoelectric sensor away from the substrate.

After forming a plurality of photosensitive units 31, signal reading circuits 32 and amplifying circuits 40 on the substrate 101, at least one layer of organic insulating film is sequentially formed on the side of the photosensor away from the substrate 101 by coating or other processes. After the organic insulating film is dried and cured, the organic insulating film is exposed by using a mask plate, and then developed after exposure, so as to form a stress protection layer.

The stress protection layer includes first stress protection structures 61 corresponding to the photosensitive units 31 one-to-one, and each first stress protection structure 61

The orthographic projection on the substrate 101 covers the orthographic projection of one photosensitive unit 31 on the substrate 101 . In addition, the stress protection layer also includes a second stress protection structure 62, and the orthographic projection of the second stress protection structure 62 on the substrate 101 covers the orthographic projection of the signal reading circuit 32 and the amplification circuit 40 on the substrate 101; Alternatively, the stress protection layer further includes a third stress protection structure 63 and a fourth stress protection structure 64, and the orthographic projection of the third stress protection structure 63 on the substrate 101 covers the orthographic projection of the signal reading circuit 32 on the substrate 101. The projection, the orthographic projection of the fourth stress protection structure 64 on the substrate 101 , covers the orthographic projection of the amplification circuit 40 on the substrate 101 .

It should be noted that the formation process of the stress protection layer is not limited to the above-mentioned coating, exposure and development processes, and any process capable of forming the stress protection structure shown in FIG. 2 or FIG. 6 is applicable to the embodiments of the present application.

The above embodiments, structural schematic diagrams or simulation schematic diagrams are only schematic illustrations of the technical solutions of the present application, and the size ratios do not constitute limitations on the scope of protection of the technical solutions. The modification, equivalent replacement and improvement, etc. shall be included in the scope of protection of the technical solution.

Claims (15)

1. A display screen is characterized by comprising a substrate, a photoelectric sensor arranged on the substrate, and a stress protection layer arranged on one side, far away from the substrate, of the photoelectric sensor;

the photoelectric sensor comprises a plurality of photosensitive units, the stress protection layer comprises a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate;

the photoelectric sensor also comprises a signal reading circuit and an amplifying circuit;

each photosensitive unit comprises at least one photosensitive element, and each photosensitive element is a first transistor;

the gate layer of the first transistor is a first conductive layer;

the transistor in the signal reading circuit and the transistor in the amplifying circuit are second transistors, a gate layer of each second transistor comprises the first conductive layer and a second conductive layer which are arranged in a stacked mode, and the second conductive layer is located on one side, away from the substrate, of the first conductive layer;

and the orthographic projection of the second conducting layer on the substrate covers the orthographic projection of the first conducting layer on the substrate.

2. The display screen of claim 1, wherein the first stress protection structures correspond to the light sensing units one to one, and the first stress protection structures corresponding to two adjacent light sensing units are disconnected.

3. The display screen of claim 1, wherein the signal reading circuit is connected to each of the light sensing units and the amplifying circuit.

4. The display screen of claim 3, wherein the stress-shielding layer further comprises a second stress-shielding structure, an orthographic projection of the second stress-shielding structure on the substrate covering an orthographic projection of the signal readout circuitry and the amplification circuitry on the substrate.

5. The display screen of claim 3, wherein the stress-protection layer further comprises a third stress-protection structure and a fourth stress-protection structure, the third stress-protection structure being disconnected from the fourth stress-protection structure;

the orthographic projection of the third stress protection structure on the substrate covers the orthographic projection of the signal reading circuit on the substrate, and the orthographic projection of the fourth stress protection structure on the substrate covers the orthographic projection of the amplifying circuit on the substrate.

6. A display screen as recited in any one of claims 1-5, wherein the stress-shielding layer comprises at least one organic shielding layer.

7. Display screen according to claim 3,

the first transistor comprises an active layer, a grid electrode insulating layer, a grid electrode layer, an interlayer dielectric layer and a source drain electrode layer which are arranged in a stacked mode, wherein the source drain electrode layer comprises a source electrode and a drain electrode, and the source electrode and the drain electrode are connected with the active layer through via holes penetrating through the interlayer dielectric layer and the grid electrode insulating layer respectively;

the active layer comprises a channel region and doped regions positioned on two sides of the channel region, and doped ions in the doped regions are P-type ions.

8. The display screen of claim 7, wherein the material of the first conductive layer is a transparent conductive material.

9. The display screen of claim 8, wherein the material of the second conductive layer is a light-blocking conductive material.

10. The display screen of claim 3, wherein the display screen has a display area and a non-display area surrounding the display area, the plurality of light sensing units are uniformly distributed in the display area, and the signal reading circuit and the amplifying circuit are located in the non-display area.

11. A manufacturing method of a display screen is characterized by comprising the following steps:

forming a photosensor on a substrate; the photosensor includes a plurality of light sensing units;

forming a stress protection layer on one side of the photoelectric sensor, which is far away from the substrate;

the stress protection layer comprises a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate;

the photoelectric sensor also comprises a signal reading circuit and an amplifying circuit; each photosensitive unit comprises at least one photosensitive element, each photosensitive element is a first transistor, and a grid layer of the first transistor is a first conductive layer; the transistor in the signal reading circuit and the transistor in the amplifying circuit are second transistors; a gate layer of the second transistor includes the first conductive layer and a second conductive layer which are stacked; the second conducting layer is positioned on one side, far away from the substrate, of the first conducting layer; and the orthographic projection of the second conducting layer on the substrate covers the orthographic projection of the first conducting layer on the substrate.

12. The method of claim 11,

the forming a photosensor on a substrate includes:

forming an active layer of the first transistor and an active layer of the second transistor on the substrate;

forming a gate insulating layer; the gate insulating layer covers an active layer of the first transistor and an active layer of the second transistor;

forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer;

forming an interlayer dielectric layer; the interlayer dielectric layer covers the gate layer of the first transistor and the gate layer of the second transistor;

and forming a source electrode and a drain electrode of the first transistor and a source electrode and a drain electrode of the second transistor on the interlayer dielectric layer.

13. The method of claim 12, wherein the forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer comprises:

sequentially forming a first conductive film and a second conductive film on the gate insulating layer;

patterning the first conductive film and the second conductive film by using a halftone mask plate to form a gate layer of the first transistor and a gate layer of the second transistor;

the first conductive layer is obtained by patterning the first conductive film, and the second conductive layer is obtained by patterning the second conductive film.

14. The method of claim 12, wherein the forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer comprises:

forming a first conductive film on the gate insulating layer;

patterning the first conductive film to form a gate layer of the first transistor and a first conductive layer included in the gate layer of the second transistor; a gate layer of the first transistor is the first conductive layer;

forming a second conductive film on one side of the first conductive layer far away from the substrate;

and patterning the second conductive film to form a second conductive layer included in a gate layer of the second transistor.

15. A terminal device, comprising a driving chip and a display screen according to any one of claims 1 to 10, wherein the driving chip is connected to a signal output terminal of an amplifying circuit included in the display screen.

Images