CN115020446B

CN115020446B - Display screen, manufacturing method thereof and terminal equipment

Info

Publication number: CN115020446B
Application number: CN202111296562.1A
Authority: CN
Inventors: 安亚斌; 张言; 孟令健; 赵明远
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2021-11-03
Filing date: 2021-11-03
Publication date: 2023-04-11
Anticipated expiration: 2041-11-03
Also published as: CN115020446A

Abstract

The embodiment of the application provides a display screen, a manufacturing method of the display screen and terminal equipment, and is applied to the technical field of terminals. The display screen comprises a substrate, a plurality of photosensitive units arranged on the substrate, and a stress protective layer arranged on one side, far away from the substrate, of each photosensitive unit, wherein the stress protective layer comprises a plurality of first stress protective structures, and the orthographic projection of each first stress protective structure on the substrate covers the orthographic projection of each photosensitive unit on the substrate. Carry out the rigidity reinforcement to the sensitization unit through first stress protection structure, when receiving outside mechanical stress effect, reduce the stress that acts on the sensitization unit through first stress protection structure to reduce the deformation that the sensitization unit produced because of stress, improved the stability of the performance of sensitization unit, thereby improve the stability of photoelectric sensor's performance.

Description

Display screen, manufacturing method thereof and terminal equipment

Technical Field

The application relates to the technical field of terminals, in particular to a display screen, a manufacturing method of the display screen and terminal equipment.

Background

With the rapid development of terminal equipment, various photoelectric sensors are integrated on the terminal equipment to realize corresponding functions, for example, a proximity light sensor, an ambient light sensor, a fingerprint sensor and other photoelectric sensors are arranged on the terminal equipment.

When the terminal equipment receives the mechanical stress effect of outside, the photoelectric sensor that sets up in the display screen can take place deformation because of stress to influence photoelectric sensor's performance.

Disclosure of Invention

The embodiment of the application provides a display screen and a manufacturing method thereof and terminal equipment, wherein a first stress protection structure covering a photosensitive unit is arranged in the display screen, the photosensitive unit is rigidly reinforced by the first stress protection structure, deformation of stress to the photosensitive unit is reduced, and the performance of a photoelectric sensor is improved.

In a first aspect, an embodiment of the present application provides a display screen, including a substrate, a photo sensor disposed on the substrate, and a stress protection layer disposed on a side of the photo sensor away from the substrate; the photoelectric sensor comprises a plurality of photosensitive units, the stress protection layer comprises a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate.

Like this, carry out the rigidity reinforcement to the sensitization unit through first stress protection structure, when receiving outside mechanical stress effect, reduce the stress that acts on the sensitization unit through first stress protection structure to reduce the deformation that the sensitization unit produced because of stress, improved the stability of the performance of sensitization unit, thereby improve the stability of photoelectric sensor's performance.

In an optional implementation manner, the first stress protection structures correspond to the photosensitive units one to one, and the first stress protection structures corresponding to two adjacent photosensitive units are disconnected. Like this, through the disconnection setting of the first stress protection structure that corresponds two adjacent sensitization units for electrically conductive rete in the pixel unit between two adjacent sensitization units can reduce the preparation technology degree of difficulty of via hole when realizing connecting through the via hole, and reduce the cracked probability of two-layer electrically conductive rete appearance in the via hole.

In an optional implementation manner, the photoelectric sensor further includes a signal reading circuit and an amplifying circuit, and the signal reading circuit is respectively connected to each photosensitive unit and the amplifying circuit. In this way, the photosensitive signal generated by the photosensitive unit is read by the signal reading circuit and amplified by the amplifying circuit, so that the signal intensity of the photosensitive signal transmitted to the driving chip is improved.

In an alternative implementation, the stress protection layer further includes a second stress protection structure, and an orthographic projection of the second stress protection structure on the substrate covers an orthographic projection of the signal reading circuit and the amplifying circuit on the substrate. Like this, carry out the rigidity reinforcement to signal reading circuit and amplifier circuit through second stress protection structure, when terminal equipment receives outside mechanical stress effect, reduce the stress that acts on signal reading circuit and amplifier circuit through second stress protection structure to the deformation that the transistor in signal reading circuit and the amplifier circuit produced because of the effect of external stress has been reduced, the stability of the transistor in signal reading circuit and the amplifier circuit has been improved, thereby the stability of the performance of improvement photoelectric sensor.

In an optional implementation manner, the stress protection layer further includes a third stress protection structure and a fourth stress protection structure, and the third stress protection structure and the fourth stress protection structure are disconnected; the orthographic projection of the third stress protection structure on the substrate covers the orthographic projection of the signal reading circuit on the substrate, and the orthographic projection of the fourth stress protection structure on the substrate covers the orthographic projection of the amplifying circuit on the substrate. In this way, the signal reading circuit is rigidly reinforced through the third stress protection structure, and when the terminal equipment is subjected to external mechanical stress, the stress acting on the signal reading circuit is reduced through the third stress protection structure; and the amplifying circuit is rigidly reinforced through the fourth stress protection structure, and when the terminal equipment is subjected to external mechanical stress, the stress acting on the amplifying circuit is reduced through the fourth stress protection structure.

In an alternative implementation, the stress-shielding layer comprises at least one organic shielding layer. Therefore, the stress protective layer is made of the organic material, so that the difficulty of patterning treatment of the stress protective layer can be reduced, and the stress protective layer is convenient to manufacture.

In an alternative implementation, each photosensitive unit comprises at least one photosensitive element, and each photosensitive element is a first transistor; the first transistor comprises an active layer, a grid electrode insulating layer, a grid electrode layer, an interlayer dielectric layer and a source drain electrode layer which are arranged in a stacked mode, wherein the source drain electrode layer comprises a source electrode and a drain electrode, and the source electrode and the drain electrode are connected with the active layer through via holes penetrating through the interlayer dielectric layer and the grid electrode insulating layer respectively; the active layer comprises a channel region and doping regions positioned on two sides of the channel region, and doping ions in the doping regions are P-type ions. Therefore, the first transistor is used as the photosensitive unit, so that the photosensitive element is compatible with the manufacturing process of the OLED screen, and the photosensitive element is convenient to integrate on the OLED display screen.

In an alternative implementation manner, the gate layer of the first transistor is a first conductive layer, and the material of the first conductive layer is a transparent conductive material. In this way, by manufacturing the gate layer of the first transistor using a transparent conductive material, the intensity of incident light incident on the active layer of the first transistor can be increased, thereby increasing the intensity of the generated photosensitive signal.

In an alternative implementation manner, the transistor in the signal reading circuit and the transistor in the amplifying circuit are second transistors, a gate layer of each second transistor includes a first conductive layer and a second conductive layer which are stacked, and the second conductive layer is located on one side, away from the substrate, of the first conductive layer; the orthographic projection of the second conducting layer on the substrate covers the orthographic projection of the first conducting layer on the substrate, and the material of the second conducting layer is a shading conducting material. In this way, the second conductive layer is made of the shading conductive material, and the first conductive layer is covered by the second conductive layer, so that the intensity of incident light entering a channel region of the second transistor is reduced, and the leakage current generated by the second transistor is reduced.

In an alternative implementation mode, the display screen is provided with a display area and a non-display area surrounding the display area, the plurality of light sensing units are uniformly distributed in the display area, and the signal reading circuit and the amplifying circuit are located in the non-display area. In this way, by arranging the photosensitive unit in the display area, the occupied area of the photoelectric sensor in the non-display area can be reduced, and the screen occupation ratio of the terminal equipment is improved.

In a second aspect, an embodiment of the present application provides a method for manufacturing a display screen, including: forming a photosensor on a substrate, the photosensor including a plurality of light sensing units; forming a stress protection layer on one side of the photoelectric sensor, which is far away from the substrate; the stress protection layer comprises a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate.

In an alternative implementation, the photoelectric sensor further comprises a signal reading circuit and an amplifying circuit; each photosensitive unit comprises at least one photosensitive element, each photosensitive element is a first transistor, and a transistor in the signal reading circuit and a transistor in the amplifying circuit are second transistors; forming a photosensor on a substrate, comprising: forming an active layer of a first transistor and an active layer of a second transistor on a substrate; forming a gate insulating layer covering the active layer of the first transistor and the active layer of the second transistor; forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer; forming an interlayer dielectric layer which covers a gate layer of the first transistor and a gate layer of the second transistor; and forming a source electrode and a drain electrode of the first transistor and a source electrode and a drain electrode of the second transistor on the interlayer dielectric layer.

As such, the active layer of the first transistor may be referred to as a first active layer, the gate layer of the first transistor may be referred to as a first gate layer, the active layer of the first transistor may be referred to as a first source, and the drain of the first transistor may be referred to as a first drain; the active layer of the second transistor may be referred to as a second active layer, the gate layer of the second transistor may be referred to as a second gate layer, the source of the second transistor may be referred to as a second source, and the drain of the second transistor may be referred to as a second drain.

In an alternative implementation, forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer includes: sequentially forming a first conductive film and a second conductive film on the gate insulating layer; patterning the first conductive film and the second conductive film by using a halftone mask plate to form a gate layer of the first transistor and a gate layer of the second transistor; the gate layer of the first transistor is a first conductive layer, and the gate layer of the second transistor comprises a first conductive layer and a second conductive layer which are stacked; the first conductive layer is obtained by patterning the first conductive film, and the second conductive layer is obtained by patterning the second conductive film.

In an alternative implementation, forming a gate layer of a first transistor and a gate layer of a second transistor on a gate insulating layer includes: forming a first conductive film on the gate insulating layer; patterning the first conductive film to form a gate layer of the first transistor and a first conductive layer included in the gate layer of the second transistor, wherein the gate layer of the first transistor is the first conductive layer; forming a second conductive film on one side of the first conductive layer, which is far away from the substrate; and patterning the second conductive film to form a second conductive layer included in a gate layer of the second transistor.

In a third aspect, an embodiment of the present application provides a terminal device, which includes a driving chip and the display screen, where the driving chip is connected to a signal output end of an amplifying circuit included in the display screen.

The effects of the possible implementations of the second aspect and the third aspect are similar to the effects of the possible designs of the first aspect and the first aspect, and are not described herein again.

Drawings

Fig. 1 is a schematic structural diagram of a terminal device according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a display screen according to an embodiment of the present application;

FIG. 3 is a schematic plan view of a photosensitive unit according to an embodiment of the present disclosure;

FIG. 4 is a cross-sectional view taken along section B-B' shown in FIG. 3;

fig. 5 is a cross-sectional view of a transistor in a signal reading circuit or an amplifying circuit provided in an embodiment of the present application;

fig. 6 is a schematic structural diagram of another display screen provided in an embodiment of the present application;

fig. 7 is a schematic connection diagram of the photosensitive unit, the signal reading circuit, the amplifying circuit and the driving chip according to the embodiment of the present disclosure;

fig. 8 is a flowchart of a method for manufacturing a display screen according to an embodiment of the present application.

Detailed Description

In the embodiments of the present application, terms such as "first" and "second" are used to distinguish the same or similar items having substantially the same function and action. For example, the first chip and the second chip are only used for distinguishing different chips, and the order of the chips is not limited. Those skilled in the art will appreciate that the terms "first," "second," etc. do not denote any order or quantity, nor do the terms "first," "second," etc. denote any order or importance.

It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described herein as "exemplary" or "e.g.," is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present concepts related in a concrete fashion.

In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.

At present, various photoelectric sensors are integrated on a terminal device to realize corresponding functions. For example, a proximity optical sensor is arranged on the terminal device, and a photosensitive signal generated by the proximity optical sensor is output to a driving chip to detect whether a shielding object approaches the terminal device, so that the terminal device can detect that a user holds the terminal device by using the proximity optical sensor and is close to an ear for conversation, so that a screen is automatically extinguished to achieve the purpose of saving power, the proximity optical sensor can also be used in a leather sheath mode, a pocket mode is automatically unlocked and locked, and the like; and/or, set up environment light sensor on terminal equipment, the sensitization signal output that generates environment light sensor to drive chip to detect environment light brightness, terminal equipment can be according to the environment light brightness self-adaptation regulation display screen luminance of perception, and automatically regulated white balance when environment light sensor also can be used to shoot, environment light sensor can also with be close the light sensor cooperation, whether detection terminal equipment is in the pocket, in order to prevent the mistake and touch.

The photoelectric sensor comprises a plurality of photosensitive units, a signal reading circuit connected with each photosensitive unit, and an amplifying circuit connected with the output end of the signal reading circuit, wherein the signal output end of the amplifying circuit is connected with the driving chip through a wiring. The light sensing unit may include a plurality of light sensing elements connected in parallel, which may be phototransistors.

However, in the actual use process of the terminal device, the terminal device may be subjected to an external mechanical stress, for example, the terminal device is bent, or the terminal device is impacted by an external object, and the like, the external stress may be applied to the light sensing unit disposed in the display screen, so that the phototransistor in the light sensing unit is deformed, and the stability of the performance of the transistor in the light sensing unit is affected. For example, when a phototransistor in the light sensing unit is deformed, the threshold voltage of the phototransistor may shift, and even light sensing is impossible.

Based on this, the embodiment of the present application provides a display screen, which includes a substrate, a plurality of photosensitive units disposed on the substrate, and a stress protection layer disposed on one side of the photosensitive units away from the substrate, where the stress protection layer includes a plurality of first stress protection structures, and an orthographic projection of each first stress protection structure on the substrate covers an orthographic projection of the photosensitive unit on the substrate. Carry out the rigidity reinforcement to the sensitization unit through first stress protection structure, when receiving outside mechanical stress effect, reduce the stress that acts on the sensitization unit through first stress protection structure to reduce the deformation that the sensitization unit produced because of stress, improved the stability of the performance of sensitization unit, thereby improve the stability of photoelectric sensor's performance.

The display screen provided by the embodiment of the application can be applied to terminal equipment, the display screen can be an organic light-emitting diode (OLED) display screen, the terminal equipment can be a mobile phone, a tablet computer, a notebook computer, wearable equipment and the like, and a photoelectric sensor is arranged on the terminal equipment, and a photosensitive unit in the photoelectric sensor needs to be subjected to stress protection, and the specific technology and the specific equipment form adopted by the terminal equipment are not limited by the embodiment of the application.

As shown in fig. 1, the terminal device 100 includes a display screen 10 and a housing 20, the display screen 10 is mounted on the housing 20 and covers the accommodating cavity, which is used for displaying images or videos, etc., a photosensor may be integrated in the display screen 10, the photosensor includes a plurality of photosensitive units, a signal reading circuit connected to each photosensitive unit, and an amplifying circuit connected to an output terminal of the signal reading circuit, and a signal output terminal of the amplifying circuit is connected to the driving chip through a wire.

When incident light irradiates the photosensitive unit, the photosensitive unit converts light signals of the received incident light into corresponding photosensitive signals, the photosensitive signals are read out through the signal reading circuit, the photosensitive signals read by the signal reading circuit are transmitted to the signal input end of the amplifying circuit, the amplifying circuit amplifies the input photosensitive signals, the amplified photosensitive signals are input to the driving chip, and the driving chip detects the photosensitive signals according to the received photosensitive signals.

Fig. 2 is a schematic structural diagram of a display screen according to an embodiment of the present application. Referring to fig. 2, the display screen 10 has a display area 11 and a non-display area 12 surrounding the display area 11, a plurality of pixel units (not shown in fig. 2) are disposed in the display area 11, and a plurality of light sensing units 31 are also disposed in the display area 11, and a signal reading circuit 32 and an amplifying circuit 40 are disposed in the non-display area 12.

In the embodiment of the present application, the plurality of photosensitive cells 31 are uniformly distributed in the display area 11. For example, as shown in fig. 2, 4 × 3 photosensitive units 31 are distributed in the display area 11 in an array, that is, 3 photosensitive units 31 are uniformly arranged in the row direction of the display screen 10, and 4 photosensitive units 31 are uniformly arranged in the column direction of the display screen 10; moreover, the distances between two adjacent photosensitive units 31 are equal along the row direction of the display screen 10, and the distances between two adjacent photosensitive units 31 are also equal along the column direction of the display screen 10, so that the plurality of photosensitive units 31 are uniformly distributed in the display area 11. By arranging the light sensing unit 31 in the display area 11, the occupied area of the photoelectric sensor in the non-display area 12 is reduced, and the screen occupation ratio of the terminal device is improved.

Of course, it is understood that the number of the photosensitive units 31 disposed in the display area 11 is not limited to 12 shown in fig. 2, and may also be other numbers, for example, 8 × 8 photosensitive units 31 are distributed in the display area 11 in an array, that is, 8 photosensitive units 31 are uniformly disposed in the row direction of the display screen 10, and 8 photosensitive units 31 are also uniformly disposed in the column direction of the display screen 10.

The driver chip 50 connected to the signal output terminal of the amplifier circuit 40 may be provided in the non-display area 12 of the display panel 10. Specifically, the driver chip 50 may be directly bonded in the non-display area 12, or the driver chip 50 may be bonded in the non-display area 12 of the display screen 10 by using a Flexible Printed Circuit (FPC), which is not limited in this embodiment of the present application.

It should be noted that, as shown in fig. 2, the signal reading circuit 32 and the amplifying circuit 40 may be disposed at the upper frame of the non-display area 12, and the driving chip 50 may be disposed at the lower frame of the non-display area 12; of course, the positions of the signal reading circuit 32, the amplifying circuit 40 and the driving chip 50 on the display screen 10 are not limited to the positional relationship shown in fig. 2, and the positions thereof may be changed according to actual product requirements, which is not limited in the embodiment of the present application.

Fig. 3 is a schematic diagram of an actual structure of the area a shown in fig. 2, and each of the light sensing units 31 is connected to the control signal line V0, the high-level signal line VDD, and the first output signal line Out 1. The control signal line V0 extends along the row direction of the display screen 10, the number of the control signal lines V0 is equal to the number of rows of the photosensitive units 31 distributed in the display screen 10, and the plurality of photosensitive units 31 located in the same row are connected to the same control signal line V0; the high-level signal line VDD and the first output signal line Out1 extend along the column direction of the display screen 10, the number of the high-level signal lines VDD is equal to the number of columns of the photosensitive units 31 distributed in the display screen 10, the plurality of photosensitive units 31 located in the same column are connected to the same high-level signal line VDD, the number of the first output signal lines Out1 is also equal to the number of columns of the photosensitive units 31 distributed in the display screen 10, and the plurality of photosensitive units 31 located in the same column are connected to the same first output signal line Out 1.

The light sensing unit 31 includes at least one light sensing element, each light sensing element is a first transistor, which may also be referred to as a phototransistor, and when the light sensing unit 31 includes a plurality of phototransistors, which are connected in parallel, for example, each light sensing unit 31 includes 50 to 1000 phototransistors connected in parallel.

Specifically, in the same light sensing unit 31, the first gate layer of each phototransistor is connected to the control signal line V0, the source of each phototransistor is connected to the high-level signal line VDD, and the drain of each phototransistor is connected to the first output signal line Out 1.

Under the action of the control voltage input by the control signal line V0 and the high level voltage input by the high level signal line VDD, the phototransistor in the light sensing unit 31 is enabled to operate in the cut-off region, however, because there is a certain leakage current in the phototransistor, when the phototransistor is irradiated by the incident light, it will generate characteristic drift, thereby causing the leakage current to increase, when the intensity of the incident light is larger, the leakage current generated by the phototransistor is larger, and at this time, the leakage current can also be referred to as the photocurrent of the light sensing signal.

When the number of the parallel phototransistors included in each light sensing unit 31 is larger, the light sensing unit 31 generates a larger photocurrent of a light sensing signal when being irradiated by incident light, but if one of the phototransistors is short-circuited, the whole light sensing unit 31 is short-circuited, so that the number of the phototransistors included in the light sensing unit 31 is reasonably set to 50 to 1000, and the probability of the short circuit of the light sensing unit 31 is reduced while the photocurrent of the light sensing signal generated by the light sensing unit 31 is increased.

In a practical product, as shown in fig. 3, the display panel 10 further includes a substrate 101, and the light sensing unit 31 is disposed on the substrate 101, and of course, the signal reading circuit 32 and the amplifying circuit 40 are also disposed on the substrate 101. The substrate 101 may be a rigid substrate such as a glass substrate or the like, or the substrate 101 may be a flexible substrate such as Polyimide (PI) or the like.

As shown in fig. 4, the phototransistor in the light sensing unit 31 includes: the first active layer 311, the first gate insulating layer 312, the first gate layer 313, the first interlayer dielectric layer 314, and the first source-drain electrode layer are stacked, the first source-drain electrode layer includes a first source 315 and a first drain 316, and the first source 315 and the first drain 316 are respectively connected to the first active layer 311 through a via hole penetrating through the first interlayer dielectric layer 314 and the first gate insulating layer 312.

The first active layer 311 is made of Low Temperature Polysilicon (LTPS), and includes a first channel region 3111 and doped regions located at two sides of the first channel region 3111, i.e., a first doped region 3112 and a second doped region 3113, and the doped ions in the first doped region 3112 and the second doped region 3113 are P-type ions, so that the phototransistor is a P-type transistor by doping the P-type ions at two sides of the first channel region 3111.

The first gate insulating layer 312 is made of an inorganic insulating material, for example, the first gate insulating layer 312 is a silicon nitride layer, the first gate insulating layer 312 is a silicon oxide layer, or the first gate insulating layer 312 is a stacked structure of a silicon nitride layer and a silicon oxide layer. Correspondingly, the material of the first interlayer dielectric layer 314 may also be an inorganic insulating material, for example, the first interlayer dielectric layer 314 is a silicon nitride layer, or the first interlayer dielectric layer 314 is a silicon oxide layer, or the first interlayer dielectric layer 314 is a stacked structure of a silicon nitride layer and a silicon oxide layer. The material of the first source 315 and the first drain 316 is a conductive material, for example, the material of the first source 315 and the first drain 316 is a metal material such as copper.

Specifically, the first source 315 is connected to the first doped region 3112 through a via hole penetrating through the first interlayer dielectric layer 314 and the first gate insulating layer 312, and the first drain 316 is connected to the second doped region 3113 through a via hole penetrating through the first interlayer dielectric layer 314 and the first gate insulating layer 312.

The pixel driving circuit of the pixel unit arranged in the OLED display screen can be a PMOS (P-channel metal oxide semiconductor) transistor, and the active layer material of the pixel driving circuit is low-temperature polysilicon; or, the driving transistor in the pixel driving circuit is a PMOS transistor, the active layer material of the driving transistor is low-temperature polysilicon, and the switching transistor is an NMOS transistor, the active layer material of the switching transistor is Indium Gallium Zinc Oxide (IGZO). Therefore, the photosensitive element is manufactured by adopting the P-type phototransistor, so that the photosensitive element is compatible with the manufacturing process of the OLED screen.

The first gate layer 313 of the phototransistor is a first conductive layer made of a transparent conductive material, and the first conductive layer is made of Indium Tin Oxide (ITO) with a thickness set to

And the like. By forming the first gate layer 313 of the phototransistor using a transparent conductive material, the intensity of incident light to the first active layer 311 can be increased, thereby increasing the intensity of a generated photo-sensing signal.

It should be noted that the phototransistor shown in fig. 4 is a top gate type phototransistor, and in some products, the phototransistor can also be a bottom gate type phototransistor, and in this case, the phototransistor includes a first gate layer, a first gate insulating layer, a first active layer, and a first source electrode and a first drain electrode partially covering the first active layer.

In addition, only one phototransistor is shown in fig. 3 and 4 to represent the light sensing unit 31, and it is understood that the light sensing unit 31 in the embodiment of the present application may also be a plurality of phototransistors connected in parallel.

In addition, the display panel 10 further includes a signal reading circuit 32 and an amplifying circuit 40 which are provided over the substrate 101, the signal reading circuit 32 includes a plurality of transistors, the amplifying circuit 40 also includes a plurality of transistors, and both the transistor in the signal reading circuit 32 and the transistor in the amplifying circuit 40 are referred to as a second transistor.

As shown in fig. 5, the second transistor also includes a second active layer 321, a second gate insulating layer 322, a second gate layer 323, a second interlayer dielectric layer 324, and a second source-drain electrode layer, which includes a second source 325 and a second drain 326, and the second source 325 and the second drain 326 are respectively connected to the second active layer 321 through a via hole penetrating through the second interlayer dielectric layer 324 and the second gate insulating layer 322.

The second active layer 321 includes a second channel region 3211 and doped regions located at two sides of the second channel region 3211, that is, a third doped region 3212 and a fourth doped region 3213, specifically, the second source 325 is connected to the third doped region 3212 through a via hole penetrating through the second interlayer dielectric layer 324 and the second gate insulating layer 322, and the second drain 326 is connected to the fourth doped region 3213 through a via hole penetrating through the second interlayer dielectric layer 324 and the second gate insulating layer 322. The dopant ions in the third doped region 3212 and the fourth doped region 3213 and the material of the second active layer 321 may be determined according to the specific type of the corresponding transistor.

The second gate layer 323 of the second transistor includes a first conductive layer 3231 and a second conductive layer 3232, which are stacked, where the second conductive layer 3232 is located on a side of the first conductive layer 3231 away from the substrate 101. The first conductive layer 3231 is made of a transparent conductive material, for example, the first conductive layer 3231 is made of ITO; the second conductive layer 3232 is made of a light-shielding conductive material, for example, the second conductive layer 3232 is made of Mo (molybdenum).

An orthogonal projection of the second conductive layer 3232 on the substrate 101 covers an orthogonal projection of the first conductive layer 3231 on the substrate 101. In some embodiments, an orthographic projection of the second conductive layer 3232 on the substrate 101 completely coincides with an orthographic projection of the first conductive layer 3231 on the substrate 101, and at this time, an area of the orthographic projection of the second conductive layer 3232 on the substrate 101 is equal to an area of the orthographic projection of the first conductive layer 3231 on the substrate 101; in other embodiments, the second conductive layer 3232 covers part of the second gate insulating layer 322 in addition to the first conductive layer 3231, and the area of the orthographic projection of the second conductive layer 3232 on the substrate 101 is larger than the area of the orthographic projection of the first conductive layer 3231 on the substrate 101.

In addition, the second active layer 321 and the first active layer 311 may be disposed on the same layer on the substrate 101, the second gate insulating layer 322 and the first gate insulating layer 312 may be disposed on the same layer and have the same material, the second interlayer dielectric layer 324 and the first interlayer dielectric layer 314 may be disposed on the same layer and have the same material, and the second source drain electrode layer and the first source drain electrode layer may be disposed on the same layer and have the same material.

In the embodiment of the present application, the second conductive layer 3232 is made of a light-shielding conductive material, and the first conductive layer 3231 is covered by the second conductive layer 3232, so that the intensity of incident light to the second channel region 3211 in the second active layer 321 is reduced, and thus the leakage current generated by the second transistor is reduced. In addition, the first conductive layer 3231 and the second conductive layer 3232 are used as the second gate layer 323 of the second transistor, so that the routing resistance corresponding to the second gate layer 323 of the second transistor can be reduced to a certain extent.

It should be noted that the second transistor shown in fig. 5 is a top-gate transistor, and in some products, the second transistor may also be a bottom-gate transistor. Further, fig. 5 shows only one second transistor to represent all the transistors included in the signal reading circuit 32 and the amplifying circuit 40, and actually, the signal reading circuit 32 and the amplifying circuit 40 each include a plurality of transistors.

In the embodiment of the present application, in order to reduce the deformation of the photosensor caused by external mechanical stress, a stress protection layer may be disposed on a side of the photosensor away from the substrate 101, as shown in fig. 2 to 4, the stress protection layer includes a plurality of first stress protection structures 61, and the first stress protection structures 61 directly cover a surface of the side of the photosensitive unit 31 away from the substrate 101, that is, the first stress protection structures 61 may directly contact with the first interlayer dielectric layer 314, the first source 315, and the first drain 316 of the phototransistor in the photosensitive unit 31, so that an orthographic projection of each first stress protection structure 61 on the substrate 101 covers an orthographic projection of the photosensitive unit 31 on the substrate 101.

In an actual product, the first stress protection structure 61 is also in contact with a portion of the substrate 101 outside the area where the photosensitive unit 31 is located, and at this time, the area of the orthographic projection of the first stress protection structure 61 on the substrate 101 is larger than the area of the orthographic projection of the photosensitive unit 31 on the substrate 101.

As shown in fig. 4, the first gate insulating layer 312 between two adjacent photosensitive units 31 is disconnected, and the first interlayer dielectric layer 314 between two adjacent photosensitive units 31 is also disconnected, but it is understood that the first gate insulating layer 312 between two adjacent photosensitive units 31 may also be connected, and the first interlayer dielectric layer 314 between two adjacent photosensitive units 31 is also connected.

Therefore, in the embodiment of the present application, the first stress protection structure 61 is used to rigidly reinforce the photosensitive unit 31, and when the first stress protection structure 61 is subjected to an external mechanical stress, the stress applied to the photosensitive unit 31 is reduced by the first stress protection structure 61, so that the deformation of the photosensitive unit 31 due to the stress is reduced, the stability of the performance of the phototransistor in the photosensitive unit 31 is improved, and the stability of the performance of the photosensor is improved.

In some embodiments, the first stress protection structures 61 correspond to the light sensing units 31 one to one, and an orthogonal projection of each first stress protection structure 61 on the substrate 101 covers an orthogonal projection of one light sensing unit 31 on the substrate 101, while the first stress protection structures 61 corresponding to two adjacent light sensing units 31 are disconnected.

At this time, the number of the first stress protection structures 61 is equal to the number of the photosensitive units 31, and the distribution manner of the first stress protection structures 61 is also the same as that of the photosensitive units 31. That is, when the photosensor includes M × N photosensitive units 31 distributed in an array, the stress protection layer also includes M × N first stress protection structures 61 distributed in an array, and each first stress protection structure 61 is located in the display area 11.

Because not only the photosensitive unit 31 but also the pixel unit need to be arranged in the display area 11, the pixel driving circuit in the pixel unit and some conductive film layers in the light emitting device which need to be connected are not arranged on the same layer, for example, the anode of the light emitting device and the drain electrode of the driving transistor in the pixel driving circuit are not arranged on the same layer, at this time, the insulating film layer between the two conductive film layers needs to be etched to form a through via hole, and the two conductive film layers are connected through the through via hole. If the first stress protection structures 61 corresponding to the two adjacent photosensitive units 31 are not disconnected, patterning is performed on the stress protection layer between the two photosensitive units 31 to form through via holes, but the difficulty of forming the via holes by patterning the stress protection layer is high due to the large thickness of the stress protection layer; when the two conductive film layers are connected through the via hole penetrating through the stress protection layer, the thickness of the stress protection layer is large, and the area of the via hole is usually small, so that the situation that the two conductive film layers are broken in the via hole is easily caused.

Therefore, according to the embodiment of the application, the first stress protection structures 61 corresponding to the two adjacent photosensitive units 31 are disconnected, so that the difficulty of the manufacturing process of the through hole can be reduced when the two conductive film layers in the pixel unit are connected through the through hole, and the probability of breakage of the two conductive film layers in the through hole is reduced.

In the embodiment of the present application, the stress protection layer includes at least one organic protection layer, that is, the first stress protection structure 61 is made of at least one organic protection layer, and the material of the organic protection layer is an organic insulating material, for example, the material of the organic protection layer is organic resin or polyimide, etc. In some embodiments, the organic resin may be a photosensitive resin, so that a photoresist may not be coated on the photosensitive resin film during the patterning process of the photosensitive resin film to form the organic protective layer, thereby reducing the number of processes for forming the stress protective layer.

Moreover, compared with an inorganic insulating material, the patterning difficulty of the organic insulating material is low, so that the stress protection layer in the embodiment of the application is made of the organic insulating material, the patterning difficulty of the stress protection layer can be reduced, and the stress protection layer can be conveniently made.

When the stress shielding layer includes a plurality of organic shielding layers, the organic shielding layers are sequentially stacked in a thickness direction of the display panel 10 (i.e., a direction from the substrate 101 to the photosensitive unit 31). For example, as shown in fig. 2, the stress protection layer includes 2 organic protection layers, such that the first stress protection structure 61 includes a first stress protection layer 611 and a second stress protection layer 612, the first stress protection layer 611 directly covers the photosensitive unit 31, and the second stress protection layer 612 is disposed on a surface of the first stress protection layer 611 on a side away from the photosensitive unit 31.

Certainly, the number of layers of the organic protective layer that the stress protective layer includes is uneven and is limited to 2, and can also be 3, 4 layers etc. when the number of layers of the organic protective layer that the stress protective layer includes is more, the gross thickness of the stress protective layer is bigger to make the stress that acts on the photosensitive unit 31 less, but it can influence the thickness of display screen 10, therefore, through rationally setting up the number of layers of the organic protective layer that the stress protective layer includes, when reducing the stress that acts on the photosensitive unit 31, make the thickness of display screen 10 thinner.

It should be noted that, when the stress protection layer includes multiple organic protection layers, the thicknesses of the organic protection layers may be equal or different; when the stress protective layer comprises a plurality of organic protective layers, the materials of the organic protective layers can be the same or different; the number of layers of the organic protective layers included in the first stress protection structures 61 corresponding to the respective photosensitive units 31 may be set to be equal, for example, the first stress protection structures 61 corresponding to each photosensitive unit 31 include two organic protective layers.

As shown in fig. 2 and fig. 5, the stress protection layer further includes a second stress protection structure 62, where the second stress protection structure 62 directly covers the surface of the signal reading circuit 31 and the amplification circuit 40 on the side away from the substrate 101, that is, the second stress protection structure 62 may directly contact with the second interlayer dielectric layer 324, the second source 325 and the second drain 326 in the second transistor, and the second stress protection structure 62 further contacts with the portion of the substrate 101 outside the region where the second transistor is located, so that an orthographic projection of the second stress protection structure 62 on the substrate 101 covers an orthographic projection of the signal reading circuit 32 and the amplification circuit 40 on the substrate 101, and at this time, an orthographic projection area of the second stress protection structure 62 on the substrate 101 is larger than an orthographic projection area of the signal reading circuit 32 and the amplification circuit 40 on the substrate 101.

When the terminal device is subjected to external mechanical stress, the stress may also act on the positions where the signal reading circuit 32 and the amplifying circuit 40 are located, causing the transistors in the signal reading circuit 32 and the amplifying circuit 40 to deform, thereby affecting the stability of the transistors in the signal reading circuit 32 and the amplifying circuit 40. Therefore, in the embodiment of the present application, the second stress protection structure 62 covering the signal reading circuit 32 and the amplifying circuit 40 may be disposed in the display screen 10, the signal reading circuit 32 and the amplifying circuit 40 are rigidly reinforced by the second stress protection structure 62, and when the terminal device is subjected to an external mechanical stress, the stress applied to the signal reading circuit 32 and the amplifying circuit 40 is reduced by the second stress protection structure 62, so that deformation of transistors in the signal reading circuit 32 and the amplifying circuit 40 due to the external stress is reduced, stability of the transistors in the signal reading circuit 32 and the amplifying circuit 40 is improved, and stability of performance of the photosensor is improved.

In some embodiments, the second stress shielding structure 62 includes a number of layers equal to the number of layers included in the first stress shielding structure 61. For example, as shown in fig. 4, the first stress protection structure 61 includes a first stress protection layer 611 and a second stress protection layer 612, and as shown in fig. 5, the second stress protection structure 62 includes a third stress protection layer 621 and a fourth stress protection layer 622.

In the embodiment of the present application, the number of the signal reading circuits 32 is smaller than the number of the light sensing units 31, and the number of the amplifying circuits 40 is 1. Under the condition that the signal reading circuit 32 has a fast speed for reading the photo sensing signals, the number of the signal reading circuits in the embodiment of the present application may be set to 1, and at this time, all the first output signal lines Out1 connected to the photo sensing units 31 are connected to the signal input end of the signal reading circuit; in contrast, when the speed of reading the photosensitive signal by the signal reading circuit is slow, the number of the signal reading circuits in the embodiment of the present application may be set to be plural, for example, 4 signal reading circuits are provided.

And the number of the second stress protection structures 62 is 1, which can cover all the signal reading circuits 32 and the amplifying circuits 40 to reduce the stress applied to the signal reading circuits 32 and the amplifying circuits 40. Also, since the signal reading circuit 32 and the amplifying circuit 40 are both located in the non-display area 12, the second stress protection structure 62 is also located in the non-display area 12.

Fig. 6 is a schematic structural diagram of another display screen provided in an embodiment of the present application. Referring to fig. 6, the stress protection layer further includes a third stress protection structure 63 and a fourth stress protection structure 64, the third stress protection structure 63 and the fourth stress protection structure 64 are disconnected from each other, and the number of the third stress protection structure 63 and the number of the fourth stress protection structure 64 are both 1.

The third stress protection structure 63 directly covers the surface of the signal reading circuit 32 on the side away from the substrate 101, so that the orthographic projection of the third stress protection structure 63 on the substrate 101 covers the orthographic projection of the signal reading circuit 32 on the substrate 101, and at this time, the area of the orthographic projection of the third stress protection structure 63 on the substrate 101 is larger than the area of the orthographic projection of the signal reading circuit 32 on the substrate 101.

Correspondingly, the fourth stress protection structure 64 directly covers the surface of the amplifying circuit 40 on the side away from the substrate 101, so that the orthographic projection of the fourth stress protection structure 64 on the substrate 101 covers the orthographic projection of the amplifying circuit 40 on the substrate 101, and at this time, the orthographic projection area of the fourth stress protection structure 64 on the substrate 101 is larger than the orthographic projection area of the amplifying circuit 40 on the substrate 101.

The signal reading circuit 32 is rigidly reinforced by the third stress protection structure 63, and when the terminal device is subjected to external mechanical stress, the stress acting on the signal reading circuit 32 is reduced by the third stress protection structure 63, so that the deformation of a transistor in the signal reading circuit 32 due to the external stress is reduced; moreover, the fourth stress protection structure 64 is used for rigidly reinforcing the amplifying circuit 40, and when the terminal equipment is subjected to external mechanical stress, the fourth stress protection structure 64 is used for reducing the stress applied to the amplifying circuit 40, so that the deformation of the transistor in the amplifying circuit 40 caused by the external stress is reduced.

It should be noted that the display panel 10 shown in fig. 6 is different from the display panel 10 shown in fig. 2 in the distribution of the stress-protection structures for rigidly reinforcing the signal reading circuit 32 and the amplifying circuit 40, the orthographic projection of the second stress-protection structure 62 on the substrate 101 in fig. 2 covers the orthographic projection of the signal reading circuit 32 and the amplifying circuit 40 on the substrate 101, the orthographic projection of the third stress-protection structure 63 on the substrate 101 in fig. 6 covers the orthographic projection of the signal reading circuit 32 on the substrate 101, the orthographic projection of the fourth stress-protection structure 64 on the substrate 101 covers the orthographic projection of the amplifying circuit 40 on the substrate 101, and the rest of the structures are basically similar.

In order to more clearly understand the connection relationship between the photosensitive cells 31, the signal reading circuit 32, and the amplifying circuit 40 and the driving chip 50 in the embodiment of the present application, as shown in fig. 7, the photosensitive cells 31 in the same column are connected to the same high-level signal line VDD, and the high-level signal line VDD is connected to the VDD pin of the driving chip 50, and the driving chip 50 provides a high-level voltage to the photosensitive cells 31 through the VDD pin and the high-level signal line VDD; the photosensitive units 31 in the same row are connected to a control signal line V0, the control signal line V0 is connected to a V0 pin of the driving chip 50, and the driving chip 50 provides a control voltage to the photosensitive units 31 through the V0 pin and the control signal line V0.

The light sensing units 31 In the same row are further connected to a first output signal line Out1, the first output signal line Out1 is connected to a signal input terminal In1 of the signal reading circuit 31, the signal reading circuit 32 is further connected to a high level signal line VDD, a first scanning signal line Scan1, an initialization signal line Vint, a second scanning signal line Scan2, a ground line GND, and a reading signal line Tx, respectively, and the high level signal line VDD, the first scanning signal line Scan1, the initialization signal line Vint, the second scanning signal line Scan2, the ground line GND, and the reading signal line Tx are connected to corresponding pins of the driving chip 50, respectively.

A signal output end Out2 of the signal reading circuit 32 is connected to a signal input end In2 of the amplifying circuit 40, the amplifying circuit 40 is further connected to a high-voltage signal line Vgh, a low-voltage signal line Vgl, and a third output signal line Out3, the high-voltage signal line Vgh and the low-voltage signal line Vgl are further connected to corresponding pins of the driving chip 50, and the third output signal line Out3 is connected to an input pin In3 of the driving chip 50, so that the photosensitive signal generated by the photosensitive unit 31 In the embodiment of the present application is transmitted to the signal reading circuit 32 through the first output signal line Out1, the signal reading circuit 32 inputs the read photosensitive signal to the signal input end In2 of the amplifying circuit 40, and the photosensitive signal is amplified by the amplifying circuit 40 and then transmitted to the driving chip 50 through the third output signal line Out3, and the amplified photosensitive signal is identified by the driving chip 50.

It should be noted that, in some embodiments, some external resistors and/or external capacitors may be further disposed between the amplifying circuit 40 and the driving chip 50 according to actual requirements, which is not described in more detail in this embodiment of the present application.

Fig. 8 is a flowchart illustrating a method for manufacturing a display screen according to an embodiment of the present application. Referring to fig. 8, a method for manufacturing a display screen according to an embodiment of the present application may specifically include the following steps:

step 801 forms a photosensor on a substrate.

In the embodiment of the present application, first, a substrate 101 is provided, and then, a photosensor is formed on the substrate 101, the photosensor includes a plurality of photosensitive cells 31 formed in the display area 11, and a signal reading circuit 32 and an amplifying circuit 40 formed in the non-display area 12, the plurality of photosensitive cells 31 are connected to a signal input terminal of the signal reading circuit 32, a signal output terminal of the signal reading circuit 32 is connected to a signal input terminal of the amplifying circuit 40, and a signal output terminal of the amplifying circuit 40 extends to a position where the driving chip 50 is located through a third output signal line Out3 so as to be bound to the driving chip 50.

Each photosensitive unit 31 includes at least one photosensitive element, each photosensitive element is a first transistor, a transistor in the signal reading circuit 32 and a transistor in the amplifying circuit 40 are second transistors, and the specific forming processes of the first transistor and the second transistor are as follows:

first, a first active layer 311 of a first transistor and a second active layer 321 of a second transistor are formed on a substrate 101 using a patterning process; then, a gate insulating layer is formed to cover the first and second active layers 311 and 321, which may also cover the substrate 101 outside the region where the first and second active layers 311 and 321 are located, and when the second and first gate insulating layers 322 and 312 are disposed at the same layer and connected to each other, the second and first gate insulating layers 322 and 312 may be collectively referred to as a gate insulating layer; next, a first gate layer 313 of the first transistor and a second gate layer 323 of the second transistor are formed on the gate insulating layer by using a patterning process; then, an interlayer dielectric layer covering the first gate layer 313 and the second gate layer 323 is formed, the interlayer dielectric layer may further cover a gate insulating layer outside the region where the first gate layer 313 and the second gate layer 323 are located, and when the first interlayer dielectric layer 314 and the second interlayer dielectric layer 324 are disposed at the same layer and connected to each other, the first interlayer dielectric layer 314 and the second interlayer dielectric layer 324 may be collectively referred to as an interlayer dielectric layer; finally, a patterning process is performed on the interlayer dielectric layer to form a first source 315 and a first drain 316 of the first transistor, and a second source 325 and a second drain 326 of the second transistor.

Since the first gate layer 313 of the first transistor is a first conductive layer, and the second gate layer 323 of the second transistor includes the first conductive layer 3231 and the second conductive layer 3232 which are stacked, the first gate layer 313 of the first transistor and the second gate layer 323 of the second transistor can be formed in the following two ways.

In an alternative embodiment, a first conductive film and a second conductive film are sequentially formed on a gate insulating layer by sputtering or the like, a photoresist is coated on the second conductive film, and then the photoresist is exposed by using a halftone mask, developed after exposure, and then etched by using an etching process, so that a first gate layer 313 of a first transistor and a second gate layer 323 of a second transistor are formed.

Taking the photoresist coated on the second conductive film as a negative photoresist as an example, in the halftone mask plate, the light transmittance at the region corresponding to the second gate layer 323 is greater than the light transmittance at the region corresponding to the first gate layer 313, and the light transmittance at the region corresponding to the first gate layer 313 is greater than the light transmittance at the region other than the regions where the second gate layer 323 and the first gate layer 313 are located. Therefore, after the photoresist is exposed and developed by using the halftone mask, the photoresist at the region where the second gate layer 323 is located is completely retained, the photoresist at the region where the first gate layer 313 is located is partially removed, and the photoresist at the region other than the region where the second gate layer 323 and the first gate layer 313 are located is completely removed; accordingly, after the first conductive film and the second conductive film are etched by using an etching process, the first conductive film and the second conductive film at the second gate layer 323 are completely remained, so that the second gate layer 323 includes the first conductive layer 3231 and the second conductive layer 3232 which are stacked, the second conductive film at the region where the first gate layer 313 is located is etched, and the first conductive film is not etched, so that the first gate layer 313 is a first conductive layer.

Of course, the photoresist coated on the second conductive film may also be a positive photoresist, in this case, in the halftone mask, the light transmittance at the region corresponding to the second gate layer 323 is smaller than the light transmittance at the region corresponding to the first gate layer 313, and the light transmittance at the region corresponding to the first gate layer 313 is smaller than the light transmittance at the region other than the regions where the second gate layer 323 and the first gate layer 313 are located.

In another alternative embodiment, a first conductive film is formed over the gate insulating layer by a sputtering process or the like; patterning the first conductive film to form a first gate layer 313 of the first transistor and a first conductive layer 3231 included in a second gate layer 323 of the second transistor, wherein the first gate layer 313 of the first transistor is a first conductive layer; next, a sputtering process is used to form a second conductive film on the side of the first conductive layer 3231 away from the substrate 101; the second conductive film is patterned to form the second conductive layer 3232 included in the second gate layer 323 of the second transistor.

The patterning process mainly includes processes of photoresist coating, exposure, development, etching, and photoresist stripping.

Step 802, forming a stress protection layer on the side of the photoelectric sensor far away from the substrate.

After a plurality of photosensitive units 31, a signal reading circuit 32 and an amplifying circuit 40 are formed on a substrate 101, at least one layer of organic insulating film is sequentially formed on one side of a photoelectric sensor, which is far away from the substrate 101, by a coating process and the like, the organic insulating film is dried and cured, then the organic insulating film is exposed by a mask plate, and after exposure, development is performed, so that a stress protection layer is formed.

The stress protection layer includes first stress protection structures 61 corresponding to the light sensing units 31 one by one, and each first stress protection structure 61

The orthographic projection on the substrate 101 covers the orthographic projection of one of the light-sensing units 31 on the substrate 101. In addition, the stress protection layer further comprises a second stress protection structure 62, wherein the orthographic projection of the second stress protection structure 62 on the substrate 101 covers the orthographic projection of the signal reading circuit 32 and the amplifying circuit 40 on the substrate 101; or, the stress protection layer further includes a third stress protection structure 63 and a fourth stress protection structure 64, an orthographic projection of the third stress protection structure 63 on the substrate 101 covers an orthographic projection of the signal reading circuit 32 on the substrate 101, and an orthographic projection of the fourth stress protection structure 64 on the substrate 101 covers an orthographic projection of the amplifying circuit 40 on the substrate 101.

It should be noted that the process for forming the stress protection layer is not limited to the above coating, exposing and developing processes, and the process for forming the stress protection structure shown in fig. 2 or fig. 6 can be applied, and the embodiments of the present application can also be applied.

The above embodiments, structural diagrams or simulation diagrams are only schematic illustrations of the technical solutions of the present application, and the dimensional ratios thereof do not limit the scope of the technical solutions, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the above embodiments should be included in the scope of the technical solutions.

Claims

1. A display screen is characterized by comprising a substrate, a photoelectric sensor arranged on the substrate, and a stress protection layer arranged on one side, far away from the substrate, of the photoelectric sensor;

the photoelectric sensor comprises a plurality of photosensitive units, the stress protection layer comprises a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate;

the photoelectric sensor also comprises a signal reading circuit and an amplifying circuit;

each photosensitive unit comprises at least one photosensitive element, and each photosensitive element is a first transistor;

the gate layer of the first transistor is a first conductive layer;

the transistor in the signal reading circuit and the transistor in the amplifying circuit are second transistors, a gate layer of each second transistor comprises the first conductive layer and a second conductive layer which are arranged in a stacked mode, and the second conductive layer is located on one side, away from the substrate, of the first conductive layer;

and the orthographic projection of the second conducting layer on the substrate covers the orthographic projection of the first conducting layer on the substrate.

2. The display screen of claim 1, wherein the first stress protection structures correspond to the light sensing units one to one, and the first stress protection structures corresponding to two adjacent light sensing units are disconnected.

3. The display screen of claim 1, wherein the signal reading circuit is connected to each of the light sensing units and the amplifying circuit.

4. The display screen of claim 3, wherein the stress-shielding layer further comprises a second stress-shielding structure, an orthographic projection of the second stress-shielding structure on the substrate covering an orthographic projection of the signal readout circuitry and the amplification circuitry on the substrate.

5. The display screen of claim 3, wherein the stress-protection layer further comprises a third stress-protection structure and a fourth stress-protection structure, the third stress-protection structure being disconnected from the fourth stress-protection structure;

the orthographic projection of the third stress protection structure on the substrate covers the orthographic projection of the signal reading circuit on the substrate, and the orthographic projection of the fourth stress protection structure on the substrate covers the orthographic projection of the amplifying circuit on the substrate.

6. A display screen as recited in any one of claims 1-5, wherein the stress-shielding layer comprises at least one organic shielding layer.

7. Display screen according to claim 3,

the first transistor comprises an active layer, a grid electrode insulating layer, a grid electrode layer, an interlayer dielectric layer and a source drain electrode layer which are arranged in a stacked mode, wherein the source drain electrode layer comprises a source electrode and a drain electrode, and the source electrode and the drain electrode are connected with the active layer through via holes penetrating through the interlayer dielectric layer and the grid electrode insulating layer respectively;

the active layer comprises a channel region and doped regions positioned on two sides of the channel region, and doped ions in the doped regions are P-type ions.

8. The display screen of claim 7, wherein the material of the first conductive layer is a transparent conductive material.

9. The display screen of claim 8, wherein the material of the second conductive layer is a light-blocking conductive material.

10. The display screen of claim 3, wherein the display screen has a display area and a non-display area surrounding the display area, the plurality of light sensing units are uniformly distributed in the display area, and the signal reading circuit and the amplifying circuit are located in the non-display area.

11. A manufacturing method of a display screen is characterized by comprising the following steps:

forming a photosensor on a substrate; the photosensor includes a plurality of light sensing units;

forming a stress protection layer on one side of the photoelectric sensor, which is far away from the substrate;

the stress protection layer comprises a plurality of first stress protection structures, and the orthographic projection of each first stress protection structure on the substrate covers the orthographic projection of the photosensitive unit on the substrate;

the photoelectric sensor also comprises a signal reading circuit and an amplifying circuit; each photosensitive unit comprises at least one photosensitive element, each photosensitive element is a first transistor, and a grid layer of the first transistor is a first conductive layer; the transistor in the signal reading circuit and the transistor in the amplifying circuit are second transistors; a gate layer of the second transistor includes the first conductive layer and a second conductive layer which are stacked; the second conducting layer is positioned on one side, far away from the substrate, of the first conducting layer; and the orthographic projection of the second conducting layer on the substrate covers the orthographic projection of the first conducting layer on the substrate.

12. The method of claim 11,

the forming a photosensor on a substrate includes:

forming an active layer of the first transistor and an active layer of the second transistor on the substrate;

forming a gate insulating layer; the gate insulating layer covers an active layer of the first transistor and an active layer of the second transistor;

forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer;

forming an interlayer dielectric layer; the interlayer dielectric layer covers the gate layer of the first transistor and the gate layer of the second transistor;

and forming a source electrode and a drain electrode of the first transistor and a source electrode and a drain electrode of the second transistor on the interlayer dielectric layer.

13. The method of claim 12, wherein the forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer comprises:

sequentially forming a first conductive film and a second conductive film on the gate insulating layer;

patterning the first conductive film and the second conductive film by using a halftone mask plate to form a gate layer of the first transistor and a gate layer of the second transistor;

the first conductive layer is obtained by patterning the first conductive film, and the second conductive layer is obtained by patterning the second conductive film.

14. The method of claim 12, wherein the forming a gate layer of the first transistor and a gate layer of the second transistor on the gate insulating layer comprises:

forming a first conductive film on the gate insulating layer;

patterning the first conductive film to form a gate layer of the first transistor and a first conductive layer included in the gate layer of the second transistor; a gate layer of the first transistor is the first conductive layer;

forming a second conductive film on one side of the first conductive layer far away from the substrate;

and patterning the second conductive film to form a second conductive layer included in a gate layer of the second transistor.

15. A terminal device, comprising a driving chip and a display screen according to any one of claims 1 to 10, wherein the driving chip is connected to a signal output terminal of an amplifying circuit included in the display screen.