CN114883404A - GaN device with mixed polarity and preparation method thereof - Google Patents

Abstract

The invention provides a GaN device with mixed polarity and a preparation method thereof, wherein different 2DEG concentrations of a source region, a drain region and a grid electrode can be realized by arranging a transverse alternate mixed polarity GaN buffer layer and a mixed polarity AlGaN/GaN double heterojunction, respectively arranging the source region and the drain region on an N polarity GaN channel layer and arranging the grid electrode on an AlGaN barrier layer; in addition, the AlGaN back barrier layer is introduced below the GaN channel layer, so that the distance from the metal gate to the channel can be shortened, the short-channel effect is inhibited, and the AlGaN back barrier layer can be used for preparing small-size devices. According to the preparation method provided by the invention, the GaN buffer layers with different transverse polarities are realized through a one-step epitaxial process, the source region and the drain region have higher concentration 2DEG so as to form smaller ohmic contact resistance, etching or a secondary epitaxial multi-step additional process is not needed, the process is simpler and has good repeatability, a high-quality epitaxial layer is obtained, and the reliability of the device is improved.

Description

Mixed polarity GaN device and method of making the same

technical field

The invention belongs to the technical field of semiconductors, and relates to a semiconductor device and a preparation method thereof.

Background technique

As a representative of the third-generation semiconductor materials, gallium nitride (GaN) has many excellent properties such as high critical breakdown electric field, high electron mobility, high two-dimensional electron gas concentration, and good high-temperature working ability. Therefore, GaN-based third-generation semiconductor devices are now widely used in base stations, communications, radars, satellites, and navigation systems due to their high withstand voltage and high power characteristics.

Although AlGaN/GaN HEMT devices have made great progress in microwave high-power characteristics, there is still a gap between the performance at high frequencies and the actual demand, especially in conventional GaN devices from source, gate to drain The 2D electron gas concentration is consistent, and the problems exposed by traditional heterojunction HEMT devices are increasingly prominent, such as the short channel effect and limited improvement in power density. At present, the commonly used groove technology achieves relatively high channel 2DEG concentration by thinning only the AlGaN barrier layer under the gate, while leaving the remaining thicker barrier layer, and changing the device threshold and corresponding device characteristics. In addition, the source and drain contact resistance can be reduced by secondary epitaxy of the highly doped GaN buffer layer in the source region and the drain region. However, whether an etching method or a secondary epitaxy process is used, additional multi-step processes are required, and the etching will cause damage to the material and affect the electrical properties of subsequent devices.

Therefore, there is a need to seek an improved process and corresponding device structure that can achieve different 2DEG concentrations in the source, drain and gate regions.

SUMMARY OF THE INVENTION

In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a mixed-polarity GaN device and a preparation method thereof, which are used to solve the problem that the GaN device in the prior art is difficult to achieve high-quality ohmic contact and short channel effect. , The device reliability is poor, the production process is complex, and the application cost is high.

In order to achieve the above object and other related objects, the present invention provides a mixed-polarity GaN device, comprising the following steps:

Substrate:

The AlN nucleation region is arranged on the predetermined area of the substrate;

A GaN buffer layer, the GaN buffer layer includes a Ga-polar GaN buffer layer and an N-polar GaN buffer layer, the Ga-polar GaN buffer layer is located on the AlN nucleation region in a predetermined region of the substrate, so The N-polar GaN buffer layer is located on the remaining area of the substrate, and the Ga-polar GaN buffer layer and the N-polar GaN buffer layer are alternately arranged laterally;

an epitaxial stack, the epitaxial stack is disposed on the GaN buffer layer, the epitaxial stack includes an AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer to form a laterally alternating arrangement of Ga polarities AlGaN/GaN double heterojunction and N-polar AlGaN/GaN double heterojunction;

a metal source electrode and a metal drain electrode, the metal source electrode and the metal drain electrode are respectively disposed in the openings penetrating to the GaN channel layer, the metal source electrode and the metal drain electrode are respectively connected with the GaN channel layer The channel layer forms an ohmic contact;

and a metal gate disposed on the AlGaN barrier layer.

Optionally: a plurality of the AlN nucleation regions are arranged on a predetermined area of the substrate at intervals, and each AlN nucleation region has a thickness ranging from 5 nm to 10 nm.

Optionally, the metal source electrode and the metal drain electrode are arranged on the N-polarity GaN channel layer corresponding to the remaining area of the substrate, and the Ga-polarity AlGaN potential corresponding to the predetermined area of the substrate is arranged. The metal gate is arranged on the barrier layer, the metal source and the metal drain are respectively arranged in openings penetrating to the N-polar GaN channel layer and form ohmic contact with the N-polar GaN channel layer .

Optionally, the epitaxial stack further includes an AlN insertion layer on the Ga polar GaN buffer layer, the AlN insertion layer having a thickness ranging from 0.5 nm to 1 nm.

Optionally, in the AlGaN/GaN double heterojunction, the AlGaN back barrier layer has the expression Alx1Ga1 _-x1N and the Al composition _x1 is in the range _of 0.25-0.35, and the AlGaN back The thickness of the barrier layer is in the range of 10nm-20nm, the GaN channel layer has a thickness in the range of 5nm-50nm, the AlGaN barrier layer has the expression _{Alx2Ga1 -x2N} and the Al composition _x2 is in the range of 0.5-1 , and the thickness of the AlGaN barrier layer ranges from 5 nm to 10 nm.

Optionally, the thickness ranges of the N-polar GaN buffer layer and the Ga-polar GaN buffer layer are respectively 1 μm-2 μm, and the N-polar GaN buffer layer and the Ga-polar GaN buffer layer are respectively made of C. or Fe doped and have a doping concentration in the range of 5×10 ¹⁷ -5×10 ¹⁸ .

Optionally, the metal source electrode is electrically connected through a back electrode penetrating from the back surface of the substrate to the metal source electrode.

The present invention also provides a preparation method of a mixed-polarity GaN device, the preparation method comprising:

A substrate is provided on which N-polarity GaN buffer layers and Ga-polarity GaN buffer layers are alternately arranged laterally, including the following steps:

forming an AlN nucleation layer on the substrate;

patterning the AlN nucleation layer to retain AlN nucleation regions on predetermined regions of the substrate;

forming a GaN buffer layer over the substrate, wherein a Ga-polar GaN buffer layer is formed on the AlN nucleation region, and an N-polar GaN buffer layer is formed on the rest of the substrate;

Forming an epitaxial stack on the GaN buffer layer, including epitaxial growth of an AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer to form a laterally alternately arranged Ga-polar AlGaN/GaN double heterojunction and an N-pole AlGaN/GaN double heterojunction:

etching the epitaxial stack according to a pattern mask to form openings through the N-polar GaN buffer layer;

filling metal in the opening to form a metal source and a metal drain;

A pattern area of a gate is defined on the AlGaN barrier layer by a photolithography process, and a metal gate is formed according to the pattern area of the gate.

Optionally, forming the epitaxial stack includes the step of: epitaxially growing an AlN insertion layer on the GaN buffer layer before epitaxially growing the AlGaN back barrier layer, wherein the AlN insertion layer has a thickness of 0.5 nm to 1 nm. thickness range.

Optionally, the opening is located in the N-polar AlGaN/GaN double heterojunction corresponding to the remaining region of the substrate and penetrates to the N-polar GaN channel layer, and the metal gate is formed on the substrate. The predetermined region of the bottom corresponds to the Ga-polar AlGaN barrier layer.

Optionally, the step of etching the AlGaN barrier layer according to the pattern mask includes: spin-coating a bottom layer photoresist and a top layer photoresist in turn; performing a photolithography process, and defining corresponding The first pattern area of the opening and the second pattern area that defines the opening in the top layer photoresist, the lateral dimension of the first pattern area is larger than the second pattern area defined by the second layer of photoresist. The lateral size of the graphic area, wherein the lateral size of the first graphic area and the second graphic area is controlled by the time of the development process.

Optionally, the step of etching the AlGaN barrier layer according to the pattern mask further comprises: anisotropically etching N through the second pattern region defined in the top layer photoresist by a dry etching process. A polar AlGaN barrier layer to form the opening through to the N-polar GaN channel layer.

Optionally, the preparation method further includes the following steps: defining a pattern area corresponding to the metal source on the backside of the substrate, and etching the substrate by ICP etching to expose the N-polar GaN buffer layer. surface; performing a wet etching process with KOH etching solution to form a back hole penetrating the metal source; depositing a metal electrode in the back hole to form a back electrode electrically connected to the metal source.

Optionally, the step of forming the metal source electrode and the metal drain electrode further includes: performing an annealing process at 800° C.-850° C. for 1 min-5 min, so that the metal source electrode and the metal drain electrode and the N The polar GaN buffer layer forms an ohmic contact.

As described above, the mixed-polarity GaN device and the preparation method thereof of the present invention have the following beneficial effects:

The mixed-polarity GaN device provided by the present invention is provided with laterally alternately arranged Ga-polarity and N-polarity GaN buffer layers, and a mixed-polarity AlGaN/GaN double heterojunction is formed on the GaN buffer layer. The source region and the drain region are arranged on the N-polar GaN channel layer, and the gate is arranged on the AlGaN barrier layer, so that different 2DEG concentrations of the source/drain region and the gate can be realized; in addition, the AlGaN back potential is introduced under the GaN channel layer. The barrier layer can shorten the distance from the metal gate to the channel, thereby suppressing the short channel effect, so it can be used to fabricate small-sized devices. Further, by utilizing the property that the ohmic contact can be directly formed on the N-polar GaN buffer layer, the discontinuity of the conduction band is reduced, which is beneficial to realize a smaller ohmic contact resistance.

The preparation method of the mixed-polarity GaN device of the present invention realizes the mixed-polarity GaN buffer layer and the mixed-polarity AlGaN/GaN double heterojunction arranged alternately laterally through a one-step epitaxy process, so that the source region and the drain region have higher Concentration of 2DEG, easy to form smaller ohmic contact resistance, without the need for etching or secondary epitaxy multi-step additional processes, to avoid damage to the epitaxial layer by etching, the process is simpler and more repeatable, which is conducive to obtaining high-quality epitaxy layers and improve device reliability.

Description of drawings

FIG. 1 shows a process flow diagram for fabricating mixed-polarity GaN devices according to an embodiment of the present invention.

2A-2L are schematic diagrams showing the structures of various stages of preparing a mixed-polarity GaN device according to an embodiment of the present invention, wherein FIG. 2G is a partial cross-sectional schematic diagram of the structure shown in FIG. 2F .

3A-3B are schematic cross-sectional views of a mixed-polarity GaN device according to an embodiment of the present invention, wherein FIG. 3B is a partial cross-sectional schematic view of an epitaxial stack of the mixed-polarity GaN device shown in FIG. 3A .

Component label description

100-substrate; 200-AlN nucleation layer; 210-AlN nucleation region; 310-N polar GaN buffer layer; 320-Ga polar GaN buffer layer; 400, 410- epitaxial stack; 401, 411-AlN Insertion layer; 402, 412-AlGaN back barrier layer; 404, 414-GaN channel layer; 406, 416-AlGaN barrier layer; 420-opening; 510-bottom photoresist; 520-top photoresist; 430 - back hole; 612 - back electrode; 610 - metal source; 620 - metal drain; 630 - metal gate.

Detailed ways

The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional views showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the protection scope of the present invention. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in the actual production.

For convenience of description, spatially relative terms such as "below," "below," "below," "below," "above," "on," etc. may be used herein to describe an element shown in the figures or The relationship of a feature to other components or features. It will be understood that these spatially relative terms are intended to encompass other directions of the device in use or operation than those depicted in the figures. In addition, when a layer is referred to as being 'between' two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. As used herein, "between" means including both endpoints.

In the context of this application, descriptions of structures where a first feature is "on" a second feature can include embodiments in which the first and second features are formed in direct contact, and can also include further features formed over the first and second features. Embodiments between the second features such that the first and second features may not be in direct contact.

It should be noted that the diagrams provided in this embodiment are only to illustrate the basic concept of the present invention in a schematic way, so the diagrams only show the components related to the present invention rather than the number, shape and the number of components in the actual implementation. For dimension drawing, the type, quantity and proportion of each component can be arbitrarily changed in actual implementation, and the component layout may also be more complicated.

In order to achieve different 2DEG concentrations in the gate and source and drain regions, as well as to achieve a smaller ohmic contact resistance, the present invention provides a mixed-polarity GaN device, which includes:

Substrate:

The AlN nucleation region is arranged on the predetermined area of the substrate;

A GaN buffer layer, the GaN buffer layer includes a Ga-polar GaN buffer layer and an N-polar GaN buffer layer, the Ga-polar GaN buffer layer is located on the AlN nucleation region in a predetermined region of the substrate, so The N-polar GaN buffer layer is located on the remaining area of the substrate, and the Ga-polar GaN buffer layer and the N-polar GaN buffer layer are alternately arranged laterally;

an epitaxial stack, the epitaxial stack is disposed on the GaN buffer layer, the epitaxial stack includes an AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer to form a laterally alternating arrangement of Ga polarities AlGaN/GaN double heterojunction and N-polar AlGaN/GaN double heterojunction;

a metal source electrode and a metal drain electrode, the metal source electrode and the metal drain electrode are respectively disposed in the openings penetrating to the GaN channel layer, the metal source electrode and the metal drain electrode are respectively connected with the GaN channel layer The channel layer forms an ohmic contact;

and a metal gate disposed on the AlGaN barrier layer.

The mixed-polarity GaN device of the present invention comprises: Ga-polar GaN buffer layers and N-polar GaN buffer layers are alternately arranged laterally, and a metal source electrode and a metal drain electrode are arranged on the GaN channel layer, and a metal source electrode and a metal drain electrode are arranged on the GaN channel layer. Setting a metal gate on the top can achieve different 2DEG concentrations between the source and drain regions and the gate, and introducing an AlGaN back barrier layer under the GaN channel layer can shorten the distance from the metal gate to the channel, thereby suppressing short channel effect.

Different from the previous thin barrier technology, the secondary etching process is used to achieve different 2DEG concentrations from the gate, the source to the drain. The gate electrode, the source electrode and the drain electrode are arranged on the mass junction, which avoids multi-step processes such as secondary epitaxy and etching, and the process is more simplified and has good repeatability.

On the other hand, the AlGaN/GaN/AlGaN double heterojunction can significantly enhance the confinement of carriers, thereby improving the mobility of carriers, and can be used to fabricate small-sized high-frequency GaN devices.

Hereinafter, each step of preparing the mixed-polarity GaN device of the present invention will be described in detail with reference to the accompanying drawings.

Example 1

This embodiment provides a preparation method of a mixed-polarity GaN device, as shown in FIG. 1 , the preparation method includes the following steps:

1) providing a substrate on which N-polarity GaN buffer layers and Ga-polarity GaN buffer layers alternately arranged laterally are formed;

2) Forming an epitaxial stack on the GaN buffer layer, including epitaxial growth of an AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer to form a laterally alternating Ga-polar AlGaN/GaN double heterojunction and N-pole AlGaN/GaN double heterojunction;

3) etching the AlGaN barrier layer according to a pattern mask to form an opening through to the GaN channel layer;

4) filling metal in the opening to form a metal source and a metal drain;

5) A pattern area of the gate is defined on the AlGaN barrier layer by a photolithography process, and a metal gate is formed according to the pattern area of the gate.

First, step 1) is performed: a substrate is provided on which N-polarity GaN buffer layers and Ga-polarity GaN buffer layers are alternately arranged laterally. Referring to FIG. 2A, before forming a lateral mixed polarity GaN buffer layer on a substrate 100, an AlN nucleation layer 200 is formed on the substrate; the AlN nucleation layer 200 is patterned to remain on a predetermined area of the substrate AlN nucleation region 210 . In this embodiment, the substrate 100 may be a sapphire substrate.

Specifically, the substrate 100 may be moved into a processing chamber to perform a metal organic compound chemical vapor deposition (MOCVD) process to form the AlN nucleation layer 200 , including: first, in a H ₂ atmosphere at a temperature of 1100° C., the substrate 100 Perform annealing treatment for 5min-10min to remove impurities and oxides on the substrate; then, pass NH ₃ gas, and perform nitridation treatment on the substrate 100 at a temperature of 950 ° C for 2min-6min; increase the temperature to 1040℃-1050℃, anneal the AlN layer formed by nitridation, the annealing atmosphere is NH ₃ and N ₂ , the total gas flow is 2slm-3slm, and the annealing is maintained for 10min-15min; preferably, the formed AlN nucleation layer 200 has a thickness in the range of 5nm-10nm. Subsequently, as shown in FIGS. 2B to 2D , the patterning of the AlN nucleation layer 200 is performed, including: by successively performing the operations of photoresist coating, sizing, baking, exposing and developing, so that the patterning of the AlN nucleation layer 200 is performed. The AlN nucleation layer 200 on the predetermined area is covered with photoresist; the AlN nucleation layer 200 is etched according to the pattern area defined by the photoresist to form the AlN nucleation area 210; after the etching is completed, the photoresist on the surface can be removed . As an example, KOH etching solution with a concentration of 50% may be used to perform etching for 1min-5min, so as to remove the AlN not covered by the photoresist and expose the sapphire substrate. Since the non-destructive etching is performed with KOH etching solution, the epitaxial layer will not be damaged. In this embodiment, a plurality of AlN nucleation regions 210 are formed on predetermined regions of the substrate at intervals, and the substrate surface is exposed between two adjacent AlN nucleation regions 210, so the AlN nucleation regions and the substrate are exposed. _The regions alternate laterally; that is, AlN nucleation regions alternate laterally with substantially _Al2O3 substrate regions.

Referring to FIG. 2E, proceeding to step 1), after removing the photoresist, a GaN buffer layer is epitaxially grown on the substrate formed with a plurality of AlN nucleation regions 210, wherein an N electrode is formed on the remaining regions of the substrate The polar GaN buffer layer 310 is formed, and the Ga polar GaN buffer layer 320 is formed on the AlN nucleation region 210 . Since the AlN nucleation region 210 is formed on the predetermined region of the substrate 100, the GaN buffer layer grown on the AlN nucleation region 210 has the Ga polar surface on top, that is, the growth is a Ga polar GaN buffer layer, and the GaN buffer layer is grown on the substrate 100. The exposed part of 100, after the low-temperature nitridation treatment, the GaN buffer layer grown on the surface of the sapphire has the N-polar plane on top, so that the N-polar and Ga-polar GaN buffer layers alternately arranged laterally can be obtained.

Specifically, the GaN buffer layer can be epitaxially grown by an MOCVD process, including: on the AlN nucleation regions alternately arranged in the lateral direction and the rest of the substrate, that is, on the sapphire substrate formed with a plurality of spaced AlN nucleation regions , at a temperature of 1050°C with _NH3 as a nitrogen (N) source for nitridation treatment for 1min-5min; then, maintaining the temperature at 1050°C, with TMGa as a gallium (Ga) source into the processing chamber for the substrate A GaN buffer layer is grown on it. The thicknesses of the formed GaN buffer layers range from 1 μm to 2 μm, respectively. In some examples, the GaN buffer layer may be doped with C or Fe to form a high resistance GaN buffer layer, intentional doping to introduce electron defects or acceptor levels to reduce the high density of threading dislocations within the GaN buffer layer The gate leakage current increases under the induced reverse bias condition, thereby improving the reliability of the device. As an example, the N-polar GaN buffer layer 310 and the Ga-polar GaN buffer layer 320 may have C or Fe doping concentrations in the range of 5×10 ¹⁷ -5×10 ¹⁸ , respectively.

Referring to FIGS. 2F to 2G , proceed to step 2), forming an epitaxial stack on the GaN buffer layer, including epitaxial growth of an AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer to form a laterally alternately arranged Ga Polar AlGaN/GaN double heterojunction and N-polar AlGaN/GaN double heterojunction. As an example, forming the epitaxial stack 400 includes the steps of sequentially epitaxially growing an AlGaN back barrier layer 402 , a GaN channel layer 404 and AlGaN on the N-polar GaN buffer layers 310 and Ga-polar GaN buffer layers 320 that are alternately arranged laterally barrier layer 406 . Preferably, the step of forming the epitaxial stack 400 further includes: before forming the AlGaN/GaN double heterojunction, epitaxially growing an AlN insertion layer 401 on the GaN buffer layer; then growing AlGaN on the AlN insertion layer 401 The back barrier layer 402, wherein the AlN insertion layer 401 may have a thickness ranging from 0.5 nm to 1 nm. By introducing the AlN insertion layer, the tensile stress in the AlGaN thin film as the back barrier layer can be effectively relieved, the occurrence of cracks is avoided, and the subsequent epitaxial growth of the back barrier layer with increased Al composition and/or thickness provides favorable growth condition. Since the GaN buffer layer has laterally alternating N and Ga polarities, an AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer with an N-polar face on the N-polar GaN buffer layer are epitaxially grown on the N-polar GaN buffer layer. , the Ga-polar GaN buffer layer is epitaxially grown to form an AlGaN back barrier layer, a GaN channel layer, and an AlGaN barrier layer with a Ga-polar face on the upper surface, thereby forming a laterally alternately arranged N-polar AlGaN/GaN double heterolayer Mass junction and Ga-polar AlGaN/GaN double heterojunction.

Specifically, the AlN insertion layer 401 and the AlGaN back barrier layer 402 may be grown at a temperature of 1050° C.-1070° C. through an MOCVD process. By adjusting the Al composition and/or thickness of the back barrier layer under the GaN channel layer, the narrowing degree of the main channel layer can be modulated. The polarization effect of the /AlGaN heterojunction has a tendency to increase, and the increase of the back barrier height will enhance the confinement of the 2DEG in the main channel. In this embodiment, the AlGaN back barrier layer 402 may have the expression Al _x1 Ga _1-x1 N and the Al composition x ₁ in the range of 0.25-0.35, and the thickness of the AlGaN back barrier layer 402 is in the range of 10 nm- 20nm, in order to balance the influence of the increase in the confinement of the main channel carriers and the gradual decrease in the areal density caused by the increase of the Al composition and the thickness of the back barrier layer.

After step 2), as shown in FIG. 2H-FIG. 2I, step 3) is performed: the AlGaN barrier layer is etched according to a pattern mask to form an opening penetrating to the GaN channel layer. In this embodiment, the opening 420 may be formed to penetrate the N-polar AlGaN back barrier layer to expose the N-polar GaN channel layer, that is, the N-polar AlGaN/GaN double hetero layer corresponding to the remaining area of the substrate is formed. in quality.

It should be noted that although the double-layer photoresist is used as an example to describe the specific process steps of etching the AlGaN barrier layer according to the pattern mask, it does not mean that it is limited to this, as long as the photoresist can be used according to the pattern mask. The pattern area corresponding to the opening can be defined in the resist. Specifically, etching the AlGaN barrier layer according to the pattern mask includes the following steps: sequentially spin-coating the bottom layer photoresist 510 and the top layer photoresist 520 to form a double layer photoresist, performing a photolithography process to A first pattern area corresponding to the opening is defined in the bottom layer photoresist 510 and a second pattern area corresponding to the opening is defined in the top layer photoresist 520, and the lateral size of the first pattern area is larger than that of all the openings. The lateral dimension of the second pattern area defined by the second layer of photoresist. In this embodiment, the bottom layer photoresist 510 can be selected from polydimethylglutarimide (PMGI), and the top layer photoresist 520 can be selected from i-line SPR series photoresist. By increasing the overall thickness of the photoresist, it is also possible to control the indentation of the bottom photoresist development relative to the i-line SPR series photoresist on the top layer, that is, the lateral dimensions of the first pattern area and the second pattern area , in particular, the amount of indentation can be controlled by the time of the development process, which is helpful for the subsequent stripping of the photoresist and its attached excess metal.

Next, the AlGaN barrier layer is etched through the second pattern region defined in the top layer photoresist. Specifically, an N-polar AlGaN barrier layer is anisotropically etched through the second pattern region defined in the top layer photoresist through a dry etching process to expose an N-polar GaN channel layer to form through to the opening 420 on the N-polar GaN channel layer.

Referring to FIG. 2J, step 4) is performed: metal is filled in the opening 420 to form a metal source electrode and a metal drain electrode. The photoresist used in the previous etching process can be used to deposit multiple layers of metal in a self-aligned manner as the metal source 610 and the metal drain 620; then, the double layer of photoresist is stripped while the photoresist is attached The metal on the N-polar GaN buffer layer is removed together, leaving the metal electrode on the N-polar GaN buffer layer. For example, the multi-layer metal layer may include Ti/Al/Ni/Au.

Specifically, step 4) further includes: performing an annealing process at 800° C.-850° C. for 1 min-5 min, so that the metal source electrode 610 and the metal drain electrode 620 form ohmic contact with the N-polar GaN channel layer 310 . In this embodiment, the metal source electrode 610 and the metal drain electrode 620 are respectively formed in the openings 420 penetrating the N-polarity GaN channel layer, and respectively form ohmic contact with the N-polarity GaN channel layer. Contrary to Ga-polar GaN, an ohmic contact can be formed directly on the N-polar GaN channel layer without the need for a barrier layer on it, which reduces the discontinuity of the conduction band and reduces the barrier height, so that a higher voltage can be achieved. Small Ohmic Contact Resistance.

Then, step 5) is performed: a pattern area of the gate is defined on the AlGaN barrier layer by a photolithography process, and a metal gate is formed according to the pattern area of the gate. As an example, step 5) forming the metal gate 630 includes the following steps: after defining the pattern region of the gate on the AlGaN barrier layer 406, depositing metal on the surface of the photoresist according to the defined pattern region of the gate; then , the photoresist is stripped, and the metal attached to the photoresist is removed together, and the metal electrode on the AlGaN barrier layer 406 is left. For example, the metal gate may include Ni/Au.

In this embodiment, a metal gate 630 is formed on the AlGaN/GaN double heterojunction corresponding to the Ga-polar GaN buffer layer, that is, on the Ga-polar AlGaN barrier layer. By forming a metal gate on the AlGaN/GaN double heterojunction corresponding to the Ga polar GaN buffer layer, the introduction of the AlGaN back barrier layer will shorten the distance from the metal gate to the channel, improve the gate control ability, and reduce the Short channel effect, so it can be used to fabricate small size devices.

Optionally, after step 5), the preparation method may further include: forming a back electrode, the back electrode penetrating from the back surface of the substrate to the metal source electrode to achieve electrical connection. Specifically, forming the back electrode includes the following steps: defining a pattern area facing the metal source on the back side of the substrate 100, that is, the side away from the semiconductor device, and etching the substrate through an inductively coupled plasma (ICP) process to Expose the surface of the N-polar GaN buffer layer; use KOH etching solution to etch the N-polar GaN buffer layer 310, the N-polar AlGaN back barrier layer and the N-polar channel layer by a wet etching process to reveal the A metal source electrode is formed, thereby forming a back hole 430; a metal electrode is deposited in the back hole to form a back electrode 612 electrically connected to the metal source electrode 610, wherein the KOH etching solution is, for example, an 80% KOH solution. For example, ICP etching can be performed using BCl ₃ . Since the wet etching process using KOH etching solution has the selectivity between the nitrogen polar surface and the metal polar surface, that is, the etching rate of the KOH etching solution on the nitrogen polar surface is much higher than that of the metal polar surface. The N-polar GaN buffer layer is easy to be etched by KOH etching solution, while the Ga-polar GaN buffer layer is not easy to be etched, which reduces the damage and reliability problems caused by etching compared with the dry etching process.

Embodiment 2

3A-3B, the present embodiment provides a mixed-polarity GaN device, including: a substrate 100, an AlN nucleation region 210, a GaN buffer layer, an epitaxial stack 410, a metal source electrode 610 and a metal drain electrode 620, and a metal gate 630, wherein the AlN nucleation region 210 is disposed on a predetermined area of the substrate 100, and the GaN buffer layer includes an N-polar GaN buffer layer 310 and a Ga-polar GaN buffer layer 320, The Ga-polar GaN buffer layer 320 is disposed on the AlN nucleation region and on a predetermined area of the substrate, and the N-polar GaN buffer layer 310 is disposed on the remaining area of the substrate, so The Ga-polar GaN buffer layer and the N-polar GaN buffer layer are alternately arranged laterally, the epitaxial stack 410 is disposed on the GaN buffer layer, and the epitaxial stack 410 includes an AlGaN back barrier layer 412, The GaN channel layer 414 and the AlGaN barrier layer 416 are arranged to form N-polar AlGaN/GaN double heterojunctions and Ga-polar AlGaN/GaN double heterojunctions alternately arranged laterally, the metal source 610 and the Metal drain electrodes 620 are respectively disposed in the openings 420 penetrating to the GaN channel layer 414 , the metal source electrodes 610 and the metal drain electrodes 620 respectively form ohmic contact with the GaN channel layer, and the metal gate electrode 620 is in ohmic contact with the GaN channel layer. The pole 630 is disposed on the AlGaN barrier layer 414 .

As an example, a plurality of AlN nucleation regions 210 are provided at intervals on a predetermined region of the substrate, correspondingly the N-polar GaN buffer layer 310 on the substrate and the Ga-polarity on the AlN nucleation regions 210 The GaN buffer layers 320 are alternately arranged laterally.

Specifically, each AlN nucleation region 210 has a thickness in the range of 5 nm-10 nm, and the N-polar GaN buffer layer 310 and the Ga-polar GaN buffer layer 320 have thicknesses in the range of 1 μm-2 μm, respectively. The N-polar GaN buffer layer 310 and the Ga-polar GaN buffer layer 320 are doped with C or Fe, respectively, to form a high-resistance GaN buffer layer. Since the leakage of buffer layers and substrates of GaN-based high electron mobility transistors (HEMTs) will seriously affect the pinch-off and high-frequency characteristics of HEMTs, and doping C and Fe acceptor impurities, Fe introduced in GaN materials The ³⁺ / ²⁺ deep main energy level can compensate the background carrier concentration to achieve high resistance, and the introduction of C doping into the GaN buffer layer to achieve high resistance GaN epitaxy can avoid excessive impurities entering the MOCVD system. effects of the epitaxy process. Preferably, the N-polar GaN buffer layer 310 and the Ga-polar GaN buffer layer 320 may have C or Fe doping concentrations in the range of 5×10 ¹⁷ -5×10 ¹⁸ , respectively.

Referring to FIG. 3B, the mixed polarity GaN device further includes an epitaxial stack 410 disposed over the GaN buffer layer and including an AlGaN/GaN double heterojunction, wherein the AlGaN/GaN heterojunction is in , the AlGaN back barrier layer 412 has the expression Al _x1 Ga _1-x1 N and the Al composition x ₁ is in the range of 0.25-0.35, and the thickness of the AlGaN back barrier layer is in the range of 10 nm-20 nm, the GaN trench The channel layer 414 has a thickness in the range of 5nm-50nm, the AlGaN barrier layer 416 has the expression _{Alx2Ga1 -x2N} and the Al composition _x2 in the range of 0.5-1, and the AlGaN barrier layer has a thickness in the range of 0.5-1. 5nm-10nm. Due to the insertion of the AlGaN back barrier layer in the double heterojunction device, the interaction with the potential barrier formed by the upper layer of AlGaN sandwiches the carriers in the quantum well of the main channel, so that the distribution of carriers in the main channel changes. Narrow, the distribution range is closer to the upper AlGaN barrier layer, which improves the confinement of the main channel carriers. In addition, with the increase of Al composition and thickness of the back barrier layer, the polarization effect of the GaN/AlGaN heterojunction has a tendency to be enhanced, and the back barrier height increases, which can be appropriately changed according to the desired device performance of AlGaN Al composition and thickness of the back barrier layer to achieve modulation of the 2DEG distribution range.

Specifically, the AlGaN/GaN double heterojunction includes an AlGaN back barrier layer 412 , a GaN channel layer 414 and an AlGaN barrier layer 416 , wherein Ga is provided on the Ga-polar GaN buffer layer corresponding to a predetermined region of the substrate and on the Ga-polar GaN buffer layer. A polar AlGaN/GaN double heterojunction, and an N-polar AlGaN/GaN double heterojunction is provided on the N-polar GaN buffer layer corresponding to the rest of the substrate.

As an example, the epitaxial stack 410 also includes an AlN insertion layer 411 between the GaN buffer layer and the AlGaN/GaN double heterojunction. Due to the use of the AlN insertion layer, the stress mode of the AlGaN back barrier layer is changed, which can reduce the lattice mismatch between the top barrier and the GaN channel layer to a certain extent, which is conducive to the growth of materials with good lattice quality. Specifically, the AlN insertion layer 411 has a thickness ranging from 0.5 nm to 1 nm.

In this embodiment, the metal source electrode 610 and the metal drain electrode 620 are respectively arranged on the N-polarity GaN channel layer corresponding to the remaining regions of the substrate; that is, the metal source electrode 610 and the metal drain electrode 620 are respectively arranged on the through-hole GaN channel layer. into the opening 420 to the N-polar GaN channel layer and form ohmic contact with the N-polar GaN channel layer; the metal gate 630 is disposed on the Ga-polar AlGaN barrier layer corresponding to the predetermined region of the substrate . Since N-polar GaN and Ga-polar GaN have opposite polarities, there is no need to generate 2DEG through the polarization of the AlGaN barrier layer on the upper surface of the N-polar GaN buffer layer, and ohmic contact can be directly formed on the GaN layer with a narrower band gap. In addition, this reduces the discontinuity of the conduction band, which can reduce the height of the potential barrier, so that a smaller ohmic contact resistance can be achieved. As an example, as shown in FIG. 3A , the metal source electrode 610 may be electrically connected through a back electrode 612 disposed in the back hole 430 penetrating from the back surface of the substrate 100 to the metal source electrode 610 . By forming the back electrode and grounding the back electrode, the lateral component of the channel electric field can be increased, and the lateral electric field distribution of the channel can be more uniform, so that the breakdown voltage can be improved. A metal gate 630 , such as a Ni/Au metal layer, is also disposed on the epitaxial stack 400 , and the metal gate 630 forms a Schottky contact with the upper AlGaN barrier layer.

To sum up, the mixed-polarity GaN device and the preparation method thereof of the present invention have the following beneficial effects:

The mixed-polarity GaN device provided by the present invention is provided with laterally alternately arranged Ga-polarity and N-polarity GaN buffer layers, and a mixed-polarity AlGaN/GaN double heterojunction is formed on the GaN buffer layer. The source and drain regions are arranged on the N-polar GaN channel layer, and the gate is arranged on the AlGaN barrier layer, so that different 2DEG concentrations of the source and drain regions and the gate can be realized; in addition, the AlGaN backside is introduced under the GaN channel layer. The barrier layer can shorten the distance from the metal gate to the channel, thereby suppressing the short channel effect, so it can be used to prepare small-sized devices. Further, by utilizing the property that the ohmic contact can be directly formed on the N-polar GaN buffer layer, the discontinuity of the conduction band is reduced, which is beneficial to the formation of a smaller ohmic contact resistance.

The preparation method of the mixed-polarity GaN device of the present invention realizes a lateral mixed-polarity GaN buffer layer and an AlGaN/GaN double heterojunction through a one-step epitaxy process, so that the source region and the drain region have a higher concentration of 2DEG, which facilitates the formation of more Small ohmic contact resistance, without the need for etching or secondary epitaxy multi-step additional processes, to avoid damage to the epitaxial layer by etching, the process is simpler and more repeatable, which is conducive to obtaining high-quality epitaxial layers and improving the reliability of the device sex.

Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

The above-mentioned embodiments merely illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed in the present invention should still be covered by the claims of the present invention.

Claims (14)

1. A mixed polarity GaN device comprising the steps of:

substrate:

an AlN nucleation region provided on a predetermined region of the substrate;

a GaN buffer layer including a Ga-polarity GaN buffer layer and an N-polarity GaN buffer layer, the Ga-polarity GaN buffer layer being located on the AlN nucleation region of a predetermined region of the substrate, the N-polarity GaN buffer layer being located on the remaining region of the substrate, the Ga-polarity GaN buffer layer and the N-polarity GaN buffer layer being alternately arranged in a lateral direction;

the epitaxial lamination is arranged on the GaN buffer layer and comprises an AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer so as to form a Ga polarity AlGaN/GaN double heterojunction and an N polarity AlGaN/GaN double heterojunction which are transversely and alternately arranged;

the metal source electrode and the metal drain electrode are respectively arranged in an opening penetrating through the GaN channel layer, and ohmic contact is formed between the metal source electrode and the GaN channel layer;

a metal gate disposed on the AlGaN barrier layer.

2. The mixed polarity GaN device of claim 1 wherein: a plurality of the AlN nucleation regions are arranged on the predetermined region of the substrate at intervals, and each AlN nucleation region has a thickness ranging from 5nm to 10 nm.

3. The mixed polarity GaN device of claim 1 wherein: and arranging the metal source electrode and the metal drain electrode on the N-polarity GaN channel layer corresponding to the rest region of the substrate, arranging the metal grid electrode on the Ga-polarity AlGaN barrier layer corresponding to the preset region of the substrate, and respectively arranging the metal source electrode and the metal drain electrode in an opening penetrating through the N-polarity GaN channel layer and forming ohmic contact with the N-polarity GaN channel layer.

4. The mixed polarity GaN device of claim 1 wherein: the epitaxial stack further includes an AlN insert layer on the Ga-polar GaN buffer layer, the AlN insert layer having a thickness in a range of 0.5nm to 1 nm.

5. The mixed polarity GaN device of claim 3 wherein: in the AlGaN/GaN double heterojunction, the AlGaN back barrier layer has an expression Al _x1 Ga _1-x1 N and Al component x ₁ In the range of 0.25-0.35, and the AlGaN back-barrier layer has a thickness in the range of 10nm-20nm, the GaN channel layer has a thickness in the range of 5nm-50nm, and the AlGaN barrier layer has the expression Al _x2 Ga _1-x2 N and Al component x ₂ Is in the range of 0.5-1, and the AlGaN barrier layer has a thickness in the range of 5nm-10 nm.

6. The mixed polarity GaN device of claim 1 wherein: the thickness ranges of the N-polarity GaN buffer layer and the Ga-polarity GaN buffer layer are respectively 1-2 μm, the N-polarity GaN buffer layer and the Ga-polarity GaN buffer layer are respectively doped with C or Fe and have a thickness of 5 x 10 ¹⁷ -5×10 ¹⁸ Doping concentration within a range.

7. The mixed polarity GaN device of claim 1 wherein: the metal source electrode is electrically connected through a back electrode penetrating through the metal source electrode from the back surface of the substrate.

8. A preparation method of a mixed polarity GaN device is characterized by comprising the following steps:

providing a substrate, and forming N-polarity GaN buffer layers and Ga-polarity GaN buffer layers which are transversely and alternately arranged on the substrate, wherein the method comprises the following steps:

forming an AlN nucleating layer on the substrate;

patterning the AlN nucleation layer to leave an AlN nucleation region on a predetermined region of the substrate;

forming a GaN buffer layer above the substrate, wherein a Ga polarity GaN buffer layer is formed on the AlN nucleation region, and an N polarity GaN buffer layer is formed on the rest region of the substrate;

forming an epitaxial lamination on the GaN buffer layer, wherein the epitaxial lamination comprises an epitaxial growth AlGaN back barrier layer, a GaN channel layer and an AlGaN barrier layer so as to form a Ga polarity AlGaN/GaN double heterojunction and an N polarity AlGaN/GaN double heterojunction which are transversely and alternately arranged:

etching the AlGaN barrier layer according to the pattern mask to form an opening penetrating to the GaN channel layer;

filling metal in the opening to form a metal source electrode and a metal drain electrode;

and defining a pattern area of a grid on the AlGaN barrier layer through a photoetching process, and forming a metal grid according to the pattern area of the grid.

9. The method of fabricating a mixed polarity GaN device of claim 8 wherein forming the epitaxial stack further comprises: epitaxially growing an AlN insert layer on the GaN buffer layer before epitaxially growing the AlGaN back barrier layer, wherein the AlN insert layer has a thickness in a range of 0.5nm to 1 nm.

10. The method of fabricating a mixed polarity GaN device of claim 8, wherein: the opening is positioned in the N-polarity AlGaN/GaN double heterojunction corresponding to the rest area of the substrate and penetrates through the N-polarity GaN channel layer, and the metal gate is formed on the Ga-polarity AlGaN barrier layer corresponding to the preset area of the substrate.

11. The method of claim 10, wherein etching the AlGaN barrier layer according to the pattern mask comprises: sequentially and rotationally coating a bottom layer photoresist and a top layer photoresist; and executing a photoetching process, defining a first graph area corresponding to the opening in the bottom layer of photoresist and a second graph area corresponding to the opening in the top layer of photoresist, wherein the transverse size of the first graph area is larger than that of the second graph area defined by the second layer of photoresist, and the transverse sizes of the first graph area and the second graph area are controlled by the time of a developing process.

12. The mixed polarity GaN device of claim 11 wherein: the step of etching the AlGaN barrier layer according to the pattern mask further comprises: and anisotropically etching the N-polarity AlGaN barrier layer by the second pattern region defined in the top layer photoresist through a dry etching process to form the opening penetrating to the N-polarity GaN channel layer.

13. The method of fabricating a mixed polarity GaN device of claim 8 or 10 further comprising the steps of: defining a pattern region corresponding to the metal source electrode on the back surface of the substrate, and etching the substrate through an ICP (inductively coupled plasma) etching process to expose the surface of the N-polarity GaN buffer layer; performing a wet etching process by using KOH etching liquid to form a back hole penetrating to the metal source electrode; and depositing a metal electrode in the back hole to form a back electrode electrically connected with the metal source electrode.

14. The method of fabricating a mixed polarity GaN device of claim 10 wherein the step of forming the metal source and drain further comprises: and performing an annealing process at 800-850 ℃ for 1-5 min to form ohmic contacts between the metal source electrode and the metal drain electrode and the N-polarity GaN channel layer.

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