CN114840145A - Data loading method and device, computer equipment and storage medium - Google Patents
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- 238000011068 loading method Methods 0.000 title claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 36
- 238000004590 computer program Methods 0.000 claims description 10
- 230000002035 prolonged effect Effects 0.000 abstract description 4
- 238000004891 communication Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000004044 response Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
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- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007664 blowing Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
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- 239000002184 metal Substances 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0616—Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention discloses a data loading method and device, computer equipment and a storage medium, and relates to the technical field of efuse chips. The method comprises the following steps: acquiring chip data stored in the efuse chip; storing the chip data into the storage unit; and if a data reading request for the efuse chip is received, acquiring target data from the storage unit according to the data reading request. By applying the technical scheme of the invention, the chip data stored in the efuse chip is transferred to the storage unit in advance, and when the chip data is needed to be used subsequently, the chip data only needs to be read from the storage unit without accessing the efuse chip, so that the access times of the efuse chip are greatly reduced, and the service life of the efuse chip can be effectively prolonged.
Description
Technical Field
The present invention relates to the field of efuse chip technologies, and in particular, to a data loading method and apparatus, a computer device, and a storage medium.
Background
An efuse (electronic fuse) is a one-time programmable nonvolatile memory, the information stored by the efuse is not lost due to power failure of the system, and each bit (bit) can be programmed only once. It uses the EM effect (Electron Migration phenomenon) to realize the blowing.
efuse is widely used in chip manufacturing for saving data. In the efuse chip, each bit corresponds to a fuse, when the fuse is conducted, the fuse represents data "0", after the fuse is fused, the fuse represents data "1", all data of the efuse in the initial state are "0", and the fuse which needs to be rewritten into "1" can be fused when data is written.
With the shrinking process geometries and the use of High-K materials (High dielectric constant materials), efuse fuses are now made of metal instead, and over time, fuse debris generated during programming can grow back, which limits the number of times efuse can be read.
Under the existing production conditions, the production yield of chips with advanced processes has become a key factor for determining the cost. For the efuse chip, if there is a bad byte, the data may not be stored correctly, thereby causing the whole chip to malfunction.
In the prior art, when a program needs data stored in an efuse chip, the efuse chip is accessed once. Doing so would generate a significant amount of efuse chip access. This not only increases access latency, but also reduces the lifetime of the efuse chip. Due to the particularity of the efuse chip, the service life of the whole product is further shortened.
Disclosure of Invention
The invention provides a data loading method, a data loading device, computer equipment and a storage medium, and aims to solve the problem that the service life of an efuse chip is short due to the existing data reading mode of the efuse chip.
In a first aspect, the present invention provides a data loading method, where a loading system includes a main chip, an efuse chip and a storage unit, and the method is applied to the main chip, and the method includes:
acquiring chip data stored in the efuse chip;
storing the chip data into the storage unit;
and if a data reading request for the efuse chip is received, acquiring target data from the storage unit according to the data reading request.
The further technical scheme is that the acquiring of the chip data stored in the efuse chip comprises:
and if the main chip is detected to be powered on, reading the chip data from the efuse chip.
A further technical solution is that the main chip includes an output pin, and after the chip data is stored in the storage unit, the method further includes:
and adjusting the state of the output pin to be a preset state.
A further technical solution is that, before the target data is obtained from the storage unit according to the data reading request, the method further includes:
judging whether the state of the output pin is the preset state or not;
and if the state of the output pin is the preset state, executing the step of acquiring the target data from the storage unit according to the data reading request.
A further technical solution is that the data reading request is sent by an application program, and after the target data is acquired from the storage unit according to the data reading request, the method further includes:
and sending the target data to the application program.
A further technical solution is that the data reading request includes index information, and the acquiring target data from the storage unit according to the data reading request includes:
searching the target data from the chip data in the storage unit according to the index information;
and reading the target data from the storage unit.
The further technical scheme is that the storage unit comprises a register.
In a second aspect, the present invention also provides a data loading apparatus comprising means for performing the above method.
In a third aspect, the present invention further provides a computer device, which includes a memory and a processor, where the memory stores a computer program, and the processor implements the above method when executing the computer program.
In a fourth aspect, the invention also provides a computer-readable storage medium, storing a computer program which, when executed by a processor, is operable to carry out the method described above.
The invention provides a data loading method, a data loading device, computer equipment and a storage medium, and the technical effects at least comprise that:
by applying the technical scheme of the invention, the chip data stored in the efuse chip is transferred to the storage unit in advance, and when the chip data is needed to be used subsequently, the chip data only needs to be read from the storage unit without accessing the efuse chip, so that the access times of the efuse chip are greatly reduced, and the service life of the efuse chip can be effectively prolonged.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic view of an application scenario of a data loading method according to an embodiment of the present invention;
fig. 2 is a schematic flowchart of a data loading method according to an embodiment of the present invention;
fig. 3 is a schematic flowchart of a data loading method according to another embodiment of the present invention;
fig. 4 is a schematic block diagram of a data loading apparatus according to an embodiment of the present invention;
FIG. 5 is a schematic block diagram of a data loading apparatus according to another embodiment of the present invention;
FIG. 6 is a schematic block diagram of a computer device provided by the present invention.
Detailed Description
The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Referring to fig. 1, fig. 1 is a schematic view of an application scenario of the data loading method provided by the present invention. As shown in fig. 1, the loading system includes a main chip 1, an efuse chip 2 and a storage unit 3, wherein the main chip 1 is connected to the efuse chip 2 and the storage unit 3 respectively; in an embodiment, the efuse chip 2 and the memory unit 3 may be integrated into the main chip 1. It can be understood that the main chip 1, the efuse chip 2, and the storage unit 3 may be applied to an intelligent terminal, and an application program is installed in the intelligent terminal. The storage unit 3 may be embodied as a register, which has the characteristics of fast reading speed and long service life.
Fig. 2 is a schematic flow chart of a data loading method provided by the present invention. The method is applied to a master chip, and as shown in FIG. 2, the method includes the following steps S1-S3.
S1, acquiring the chip data stored in the efuse chip.
In specific implementation, the main chip acquires chip data stored in the efuse chip. For example, in one embodiment, each time the main chip is powered on, the chip data stored in the efuse chip is read out.
And S2, storing the chip data into the storage unit.
In specific implementation, the main chip transfers the read chip data to the storage unit, and when the chip data is needed subsequently, the main chip only needs to read the chip data from the storage unit, and does not need to access the efuse chip.
S3, if a data reading request for the efuse chip is received, acquiring target data from the storage unit according to the data reading request.
In specific implementation, if a data reading request for the efuse chip is received, target data is acquired from the storage unit according to the data reading request.
It should be noted that the target data is generally the chip data itself, and in some embodiments, the target data may also be a part of the chip data, which is not limited in this disclosure.
For example, in an embodiment, the data reading request includes index information, and the step S3 specifically includes: S31-S32.
S31, searching the target data from the chip data in the storage unit according to the index information.
In specific implementation, the main chip searches the target data from the chip data in the storage unit according to the index information. The index information may be, for example, the name of the data, the index information being a unique identification of the data.
And S32, reading the target data from the storage unit.
Through the technical scheme of the embodiment, the chip data stored in the efuse chip are transferred to the storage unit in advance, and the chip data are used subsequently, the efuse chip only needs to be read from the storage unit without accessing the efuse chip, so that the access times of the efuse chip are greatly reduced, and the service life of the efuse chip can be effectively prolonged.
Fig. 3 is a flowchart illustrating a data loading method according to another embodiment of the present invention. The method is applied to a master chip, and as shown in fig. 3, the method includes the following steps S401 to S406.
S401, if the main chip is detected to be electrified, reading the chip data from the efuse chip.
In specific implementation, when the main chip is detected to be powered on, the chip data stored in the efuse chip is automatically read. Through the steps, the chip data stored in the efuse chip can be automatically read when the chip is powered on and started.
S402, storing the chip data into the storage unit.
In specific implementation, the main chip transfers the read chip data to the storage unit, and when the chip data is needed subsequently, the main chip only needs to read the chip data from the storage unit, and does not need to access the efuse chip.
S403, adjusting the state of the output pin of the main chip to a preset state.
In specific implementation, an output pin is set in the main chip, and the output pin is used for reflecting the loading state of chip data of the efuse chip to an application program. In this embodiment, after the main chip finishes storing the chip data in the storage unit, the state of the output pin of the main chip is adjusted to a preset state, where the preset state may be, for example, a high level state. Therefore, when the state of the output pin is a preset state, the main chip is indicated to finish storing the chip data into the storage unit. Therefore, the application program can know whether the main chip finishes storing the chip data into the storage unit only by inquiring the state of the output pin.
S404, if a data reading request for the efuse chip is received, whether the state of the output pin is the preset state is judged.
In specific implementation, if a data reading request for the efuse chip is received, the main chip first determines whether the state of the output pin is the preset state.
If the state of the output pin is not the preset state, the main chip does not finish storing the chip data into the storage unit, and at the moment, the main chip ignores the data reading request and records the error condition in a log.
S405, if the state of the output pin is the preset state, acquiring target data from the storage unit according to the data reading request.
In a specific implementation, if the state of the output pin is the preset state, it indicates that the main chip has finished storing the chip data into the storage unit, and at this time, the main chip acquires the target data from the storage unit according to the data reading request.
It should be noted that the target data is generally the chip data itself, and in some embodiments, the target data may also be a part of the chip data, which is not limited in this disclosure.
For example, in an embodiment, the data reading request includes index information, and the step S3 specifically includes: S31-S32.
S31, searching the target data from the chip data in the storage unit according to the index information.
In specific implementation, the main chip searches the target data from the chip data in the storage unit according to the index information. The index information may be, for example, the name of the data, the index information being a unique identification of the data.
And S32, reading the target data from the storage unit.
S406, sending the target data to an application program.
It will be appreciated that the data read request is typically by an application. Therefore, after the main chip reads the target data, the target data is sent to the application program.
Through applying the technical scheme of this embodiment, the chip data stored in the efuse chip is transferred to the storage unit in advance, and the chip data is needed to be read from the storage unit only when the chip data is used subsequently, so that the efuse chip does not need to be accessed, the access times of the efuse chip are greatly reduced, and the service life of the efuse chip can be effectively prolonged.
Referring to fig. 4, fig. 4 is a schematic block diagram of a data loading device 40 provided in the present invention. Corresponding to the above data loading method, the present invention also provides a data loading device 40. The data loading device 40 includes a unit for executing the data loading method, and the data loading device 40 may be configured in a desktop computer, a tablet computer, a portable computer, or the like. Specifically, the data loading apparatus 40 includes: a first acquisition unit 41, a storage unit 42, and a second acquisition unit 43.
A first obtaining unit 41, configured to obtain chip data stored in the efuse chip;
a storage unit 42 for storing the chip data in the storage unit;
the second obtaining unit 43 is configured to, if a data reading request for the efuse chip is received, obtain target data from the storage unit according to the data reading request.
In an embodiment, the acquiring chip data stored in the efuse chip includes:
and if the main chip is detected to be powered on, reading the chip data from the efuse chip.
In an embodiment, the data reading request includes index information, and the obtaining target data from the storage unit according to the data reading request includes:
searching the target data from the chip data in the storage unit according to the index information;
and reading the target data from the storage unit.
Fig. 5 is a schematic block diagram of a data loading apparatus 40 according to another embodiment of the present invention. As shown in fig. 5, the data loading apparatus 40 of the present embodiment is the above-mentioned embodiment, and is added with an adjusting unit 44, a judging unit 45 and a sending unit 46.
And an adjusting unit 44, configured to adjust the state of the output pin to a preset state.
And a judging unit 45, configured to judge whether the state of the output pin is the preset state.
A sending unit 46, configured to send the target data to the application program.
It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation processes of the data loading apparatus 40 and each unit may refer to the corresponding descriptions in the foregoing method embodiments, and for convenience and brevity of description, no further description is provided herein.
The data loading means 40 may be implemented in the form of a computer program which can be run on a computer device as shown in fig. 6.
As shown in fig. 6, the embodiment of the present application provides a computer device, which includes a processor 111, a communication interface 112, a memory 113 and a communication bus 114, wherein the processor 111, the communication interface 112, the memory 113 complete mutual communication through the communication bus 114,
a memory 113 for storing a computer program;
in an embodiment of the present application, the processor 111 is configured to implement the data loading method provided in any one of the foregoing method embodiments when executing the program stored in the memory 113.
Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program. The computer program, when executed by a processor, causes the processor to perform a data loading method as provided by any of the method embodiments described above.
The storage medium is an entity and non-transitory storage medium, and may be various entity storage media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk. The computer readable storage medium may be non-volatile or volatile.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.
The steps in the method of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, while the invention has been described with respect to the above-described embodiments, it will be understood that the invention is not limited thereto but may be embodied with various modifications and changes.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A data loading method is characterized in that a loading system comprises a main chip, an efuse chip and a storage unit, the method is applied to the main chip, and the method comprises the following steps:
acquiring chip data stored in the efuse chip;
storing the chip data into the storage unit;
and if a data reading request for the efuse chip is received, acquiring target data from the storage unit according to the data reading request.
2. The method according to claim 1, wherein the obtaining chip data stored in the efuse chip comprises:
and if the main chip is detected to be powered on, reading the chip data from the efuse chip.
3. The method of claim 1, wherein the master chip includes an output pin, and wherein after storing the chip data in the storage unit, the method further comprises:
and adjusting the state of the output pin to be a preset state.
4. The method of claim 3, wherein before the retrieving target data from the storage unit according to the data read request, the method further comprises:
judging whether the state of the output pin is the preset state or not;
and if the state of the output pin is the preset state, executing the step of acquiring the target data from the storage unit according to the data reading request.
5. The method of claim 1, wherein the data read request is sent by an application program, and wherein after the target data is retrieved from the storage unit according to the data read request, the method further comprises:
and sending the target data to the application program.
6. The method of claim 1, wherein the data read request includes index information, and the retrieving target data from the storage unit according to the data read request comprises:
searching the target data from the chip data in the storage unit according to the index information;
and reading the target data from the storage unit.
7. The method of claim 1, wherein the storage unit comprises a register.
8. A data loading apparatus comprising means for performing a method as claimed in any one of claims 1 to 7.
9. A computer arrangement, characterized in that the computer arrangement comprises a memory having stored thereon a computer program and a processor implementing the method according to any of claims 1-7 when executing the computer program.
10. A computer-readable storage medium, characterized in that the storage medium stores a computer program which, when executed by a processor, implements the method according to any one of claims 1-7.
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| CN202210540126.2A CN114840145A (en) | 2022-05-17 | 2022-05-17 | Data loading method and device, computer equipment and storage medium |
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| CN202210540126.2A CN114840145A (en) | 2022-05-17 | 2022-05-17 | Data loading method and device, computer equipment and storage medium |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8319521B1 (en) * | 2011-03-30 | 2012-11-27 | Lattice Semiconductor Corporation | Safe programming of key information into non-volatile memory for a programmable logic device |
| CN209248517U (en) * | 2019-02-19 | 2019-08-13 | 上海矽久微电子有限公司 | A kind of storage control device and digit chip |
| CN112416824A (en) * | 2020-12-03 | 2021-02-26 | 上海集成电路研发中心有限公司 | Efuse read-write controller, chip, electronic equipment and control method |
| CN114217744A (en) * | 2021-12-14 | 2022-03-22 | 山东产研鲲云人工智能研究院有限公司 | EFUSE storage content distribution method and device using shadow register |
-
2022
- 2022-05-17 CN CN202210540126.2A patent/CN114840145A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8319521B1 (en) * | 2011-03-30 | 2012-11-27 | Lattice Semiconductor Corporation | Safe programming of key information into non-volatile memory for a programmable logic device |
| CN209248517U (en) * | 2019-02-19 | 2019-08-13 | 上海矽久微电子有限公司 | A kind of storage control device and digit chip |
| CN112416824A (en) * | 2020-12-03 | 2021-02-26 | 上海集成电路研发中心有限公司 | Efuse read-write controller, chip, electronic equipment and control method |
| CN114217744A (en) * | 2021-12-14 | 2022-03-22 | 山东产研鲲云人工智能研究院有限公司 | EFUSE storage content distribution method and device using shadow register |
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Application publication date: 20220802 |