CN114765516A

CN114765516A - Method for confirming idle state reference signal and related product

Info

Publication number: CN114765516A
Application number: CN202110060477.9A
Authority: CN
Inventors: 周化雨; 雷珍珠; 潘振岗
Original assignee: Spreadtrum Communications Shanghai Co Ltd
Current assignee: Spreadtrum Communications Shanghai Co Ltd
Priority date: 2021-01-15
Filing date: 2021-01-15
Publication date: 2022-07-19

Abstract

The embodiment of the application provides a method for confirming idle state reference signals and a related product, wherein the method is applied to User Equipment (UE), and comprises the following steps: and confirming that the reference signal is valid before the paging indication PI according to the reference signal valid indication or a preset rule. The technical scheme provided by the application achieves the common optimization of UE energy conservation and system overhead.

Description

Method for confirming idle state reference signal and related product

Technical Field

The present application relates to the field of communications processing technologies, and in particular, to a method for determining an idle reference signal and a related product.

Background

When the UE is in Idle mode (RRC Idle), the UE needs to monitor a paging PDCCH (paging Physical Downlink Control Channel). Generally, the UE needs to determine a Paging PDCCH monitoring Occasion (Paging PDCCH monitoring Occasion) through PF (Paging Frame), PO (Paging Occasion) and Paging search space set configuration. In 5G NR, the UE performs AGC (automatic gain control) adjustment/time-frequency tracking (channel tracking)/measurement depending on a synchronization signal block. Since the synchronization signal block burst does not exist in every subframe or every slot, the synchronization signal block burst is transmitted in a certain time period, for example, 5ms, 10 ms, 20 ms, etc., so in general, the UE needs to wake up at least before the last two synchronization signal block bursts before PO (Paging Occasion) and use the two synchronization signal block bursts for AGC adjustment/time-frequency synchronization, or AGC adjustment/time-frequency synchronization/measurement. When the UE experiences a long sleep, for example, the interval between two POs that the UE needs to monitor is large due to PO configuration, the UE may need to wake up before the last three synchronization signal block bursts before PO and use the three synchronization signal block bursts to perform AGC adjustment/time-frequency synchronization, or AGC adjustment/time-frequency synchronization/measurement. This may cause the UE to wake up too long in advance, which is relatively power consuming.

In order to reduce the time for the UE to wake up in advance, the base station may configure an additional reference signal and notify the UE, and the UE may perform AGC adjustment/time-frequency synchronization or AGC adjustment/time-frequency synchronization/measurement by using only one synchronization signal block and an additional reference signal near the synchronization signal block, so as to shorten the wake-up time and achieve the purpose of energy saving. The additional Reference Signal may be a Tracking Reference Signal (TRS), a Channel State Information-Reference Signal (CSI-RS), or a Synchronization Signal (SS).

The existing UE cannot confirm whether the reference signal is valid.

Disclosure of Invention

The embodiment of the application discloses a method for confirming idle state reference signals and a related product, which can support UE to determine whether the reference signals are effective or not, and achieve the common optimization of UE energy conservation and system overhead.

In a first aspect, a method for acknowledging idle reference signals is provided, where the method is applied to a user equipment UE, and the method includes the following steps:

and confirming that the reference signal is valid before the paging indication PI according to the reference signal valid indication or a preset rule.

In a second aspect, an apparatus for idle state reference signal acknowledgement is provided, the apparatus being applied to a user equipment UE, and the apparatus including:

and the confirming unit is used for confirming that the reference signal before the paging indication PI is effective according to the reference signal effective indication or a preset rule.

In a third aspect, there is provided an electronic device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps of the method of the first aspect.

In a fourth aspect, a computer-readable storage medium is provided, storing a computer program for electronic data exchange, wherein the computer program causes a computer to perform the method of the first aspect.

In a fifth aspect, there is provided a computer program product, wherein the computer program product comprises a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps as described in the first aspect of an embodiment of the present application. The computer program product may be a software installation package.

In a sixth aspect, a chip system is provided, the chip system comprising at least one processor, a memory and an interface circuit, the memory, the transceiver and the at least one processor being interconnected by wires, the at least one memory having a computer program stored therein; the computer program, when executed by the processor, implements the method of the first aspect.

According to the technical scheme, the UE deduces that the pre-PI reference signal is effective according to the reference signal effective indication or the preset rule, so that the effectiveness of the reference signal is confirmed, the common optimization of UE energy saving and system overhead is achieved, and the UE performance and the network performance are improved.

Drawings

The drawings used in the embodiments of the present application are described below.

FIG. 1 is a system architecture diagram of an example communication system;

fig. 2 is a flowchart illustrating an idle reference signal confirmation method according to the present application;

fig. 3 is a flowchart illustrating a method for determining an idle reference signal according to an embodiment of the present application;

fig. 4 is a flowchart illustrating a method for determining an idle reference signal according to a second embodiment of the present application;

fig. 5 is a schematic structural diagram of an apparatus for determining an idle-state reference signal provided in the present application;

fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The embodiments of the present application will be described below with reference to the drawings.

The term "and/or" in this application is only one kind of association relationship describing the associated object, and means that there may be three kinds of relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein indicates that the former and latter associated objects are in an "or" relationship.

The "plurality" appearing in the embodiments of the present application means two or more. The descriptions of the first, second, etc. appearing in the embodiments of the present application are only for illustrating and differentiating the objects, and do not represent the order or the particular limitation of the number of the devices in the embodiments of the present application, and do not constitute any limitation to the embodiments of the present application. The term "connect" in the embodiments of the present application refers to various connection manners, such as direct connection or indirect connection, to implement communication between devices, which is not limited in this embodiment of the present application.

The technical solution of the embodiment of the present application may be applied to the example communication system 100 shown in fig. 1, where the example communication system 100 includes a terminal 110 and a network device 120, and the terminal 110 is communicatively connected to the network device 120.

A terminal in the embodiments of the present application may refer to various forms of UE, access terminal, subscriber unit, subscriber station, mobile station, MS (mobile station), remote station, remote terminal, mobile device, user terminal, terminal device (terminal), wireless communication device, user agent, or user equipment. The terminal device may also be a cellular phone, a cordless phone, an SIP (session initiation protocol, chinese) phone, a WLL (wireless local loop, chinese) station, a PDA (personal digital assistant, chinese), a handheld device with a wireless communication function, a computing device or other processing devices connected to a wireless modem, a vehicle-mounted device, a wearable device, a terminal device in a future 5G network or a terminal device in a PLMN (public land mobile network, chinese) evolved in the future, and the like, which are not limited in this embodiment of the present application.

Referring to fig. 2, fig. 2 provides a method for confirming an idle reference signal, where the method is applied to a UE (User Equipment), and the method includes the following steps:

step S201, the UE confirms that the reference signal before the Paging Indication (PI) is valid according to the reference signal valid Indication or a preset rule.

According to the technical scheme, the UE deduces that the reference signal before PI is effective according to the effective indication or the preset rule of the reference signal, so that the effectiveness of the reference signal is confirmed, the common optimization of UE energy saving and system overhead is achieved, and the UE performance and the network performance are improved.

The PI in the present application may also refer to a PI monitoring occasion (PI monitoring occasion) or a PI PDCCH. The paging occasion (paging monitoring occasion) may be a set of paging monitoring occasions (paging monitoring occasions) or paging PDCCHs (PDCCHs), and each paging monitoring occasion or paging PDCCH may be associated with one synchronization signal block. When a paging monitoring occasion or paging PDCCH is associated with a synchronization signal block, the paging monitoring occasion or paging PDCCH and the synchronization signal block are Quasi Co-sited (QCLed). The terminal can determine the paging monitoring time or the paging PDCCH needing monitoring through the association relationship. The PI may be a set of PI monitoring occasions (PI monitoring occasions) or PI PDCCHs, and one synchronization signal block may be associated with each PI monitoring occasion or PI PDCCH. When a paging monitoring occasion or paging PDCCH is associated with a synchronization signal block, the PI monitoring occasion or PI PDCCH and the synchronization signal block are Quasi Co-sited (QCLed). The terminal can determine the PI monitoring occasion or PI PDCCH needing monitoring through the association relationship. In the following, neither PI nor PI PDCCH is distinguished between PI and PI monitoring occasions.

In an optional scheme, if it is determined that the reference signal before PI is valid according to the reference signal valid indication, the method may specifically include:

determining whether a reference signal before a next PI or PI Physical Downlink Control Channel (PDCCH) is valid according to a reference signal valid indication, wherein the reference signal valid indication is carried by the PI PDCCH. At this time, the current reference signal effectively indicates that the reference signal before the next PI or PI PDCCH is effective, and the user equipment may obtain information whether the reference signal before the next PI or PI PDCCH is effective through the current PI. In this way, the user equipment can use the reference signal for AGC adjustment/time-frequency synchronization before the next PI.

The reference signal valid indication may also be the PI. For example, if the ue knows that the PI indicates wake-up, the ue confirms that the reference signal is valid, and conversely, the ue confirms that the reference signal is invalid.

Optionally, in an optional configuration, the reference signal effectively indicates that a starting position or a length of DCI corresponding to a paging indication PDCCH may be configured by a higher layer parameter; of course, in another optional configuration, the reference signal effectively indicates that the starting position and the length of the DCI (Downlink Control Information) corresponding to the paging indication PDCCH may also be configured by a higher layer parameter.

The reference signal valid indicator is n bits, and n is an integer greater than or equal to 1. N is preferably 1.

In another alternative, if the PI reference signal is determined to be valid according to the reference signal valid indication, the method may specifically include:

the UE determines that 1 synchronization signal burst (SS burst) nearest to the PI or n reference signals behind a synchronization signal block (SS block) are valid; and n is 1, 2 or 3.

A synchronization signal block is formed by the synchronization signal and the broadcast channel, so that the function of beam sweeping is introduced. Through a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS), a ue obtains time-frequency Synchronization of a cell and obtains a physical layer cell ID of the cell, which is generally referred to as cell search. The PSS, SSS and Physical Broadcast Channel (PBCH) constitute a synchronization signal block (SS/PBCH block, or SS block). Each synchronization signal block has a predetermined time domain position. This time domain position may also be referred to as a candidate synchronization signal block. The multiple candidate sync signal blocks constitute one SS-burst.

Each candidate sync signal block constitutes a sync signal burst.

The time domain position of a candidate synchronization signal block is fixed within a 5ms window.

The time domain position indexes of the candidate synchronization signal blocks are arranged in succession from 0 to

The transmission time instant of a synchronization signal block within this 5ms window is fixed and the index is also fixed. Generally, the base station transmits the synchronization signal block by using a beam sweeping (beam sweeping), that is, the base station transmits the synchronization signal block at different time domain positions through different beams, and accordingly, the user equipment can measure the different beams and sense where the different beams are locatedThe signal received on each beam is strongest.

SS burst in the present invention may refer to a burst within a time interval (e.g., within a 5ms window)

A candidate synchronization signal block, also referred to as comprising

The time interval (e.g., 5ms window) of a candidate synchronization signal block. The SS block in the present invention may refer to a synchronization signal block, and may also refer to a synchronization signal block associated with a PI monitoring occasion or a PI PDCCH.

When n is 1, only 1 extra reference signal is needed as assistance, and the base station or the network side can only send 1 SS burst or 1 reference signal after SS block closest to PI to determine the validity of the reference signal, thereby saving system resource overhead.

According to the technical scheme, when n is 2 or 3, the 2 or 3 reference signals are closer to the PI than the 1 SS burst or SS block, the user equipment processes the 2 or 3 reference signals but does not process the 1 SS burst or SS block, the wake-up time of the UE can be delayed, and the power consumption of the user equipment is saved.

In order to reduce the processing time of the reference signals, the UE determining that n reference signals after 1 synchronization signal burst SS burst or SS block closest to the PI are valid specifically includes:

the user equipment confirms that 1 reference signal closest to the SS burst or SS block is valid after 1 SS burst or SS block closest to the PI;

or the user equipment confirms that 1 reference signal closest to the PI is effective after 1 SS burst or SS block closest to the PI;

or the user equipment confirms that 2 reference signals closest to the SS burst or SS block are valid after 1 SS burst or SS block closest to the PI;

or the user equipment confirms that 2 reference signals closest to the PI are valid after 1 SS burst or SS block closest to the PI;

or the user equipment confirms that 3 reference signals closest to the SS burst or SS block are valid after 1 SS burst or SS block closest to the PI;

or the user equipment confirms that the 3 reference signals closest to the PI are valid after 1 SS burst or SS block closest to the PI.

If the scheme n is equal to 1, the 1 SS burst or the 1 reference signal after the SS block closest to the PI is the 1 SS burst or the 1 reference signal after the SS block closest to the PI, so that the user equipment can process the 1 reference signal as soon as possible after finishing processing the 1 SS burst or the SS block closest to the PI, and the processing efficiency of the reference signal is improved.

If the above scheme n is 1, 1 SS burst nearest to the PI or 1 reference signal after SS block is 1 SS burst nearest to the PI or 1 reference signal after SS block nearest to the PI, so that the user equipment can enter shallow sleep after processing the 1 SS burst nearest to the PI, and wake up before the PI to process the 1 reference signal (complete fine time-frequency synchronization) and receive the PI.

If the scheme n is 2 or 3, the 2 or 3 reference signals after the 1 SS burst or SS block closest to the PI are the 2 or 3 reference signals after the 1 SS burst or SS block closest to the PI, so that the user equipment can process the 2 or 3 reference signals as soon as possible after finishing processing the 1 SS burst or SS block closest to the PI, and the processing efficiency of the reference signals is improved.

If the above scheme n is 2 or 3, the 2 or 3 reference signals after the 1 SS burst or SS block closest to the PI are the 2 or 3 reference signals after the 1 SS burst or SS block closest to the PO, so that the user equipment can enter shallow sleep after processing the 1 SS burst or SS block closest to the PI, wake up before the PI to process the 2 or 3 reference signals (complete fine time-frequency synchronization) and receive the PI.

In order to provide sufficient time for time-frequency synchronization, in an optional scheme, the method specifically includes:

the user equipment confirms that the reference signal which is 1 SS burst or SS block closest to the PI and has a distance of more than or equal to T milliseconds, T time slots or T symbols from the PI is effective.

The distance from the PI is greater than or equal to T milliseconds or time slots or symbols, which can enable the ue to have a long enough time to process the reference signal before receiving the PI (a period of time is required for processing the reference signal to perform fine time-frequency synchronization), otherwise, the ue can only buffer the paging PDCCH and/or PDSCH in the PI before the reference signal is not processed. The above T may be configured by higher layer parameters. There may be two types of candidate values for T. The two types of candidate values respectively aim at UE with different capabilities, and the UE reports the capability of the UE capable of processing the candidate values.

In an optional scheme, the method specifically includes:

the user equipment confirms that n reference signals which are 1 SS burst or SS block closest to the PI and have a distance greater than or equal to T milliseconds, T time slots or T symbols from the PI are effective; and n is 1, 2 or 3.

In an optional scheme, after confirming that 1 SS burst or SS block closest to the PI is valid, 1 reference signal closest to the SS burst or SS block, which is more than or equal to T milliseconds or time slots or symbols away from the PI;

or after the user equipment confirms 1 SS burst or SS block closest to the PI, 1 reference signal closest to the PO with the distance greater than or equal to T milliseconds or time slots or symbols away from the PI is valid;

or after the user equipment confirms 1 SS burst or SS block closest to the PI, 2 reference signals which are more than or equal to T milliseconds or time slots or symbols away from the PI and are closest to the SS burst or SS block are effective;

or after the user equipment confirms 1 SS burst or SS block closest to the PI, 2 reference signals which are more than or equal to T milliseconds or time slots or symbols away from the PI and closest to the PI are effective;

or after the user equipment confirms 1 SS burst or SS block closest to the PI, 3 reference signals which are more than or equal to T milliseconds or time slots or symbols away from the PI and are closest to the SS burst or SS block are valid;

or the user equipment confirms that 3 reference signals which are nearest to the PI and have a distance of more than or equal to T milliseconds or time slots or symbols from the PI after 1 SS burst or SS block nearest to the PI are effective.

In an optional scenario, the method specifically includes:

the user equipment confirms that the reference signal after the 2 nd last SS burst or SS block closest to the PI is valid.

According to the scheme, only 1 extra reference signal is needed to be used as assistance, and the base station or the network side can only send 1 reference signal after the last 2 SS burst or SS block closest to the PI, so that the system resource overhead is saved.

In an optional scheme, the method specifically includes:

the user equipment confirms that the 1 reference signal after the nearest 2 nd SS burst or SS block to the PI is valid.

In the above optional solution, the 1 reference signal after the last 2 SS burst or SS block closest to the PI is the 1 reference signal after the last 2 SS burst or SS block closest to the PI and closest to the 2 SS burst or SS block, so that the user equipment can process the 1 reference signal as soon as possible after finishing processing the 2 SS bursts or SS block closest to the PI, thereby improving the processing efficiency of the reference signal.

In an optional scheme, the method specifically includes:

the user equipment confirms that 1 reference signal closest to SS burst or SS block is effective after the last 2 SS burst or SS block closest to the PI;

or the user equipment confirms that 1 reference signal closest to the PI is valid after the last 2 SS burst or SS block closest to the PI.

In the above optional scheme, the 1 reference signal after the last 2 SS burst or SS block closest to the PI is the 1 reference signal after the last 2 SS burst or SS block closest to the PI, so that the user equipment can enter shallow sleep after processing the 2 SS bursts or SS block closest to the PI, wake up before the PI to process the 1 reference signal (complete fine time-frequency synchronization) and receive the PI.

In the above optional scheme, the additional condition "the distance from the PI is greater than or equal to T milliseconds or time slots or symbols" may enable the ue to have a sufficiently long time to process the reference signal before receiving the PI (a period of time is required for processing the reference signal to perform fine time-frequency synchronization), otherwise, the ue may only buffer the paging PDCCH and/or PDSCH in the PI before the ue does not process the reference signal.

In an optional scenario, the method specifically includes:

the user equipment confirms that the reference signal which is more than or equal to T milliseconds, T time slots or T symbols away from the PI after the nearest 2 nd SS burst or SS block is effective.

In an optional scheme, the method specifically includes:

the user equipment confirms that 1 reference signal closest to SS burst or SS block is effective after the last 2 SS burst or SS block closest to the PI and the distance between the user equipment and the PI is more than or equal to T milliseconds or time slots or symbols;

or the user equipment confirms that 1 reference signal closest to the PO is effective after the last 2 SS burst or SS block closest to the PI and with the distance greater than or equal to T milliseconds, T time slots or T symbols from the PI.

In order to simplify the process of processing the reference signal by the UE, in an optional scheme, the method specifically includes:

the user equipment confirms that the reference signal in the last 2 synchronization occasions before PO is valid.

the user equipment confirms that the reference signals in 2 synchronization occasions before the PI and closest to the PI are effective.

In an alternative, the synchronization timing comprises: SS burst and reference signal;

or the synchronization occasion comprises: SS burst and reference signals with a distance greater than or equal to T milliseconds or T time slots or T symbols from the PO;

or the synchronization occasion comprises an SS burst and a reference signal which are more than or equal to T milliseconds or T time slots or T symbols away from the PO.

Example one

A technical scenario of the embodiment of the present application is that, before a Paging Occasion (PO), a Paging Indication (PI) is used to indicate whether a user equipment needs to monitor the PO. The PI is also called Paging Early Indication (PEI) or Wake Up Signal (WUS). In the embodiment of the present application, it is assumed that the UE needs to process 3 SS bursts (for AGC, time frequency synchronization, and the like) in total before PO, and in the embodiment of the present application, it is assumed that the UE needs to process 1 SS burst plus 1 reference signal before PO, and as shown in fig. 3, the method may specifically include:

step S301, the UE determines that 1 reference signal of 1 SS burst or SS block closest to the PI is valid.

Specifically, the valid reference signal may specifically include:

the 1 reference signal after the 1 SS burst or SS block closest to PI, closest to that SS burst or SS block, is valid.

Or the 1 reference signal closest to the PI is valid.

1 reference signal (which may be the 1 reference signal closest to the SS burst or the 1 reference signal closest to the PI) after the 1 SS burst or SS block closest to the PI and at a distance greater than or equal to T milliseconds or time slots or symbols from the PI is valid. The above T may be configured by higher layer parameters. There may be two types of candidate values for T. The two types of candidate values respectively aim at UE with different capabilities, and the UE reports the capability of the UE capable of processing the candidate values.

According to the technical scheme provided by the embodiment, 1 reference signal after 1 SS burst or SS block closest to the PI is 1 SS burst or 1 reference signal after the SS burst or SS block closest to the PI, so that the user equipment can process the 1 reference signal as soon as possible after finishing processing the 1 SS burst or SS block closest to the PI, and the processing efficiency of the reference signal is improved.

Example two

The second embodiment of the present application provides a method for confirming an idle reference signal, where the method is executed by a UE, and a technical scenario in the second embodiment of the present application is that a paging indicator is before a paging occasion, and a PI is used to indicate whether a user equipment needs to monitor a PO. The PI is also known as a paging advance indication or a wake-up signal. In the embodiment of the present application, it is assumed that the UE needs to process 2 reference signals (for example, TRS) in total before PO, at this time, the reference signal assists, and 2 reference signals may replace 2 SS bursts, so that it is equivalent to process 2 SS bursts, and the method may specifically include, as shown in fig. 4:

step S401, the UE determines that 2 reference signals of 1 SS burst closest to the PI are valid.

In particular, the method comprises the following steps of,

the user equipment confirms that 2 reference signals which are nearest to the SS burst and are behind 1 SS burst nearest to the PI are effective;

or the user equipment confirms that 2 reference signals which are nearest to the PI and are behind 1 SS burst nearest to the PI are effective;

the ue determines that 2 reference signals (which may be the 2 reference signals closest to the SS burst or the 2 reference signals closest to the PI) after 1 SS burst closest to the PI and located at a distance greater than or equal to T milliseconds or time slots or symbols from the PI are valid.

In the technical scheme of the second embodiment of the application, the 2 reference signals are closer to the PI than the 1 SS burst, and the user equipment processes the 2 reference signals but does not process the 1 SS burst, so that the wake-up time can be delayed, and the power consumption of the user equipment is saved.

EXAMPLE III

The third embodiment of the present application provides a method for confirming an idle reference signal, where the method is executed by a UE, and a technical scenario in the third embodiment of the present application is that a paging indication is before a paging occasion, and a PI is used to indicate whether a user equipment needs to monitor a PO. The PI is also called a paging advance indication or a wake-up signal. In the embodiment of the present invention, it is assumed that the UE needs to process 3 reference signals (e.g., TRS) in total before PO, and at this time, the reference signals are used for assistance, and 3 reference signals can replace 3 SS bursts, so that 3 SS bursts need to be processed equivalently, which is different from the second embodiment in that the UE determines that 3 reference signals of 1 SS burst closest to PO are valid.

Referring to fig. 5, fig. 5 provides an apparatus for confirming an idle-state reference signal, the apparatus being applied to a user equipment UE, and the apparatus comprising:

a confirming unit 501, configured to confirm that the reference signal before the paging indicator PI is valid according to the reference signal valid indicator or a preset rule.

The technical scheme provided by the application has the advantages that the UE deduces the PI front reference signal to be effective, so that the effectiveness of the reference signal is confirmed, the common optimization of UE energy saving and system overhead is achieved, and the UE performance and the network performance are improved.

The confirming unit 501 may further perform refinement schemes in the embodiments of fig. 2, fig. 3, and fig. 4, which are not described herein again.

It is understood that the above-mentioned means comprise corresponding hardware and/or software modules for performing the respective functions in order to realize the above-mentioned functions. The present application can be realized in hardware or a combination of hardware and computer software in connection with the exemplary algorithm steps described in connection with the embodiments disclosed herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, with the embodiment described in connection with the particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In this embodiment, the electronic device may be divided into functional modules according to the method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module may be implemented in the form of hardware. It should be noted that the division of the modules in this embodiment is schematic, and is only a logic function division, and there may be another division manner in actual implementation.

In the case of dividing each functional module according to each function, the acquiring unit, the communication unit, and the processing unit may be configured to support the user equipment to perform the steps shown in fig. 2, fig. 3, and fig. 4 and the refinement of the embodiments shown in fig. 2, fig. 3, and fig. 4.

It should be noted that all relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional module, and are not described herein again.

In case an integrated unit is employed, the user equipment may comprise a processing module and a storage module. The processing module may be configured to control and manage an action of the user equipment, and for example, may be configured to support the electronic device to perform the steps performed by the obtaining unit, the communication unit, and the processing unit. The memory module may be used to support the electronic device in executing stored program codes and data, etc.

The processing module may be a processor or a controller. Which may implement or execute the various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein. A processor may also be a combination of computing functions, e.g., a combination of one or more microprocessors, a Digital Signal Processing (DSP) and a microprocessor, or the like. The storage module may be a memory. The communication module may specifically be a radio frequency circuit, a bluetooth chip, a Wi-Fi chip, or other devices that interact with other electronic devices.

It should be understood that the interface connection relationship between the modules illustrated in the embodiments of the present application is only an exemplary illustration, and does not form a structural limitation on the user equipment. In other embodiments of the present application, the user equipment may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.

Referring to fig. 6, fig. 6 is an electronic device 60 provided in an embodiment of the present application, where the electronic device 60 includes a processor 601, a memory 602, and a communication interface 603, and the processor 601, the memory 602, and the communication interface 603 are connected to each other through a bus.

The memory 602 includes, but is not limited to, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or a portable read-only memory (CD-ROM), and the memory 602 is used for related computer programs and data. The communication interface 603 is used for receiving and transmitting data.

The processor 601 may be one or more Central Processing Units (CPUs), and in the case that the processor 601 is one CPU, the CPU may be a single-core CPU or a multi-core CPU.

Processor 601 may include one or more processing units, such as: the processing unit may include an Application Processor (AP), a modem processor, a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a controller, a video codec, a Digital Signal Processor (DSP), a baseband processor, and/or a neural-Network Processing Unit (NPU), etc. Wherein the different processing units may be separate components or may be integrated in one or more processors. In some embodiments, the user equipment may also include one or more processing units. The controller can generate an operation control signal according to the instruction operation code and the time sequence signal to finish the control of instruction fetching and instruction execution. In other embodiments, a memory may also be provided in the processing unit for storing instructions and data. Illustratively, the memory in the processing unit may be a cache memory. The memory may hold instructions or data that have just been used or recycled by the processing unit. If the processing unit needs to use the instruction or data again, it can be called directly from the memory. This avoids repeated accesses and reduces the latency of the processing unit, thereby improving the efficiency with which the user equipment processes data or executes instructions.

In some embodiments, processor 601 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose-output (GPIO) interface, a SIM card interface, and/or a USB interface. The USB interface is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface can be used for connecting a charger to charge the user equipment, and can also be used for transmitting data between the user equipment and the peripheral equipment. The USB interface can also be used for connecting an earphone and playing audio through the earphone.

If the electronic device 60 is a user device, such as a smart phone, the processor 601 in the electronic device 60 is configured to read the computer program code stored in the memory 602 and perform the following operations:

All relevant contents of each scene related to the method embodiment may be referred to the functional description of the corresponding functional module, and are not described herein again.

The embodiment of the present application further provides a chip system, where the chip system includes at least one processor, a memory and an interface circuit, where the memory, the transceiver and the at least one processor are interconnected by a line, and the at least one memory stores a computer program; when the computer program is executed by the processor, the method flows shown in fig. 2, fig. 3 and fig. 4 are realized.

Embodiments of the present application further provide a computer-readable storage medium, in which a computer program is stored, and when the computer program runs on a network device, the method flows shown in fig. 2, fig. 3, and fig. 4 are implemented.

Embodiments of the present application further provide a computer program product, where when the computer program product runs on a terminal, the method flows shown in fig. 2, fig. 3, and fig. 4 are implemented.

Embodiments of the present application further provide an electronic device, including a processor, a memory, a communication interface, and one or more programs, stored in the memory and configured to be executed by the processor, the programs including instructions for performing the steps in the methods of the embodiments shown in fig. 2, 3, and 4.

The embodiment of the present application further provides a network device, where the network device is configured to support a user equipment to execute instructions of steps in the methods in the embodiments shown in fig. 2, fig. 3, and fig. 4.

The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It will be appreciated that the electronic device, in order to carry out the functions described above, may comprise corresponding hardware structures and/or software templates for performing the respective functions. Those of skill in the art will readily appreciate that the present application is capable of hardware or a combination of hardware and computer software implementing the various illustrative elements and algorithm steps described in connection with the embodiments provided herein. Whether a function is performed in hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the embodiment of the present application, the electronic device may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.

It should be noted that for simplicity of description, the above-mentioned embodiments of the method are described as a series of acts, but those skilled in the art should understand that the present application is not limited by the described order of acts, as some steps may be performed in other orders or simultaneously according to the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are presently preferred and that no acts or templates referred to are necessarily required by the application.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed coupling or direct coupling or communication connection between each other may be through some interfaces, indirect coupling or communication connection between devices or units, and may be in an electrical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk, and various media capable of storing program codes.

Those skilled in the art will appreciate that all or part of the steps of the methods of the above embodiments may be implemented by a program, which is stored in a computer-readable memory, the memory including: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.

Claims

1. An acknowledgement method of idle state reference signals, characterized in that, the method is applied to a User Equipment (UE), and the method comprises the following steps:

2. The method of claim 1, wherein the reference signal valid indicator is a PI.

3. The method according to claim 1, characterized in that it comprises in particular:

and determining whether a reference signal before the next PI or before a Physical Downlink Control Channel (PDCCH) is valid according to the valid indication of the reference signal, wherein the valid indication of the reference signal is carried by the PDCCH.

4. The method of claim 3,

the reference signal effectively indicates that the starting position and/or the length of the corresponding DCI in the PIPDCCH are configured by the high-layer parameters.

5. The method according to claim 3 or 4,

the reference signal valid indicator is n bits, and n is an integer greater than or equal to 1.

6. The method according to claim 1, characterized in that it comprises in particular:

confirming that the pre-PI reference signal is valid.

7. The method according to claim 6, characterized in that it comprises in particular:

determining that 1 sync signal burst SS burst or n reference signals after a sync signal block SS block closest to the PI are valid; and n is 1, 2 or 3.

8. The method of claim 7, wherein the UE determining that n reference signals after 1 synchronization signal burst or SS block closest to the PI are valid comprises:

confirming that 1 reference signal closest to the SS burst or SS block is valid after 1 SS burst or SS block closest to the PI;

or confirming that 1 reference signal closest to the PI is valid after 1 SS burst or SS block closest to the PI;

or confirming that 2 reference signals closest to the SS burst or SS block are valid after 1 SS burst or SS block closest to the PI;

or confirming that 2 reference signals closest to the PI are valid after 1 SS burst or SS block closest to the PI;

or confirming that 3 reference signals closest to the SS burst or SS block are valid after 1 SS burst or SS block closest to the PI;

or confirming that the 3 reference signals closest to the PI are valid after 1 SS burst or SS block closest to the PI.

9. The method according to claim 6, characterized in that the method comprises in particular:

it is determined that a reference signal that is 1 SS burst or SS block closest to the PI and is a distance greater than or equal to T milliseconds, T slots, or T symbols from the PI is valid.

10. The method according to claim 9, characterized in that the method comprises in particular:

confirming that n reference signals which are 1 SS burst or SS block closest to the PI and have a distance of more than or equal to T milliseconds, T time slots or T symbols from the PI are effective; and n is 1, 2 or 3.

11. The method according to claim 10, characterized in that it comprises in particular:

confirming that 1 reference signal which is nearest to the SS burst or SS block and has a distance of more than or equal to T milliseconds or time slots or symbols from the PI after the nearest 1 SS burst or SS block from the PI is effective;

or confirming that 1 reference signal nearest to the PI and having a distance greater than or equal to T milliseconds or time slots or symbols from the PI after 1 SS burst or SS block nearest to the PI is valid;

or confirming that 2 reference signals which are 1 SS burst or SS block closest to the PI, have a distance of more than or equal to T milliseconds or time slots or symbols from the PI and are closest to the SS burst or SS block are effective;

or confirming that 2 reference signals nearest to the PI and having a distance greater than or equal to T milliseconds or time slots or symbols from the PI after 1 SS burst or SS block nearest to the PI are valid;

or confirming that 3 reference signals which are nearest to the SS burst or SS block and have a distance of more than or equal to T milliseconds or time slots or symbols away from the PI after 1 SS burst or SS block nearest to the PI are effective;

or confirming that 3 reference signals closest to the PI, which are more than or equal to T milliseconds or time slots or symbols away from the PI, after 1 SS burst or SS block closest to the PI, are valid.

12. The method according to claim 6, characterized in that the method comprises in particular:

the reference signal after the 2 nd last SS burst closest to the PI is confirmed to be valid.

13. The method according to claim 12, characterized in that the method comprises in particular:

the 1 reference signal after the 2 nd last SS burst closest to PI is confirmed to be valid.

14. The method according to claim 13, characterized in that the method comprises in particular:

confirming that 1 reference signal closest to the SS burst or SS block is valid after the 2 nd last SS burst or SS block closest to the PI;

or confirming that the 1 reference signal closest to the PI is valid after the 2 nd last SS burst or SS block closest to the PI.

15. The method according to claim 6, characterized in that the method comprises in particular:

it is confirmed that the reference signal is valid after the nearest 2 nd SS burst or SS block from the PI by a distance equal to or greater than T milliseconds, T slots, or T symbols from the PI.

16. The method according to claim 15, characterized in that the method comprises in particular:

confirming that 1 reference signal closest to the SS burst or SS block is valid after the last 2 SS burst or SS block closest to the PI and with a distance greater than or equal to T milliseconds or time slots or symbols from the PI;

or confirming that 1 reference signal closest to the PI is effective after the last 2 SS burst or SS block closest to the PI and with the distance more than or equal to T milliseconds, T time slots or T symbols from the PI.

17. The method according to claim 6, characterized in that the method comprises in particular:

the reference signal in the last 2 synchronization occasions before the paging occasion P0 is confirmed to be valid.

18. The method according to claim 6, characterized in that it comprises in particular:

before confirming the PI, the reference signals in the 2 closest synchronization occasions to the PI are valid.

19. The method of claim 17 or 18,

the synchronization opportunities include: SS burst and reference signal;

or the synchronization opportunities include: SS burst and reference signals with a distance from the PO greater than or equal to T milliseconds or T time slots or T symbols;

20. An apparatus for idle state reference signal acknowledgement, the apparatus being applied to a User Equipment (UE), the apparatus comprising:

21. An electronic device comprising a processor, memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs including instructions for performing the steps of any of claims 1-18.

22. A chip system, the chip system comprising at least one processor, a memory and an interface circuit, the memory, the transceiver and the at least one processor being interconnected by a line, the at least one memory having a computer program stored therein; the computer program, when executed by the processor, implements the method of any of claims 1-19.

23. A computer-readable storage medium, in which a computer program is stored which, when run on a user equipment, performs the method of any one of claims 1-19.

24. A network device, characterized in that the network device is configured to support a user equipment to execute the instructions of any of the steps of claims 1-19.