CN114665712A - A Variable Slope Ramp Voltage Generator - Google Patents

Abstract

The invention discloses a variable slope ramp voltage generator, the voltage generator comprises: a ramp generator, a first feedback loop and a second feedback loop; wherein, the ramp generator is used to generate an initial ramp voltage; The first feedback loop is used for performing a first adjustment on the slope of the initial ramp voltage to obtain a first ramp voltage; the second feedback loop is used for performing a second adjustment on the slope of the first ramp voltage , to obtain the second ramp voltage. Based on the variable slope ramp voltage generator provided by the present invention, a ramp voltage with a reduced slope can be generated, so as to obtain a wider load adjustment range in the constant voltage control scheme.

Description

A Variable Slope Ramp Voltage Generator

technical field

The invention belongs to the technical field of integrated circuits, and in particular relates to a variable-slope ramp voltage generator.

Background technique

During constant voltage control, especially when the system is lightly loaded, switching losses dominate. Therefore, the switching frequency of the system needs to be reduced at light loads.

Referring to FIG. 1 , in the prior art, an error signal is usually obtained through an error amplifier to directly control the switching frequency of the system to achieve constant voltage output. Specifically, the system intends to modulate the switching frequency by adjusting the time from zero to V _EA of the voltage.

However, the above-mentioned voltage adjustment process involves triangular wave voltage, wherein the rising slope of the triangular wave voltage is fixed, so the speed of rising to the maximum value of V EA, V _{EA ,max} is very fast, and wide frequency range adjustment cannot be realized. In addition, the slope is reduced. The time required for the ramp voltage to reach V _EA,max is relatively long, resulting in a correspondingly long switching period and a small output load range.

SUMMARY OF THE INVENTION

In order to solve the above problems existing in the prior art, the present invention provides a variable-slope ramp voltage generator. The technical problem to be solved by the present invention is realized by the following technical solutions:

A variable slope ramp voltage generator, the voltage generator comprising: a ramp generator, a first feedback loop and a second feedback loop; wherein the ramp generator is used to generate an initial ramp voltage; the first feedback The loop is configured to perform a first adjustment on the slope of the initial ramp voltage to obtain a first ramp voltage; the second feedback loop is configured to perform a second adjustment on the slope of the first ramp voltage to obtain a first ramp voltage. Two ramp voltages.

In an embodiment of the present invention, the ramp generator includes: a capacitor C _t , a switch and a first current source; wherein the capacitor C _t and the first current source are connected in series between the ground terminal and the voltage terminal; the capacitor C _t The switch is connected in parallel with the switch between the ground terminal and the voltage terminal; the switch is used to receive the pulse width modulation signal; wherein, when the received pulse width modulation signal is high, the switch is turned off; or, when the received pulse width modulation signal is low level, the switch is closed.

In an embodiment of the present invention, the first feedback loop includes: MOSFET transistors M ₁ , M ₂ , M ₃ , M ₄ , M ₉ , M ₁₂ , a second current source and a third current source; wherein, The sources of M ₁ , M ₂ , M ₃ , M ₄ and M ₉ are connected to the voltage terminals; the gate of M ₁ is connected to the gate of M ₂ ; the drain of M ₁ is connected to the drain of M ₁₂ ; the source of M ₁₂ One end of the second current source is connected _; the gate _of M12 is connected to one end of the capacitor _Ct ; the drains of _M2 , M3 and _M9 are connected to one end of the _third current source _; the gate of M3 is connected to the gate of M4 _The drain of M4 is connected to _one end of the capacitor _Ct ; the drain of M1 is connected to the gate _of M1 _; the drain of M3 is connected to the gate of M3 _; the gate of _M9 is connected to the gate of _M8 ; The other ends of the second current source and the third current source are connected to the ground.

Beneficial effects of the present invention:

Based on the variable slope ramp voltage generator provided by the present invention, a ramp voltage with a reduced slope can be generated, so as to obtain a wider load adjustment range in the constant voltage control scheme.

The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

Description of drawings

Figure 1 is a schematic diagram of a constant voltage control scheme based on PFM mode;

Fig. 2 is a kind of schematic diagram comparing the frequency range of triangular wave and harmonic;

3 is a schematic structural diagram of a digital exponential wave voltage generator;

4 is a schematic structural diagram of a variable-slope ramp voltage generator provided by an embodiment of the present invention;

5 is a schematic diagram of a circuit principle of a variable-slope ramp voltage generator provided by an embodiment of the present invention;

Fig. 6 is the relevant waveform schematic diagram of constant voltage control based on the variable slope ramp voltage generator of the present invention;

FIG. 7 is a schematic schematic diagram of a ramp voltage generator suitable for a primary-side feedback flyback controller according to an embodiment of the present invention.

Detailed ways

The present invention will be described in further detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

Referring to FIG. 1 , FIG. 1 shows a constant voltage control scheme based on a PFM (Pulse Frequency Modulation, pulse frequency modulation) mode. As we all know, in the AC-DC (AC-DC) switching power supply system, when the system is under heavy load, the conduction loss dominates, and when the system is lightly loaded, the switching loss dominates, and the switching loss is positively correlated with the system switching frequency. To improve the efficiency of the system over the full load range, we need to reduce the switching frequency of the system at light loads. The primary-side feedback flyback controller usually detects the output voltage cycle by cycle through the auxiliary winding, and the feedback signal obtained by sampling is V _FB .

As shown in FIG. 1 , the error amplifier can obtain the difference between the voltage V _SH obtained from the sample and hold circuit and the built-in reference voltage V _Ref during the demagnetization time to generate the error signal V _EA . The size of V _EA is related to the lightness of the load, and it directly controls the switching frequency of the system to achieve constant voltage output. When the gate driving signal V _DRV turns into a low level to turn off the power transistor, the output voltage V _tri of the triangular wave generator linearly increases from zero to V _EA . Therefore, a load detector consisting of an error amplifier, a triangular wave generator and a comparator converts the feedback voltage _VFB into an adaptive time signal INH, which is inversely proportional to the load current condition. It can be seen from the above analysis that the system intends to modulate the switching frequency by adjusting the time from zero to V _EA of the voltage.

In Fig. 1, the constant voltage principle based on triangular wave control is a typical scheme based on the PFM control mode. The control method has a simple structure and is easy to implement. However, since the rising slope of the triangular wave voltage is fixed, the speed of rising to the maximum value of V EA, V _{EA ,max} is very fast, and wide frequency range adjustment cannot be achieved. On the other hand, the time required for the ramp voltage with a reduced slope to reach V _EA,max is relatively longer, which means that the corresponding switching period becomes longer. Therefore, in order to maximize the switching period TSW in pursuit of a wider output load range, the slope of the ramp voltage needs to be as low as possible.

Figure 2 depicts a comparison of the frequency range of the triangular and ramp voltages. It can be seen from the figure that the rising slope of the triangular wave voltage is fixed, so it quickly rises to the maximum output voltage V _{EA ,MAX} of V EA , while the ramp voltage with a negative time constant decreases because of its rising slope. gradually decreases, so the time taken to reach V _EA,MAX becomes relatively longer, which means that the corresponding switching period becomes longer. Therefore, in order to maximize the switching period in pursuit of a wider output load range, the slope of the ramp voltage needs to be as low as possible.

Figure 3 shows the exponential wave generator implemented by two current mainstream digital methods. As shown in Figure 3, the exponential wave voltage of the digital exponential curve generator satisfies:

where T is the clock period and k represents the ratio of capacitors _C2 to _C1 . By changing T and k, the time constant can be adjusted to indirectly adjust the maximum switching period without adding large resistors and capacitors. However, since clk is the output of the divider, its period can only be a multiple of the oscillator output. Therefore, the time constant cannot be arbitrarily set as required. Therefore, there is an urgent need for a simple-implemented circuit to generate a ramp voltage with a reduced slope in pursuit of a wider output load range.

Example 1

Please refer to FIG. 4. FIG. 4 is a schematic structural diagram of a variable slope ramp voltage generator provided by an embodiment of the present invention. The voltage generator includes:

A ramp generator, a first feedback loop and a second feedback loop.

The ramp generator is used to generate an initial ramp voltage.

The first feedback loop is used to first adjust the slope of the initial ramp voltage to obtain a first ramp voltage.

The second feedback loop is used to perform a second adjustment on the slope of the first ramp voltage to obtain a second ramp voltage.

Referring to FIG. 5, FIG. 5 is a schematic schematic diagram of a circuit of a variable slope ramp voltage generator provided by an embodiment of the present invention.

Optionally, the ramp generator includes: a capacitor C _t , a switch and a first current source.

The capacitor C _t is connected in series with the first current source between the ground terminal and the voltage terminal.

The capacitor C _t is connected in parallel with the switch between the ground terminal and the voltage terminal.

The switch is used for receiving a pulse width modulation signal; wherein, when the received pulse width modulation signal is at a high level, the switch is turned off; or when the received pulse width modulation signal is at a low level, the switch is turned on.

Optionally, the first feedback loop includes: MOSFET transistors M ₁ , M ₂ , M ₃ , M ₄ , M ₉ , M ₁₂ , a second current source and a third current source.

The source stages of M ₁ , M ₂ , M ₃ , M ₄ , and M ₉ are connected to the voltage terminals.

_The gate of M1 is connected to the gate of _M2 .

_The drain of M1 is connected to the drain _of M12.

The source stage of M ₁₂ is connected to one end of the second current source.

_The gate of M12 is connected to one end of the capacitor _Ct .

The drains of M ₂ , M ₃ and M ₉ are connected to one end of the third current source.

_The gate of M3 is connected to the gate of M4 _.

_The drain of M4 is connected to one end of the capacitor _Ct .

_The drain of M1 is connected to the gate _of M1.

_The drain _of M3 is connected to the gate of M3.

_The gate of _M9 is connected to the gate of M8.

The other ends of the second current source and the third current source are connected to the ground.

Optionally, the second feedback loop includes: MOSFET transistors M ₅ , M ₆ , M ₇ , M ₈ , M ₁₀ , M ₁₁ , M ₁₃ , a fourth current source, and a resistor R ₁ .

The source stages of M ₅ , M ₆ , M ₇ , and M ₈ are connected to the voltage terminals.

_The gate of M5 is connected to the gate of _M6 .

_The drain of M5 connects the drain of _M13 and the gate of _M5 .

The drain of _M6 is connected to the source of _M10 .

_The gate of _M7 is connected to the gate of M8.

_The drain of M7 connects the source of _M10 and the gate of _M7 .

_The drain of _M8 is connected to the source of M11.

_The gate of _M10 is connected to the gate of M11.

_The drain of M10 is connected to the fourth current source and one end and the gate of _M10 .

The drain of _M11 is connected to one end of the capacitor _Ct .

The gate of M ₁₃ is connected to one end of the capacitor C _t ;

The source of _M13 is connected to _one end of resistor R1.

The other end of the fourth current source and the other end of the resistor R1 are connected to the ground.

Referring to FIG. 6 , FIG. 6 is a schematic diagram of relevant waveforms of constant voltage control performed by the variable slope ramp voltage generator of the present invention. Applying the variable slope ramp voltage generator of the present invention to the constant voltage control scheme of the PFM mode, it can be seen that the discontinuous conduction mode detection is completed at the first valley bottom (the signal V _valley is converted to a high level), and once the ramp voltage V _ramp increases to V _EA , the power tube is allowed to conduct. Therefore, the adaptation time increases as the output load gradually decreases, and thus the switching power loss decreases accordingly.

Referring to FIG. 7 , FIG. 7 is a schematic schematic diagram of a ramp voltage generator suitable for a primary-side feedback flyback controller provided by an embodiment of the present invention.

It should be noted that, the ramp voltage generator with reduced slope can be roughly divided into three cases. In the first case, the system operates under heavy load conditions, so the triangular wave voltage is sufficient to satisfy the condition; in the second case, if the system operates under light load conditions, the maximum off-time circuit is enabled to turn on the power tube; Then it doesn't matter what waveform it is.

In order to simplify the circuit and reduce power consumption, a small current is used to charge the capacitor. In the last case, a ramp voltage with a reduced slope should be used to extend the output load range.

The proposed ramp voltage generator with reduced slope is shown in Figure 5, which maximizes the switching period TSW to pursue a wider output load range.

When the PWM (Pulse Width Modulation, pulse width modulation) signal is at a high level, the ramp voltage V _ramp is set to zero. At the instant the PWM signal transitions low, V _ramp starts to increase from zero.

Optionally, the working states of the voltage generator include: a first stage, a second stage and a third stage.

As shown in FIG. 5, since the V _ramp is small in the first stage, the MOSFETs M ₁₂ and M ₁₃ are turned off, and therefore, the charging current in the first stage is constant.

Optionally, at the moment when the PWM signal in the first stage is converted to a low level, V _ramp starts to increase from zero, and the constant charging current in the first stage is expressed as:

k represents the ratio of capacitance.

The ramp increases linearly from zero. Optionally, when V _ramp rises and turns on M ₁₂ and M ₁₃ , currents I ₀ and I _R are obtained; I ₁ , I ₅ , I ₆ and I ₃ are expressed as:

I ₁ =K1·I ₀ (3)

I ₅ =I _{S2 -K3} ·IR

I ₆ =K4(I _S2 -K3·I _R )

I ₃ =K2·I ₂ =K2·(I _S2 -I ₁ -I ₆ )

From formula (3), it can be concluded that the charging current in the second stage is expressed as:

It can be clearly seen from formula (2) and formula (4) that I _total1 <I _total2 (K4*K3<<K1), and the slope of I _total2 decreases as I ₀ and I _R increase. As V _ramp rises, the current I ₀ rapidly reaches its maximum value I _S2 , so I ₂ =I ₃ =0. Finally, as _IR rises, I ₅ =I ₆ =0 at the instant _{I 4} =K3*IR =I _S2 . Therefore, the charging current in the third stage can be obtained to be constant.

Optionally, the third-stage charging current is expressed as:

I _total3 = K0 · I _S2 (5)

In conclusion, based on the variable slope ramp voltage generator provided by the present invention, a ramp voltage with a reduced slope can be generated, so as to obtain a wider load adjustment range in the constant voltage control scheme.

In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as "first" or "second" may expressly or implicitly include one or more of that feature. In the description of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined.

In the present invention, unless otherwise expressly specified and limited, the term "connection" should be understood in a broad sense, for example, it may be a fixed connection, a detachable connection, or an integral body; it may be a mechanical connection or an electrical connection. Connection; it can be a direct connection, or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be considered that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deductions or substitutions can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (7)

1. A variable-slope ramp voltage generator, wherein the voltage generator comprises: a ramp generator, a first feedback loop, and a second feedback loop; wherein, the ramp generator is used to generate an initial ramp voltage; the first feedback loop is used to first adjust the slope of the initial ramp voltage to obtain a first ramp voltage; The second feedback loop is used to perform a second adjustment on the slope of the first ramp voltage to obtain a second ramp voltage. 2. The voltage generator of claim 1, wherein the ramp generator comprises: a capacitor C _t , a switch and a first current source; wherein, The capacitor C _t is connected in series with the first current source between the ground terminal and the voltage terminal; The capacitor C _t and the switch are connected in parallel between the ground terminal and the voltage terminal; The switch is used for receiving a pulse width modulation signal; wherein, when the received pulse width modulation signal is at a high level, the switch is turned off; or when the received pulse width modulation signal is at a low level, the switch is turned on. 3. The voltage generator of claim 1, wherein the first feedback loop comprises: MOSFET transistors M ₁ , M ₂ , M ₃ , M ₄ , M ₉ , M ₁₂ , the second current source and the third current source; wherein, The source stages of M ₁ , M ₂ , M ₃ , M ₄ , and M ₉ are connected to the voltage terminals; _The gate of M1 is connected to the gate of _M2 ; _The drain of M1 is connected to the drain _of M12; The source stage of M ₁₂ is connected to one end of the second current source; The gate of M ₁₂ is connected to one end of the capacitor C _t ; The drains of M ₂ , M ₃ and M ₉ are connected to one end of the third current source; _The gate of M3 is connected to the gate of M4 _{; The} drain of M4 is connected to one end of the capacitor _Ct ; _The drain of M1 is connected to the gate of M1 _{; The} drain _of M3 is connected to the gate of M3; The gate of M ₉ is connected to the gate of M ₈ ; The other ends of the second current source and the third current source are connected to the ground. 4. The voltage generator of claim 1, wherein the second feedback loop comprises: MOSFET transistors M ₅ , M ₆ , M ₇ , M ₈ , M ₁₀ , M ₁₁ , M ₁₃ , a fourth current source and a resistor R ₁ ; wherein, The source stages of M ₅ , M ₆ , M ₇ , and M ₈ are connected to the voltage terminals; _The gate of M5 is connected to the gate of _M6 ; _The drain of _M5 is connected to the drain of _M13 and the gate of M5; The drain stage of _M6 is connected to the source stage of _M10 ; _The gate of _M7 is connected to the gate of M8; _The drain of M7 is connected to the source of _M10 and the gate of _M7 ; _The drain stage of _M8 is connected to the source stage of M11; _The gate of _M10 is connected to the gate of M11; _The drain of M10 is connected to the fourth current source and one end and the gate of _M10 ; The drain of _M11 is connected to one end of the capacitor _Ct ; The gate of M ₁₃ is connected to one end of the capacitor C _t ; The source stage of M ₁₃ is connected to one end of the resistor R ₁ ; The other end of the fourth current source and the other end _of the resistor R1 are connected to the ground. 5. The voltage generator according to claim 1, wherein the working state of the voltage generator comprises: a first stage, a second stage and a third stage; wherein, At the moment when the PWM signal in the first stage is converted to a low level, V _ramp starts to increase from zero, and the constant charging current in the first stage is expressed as:

k represents the ratio of capacitance. 6. The voltage generator according to claim 5, characterized in that, when V _ramp rises and conducts M ₁₂ and M ₁₃ , currents I ₀ and I _R are obtained; I ₁ , I ₅ , I ₆ and I ₃ Expressed as: I ₁ =K1·I ₀ ; I ₅ =I _{S2 -K3} ·IR I ₆ =K4(I _S2 -K3·I _R ) I ₃ =K2·I ₂ =K2·(I _S2 -I ₁ -I ₆ ) The charging current in the second stage is expressed as:

7. The voltage generator according to claim 6, wherein the charging current in the third stage is expressed as: I _total3 =K0·I _S2 .

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