CN114583929A - Overcurrent protection circuit and overcurrent protection method of DC power supply - Google Patents
Overcurrent protection circuit and overcurrent protection method of DC power supply Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
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Abstract
The invention discloses an overcurrent protection circuit and an overcurrent protection method of a DC power supply, wherein the circuit comprises: the upper power tube current limiting module is used for sampling current flowing through the upper power tube and generating a first feedback signal according to a sampling result; the lower power tube current limiting module is used for sampling current flowing through the lower power tube and generating a second feedback signal according to a sampling result, wherein the upper power tube is switched off and the lower power tube is switched on under the condition that the current flowing through the upper power tube meets a first preset condition; and under the condition that the current flowing through the lower power tube meets a second preset condition, the upper power tube is allowed to be switched on and the lower power tube is allowed to be switched off. The upper power tube current limiting module and the lower power tube current limiting module jointly perform overcurrent protection on the output current in the DC power supply, and the control of the output current is facilitated when the output is short-circuited or overloaded, so that the output current cannot be infinitely increased even under a small switching period of the DC power supply, and the application range is expanded.
Description
Technical Field
The invention relates to the technical field of overcurrent protection, in particular to an overcurrent protection circuit and an overcurrent protection method of a DC power supply.
Background
It is known that if the output voltage of the DC power supply is short-circuited or the output load is overloaded, the current flowing through the power transistor increases, and if the current is too large, the power transistor is burnt. Therefore, an overcurrent protection circuit is required to be provided in the DC power supply for overcurrent protection. There are many current overcurrent protection circuits for DC power supplies, and the principle is to convert a current signal into a voltage signal and compare the voltage signal to determine whether to perform a protection operation. The protection mode is mainly divided according to the difference of sampling points and protection actions, the difference of the sampling points can be divided into inductive current sampling, power tube current sampling, resistance current sampling and the like, the difference of the protection actions can be divided into overcurrent protection signal locking after overcurrent and overcurrent protection signal self-recovery after overcurrent, wherein the protection signal locking can eliminate the protection signal after restarting the circuit, the protection signal self-recovery does not need restarting the circuit, and when the current value is reduced to be below the protection point, the protection signal is automatically eliminated.
For the protection mode of power tube current sampling, a current common overcurrent protection circuit is shown in fig. 1, and the overcurrent protection function of a DC power supply of the overcurrent protection circuit is mainly to sample the current of a main power tube (upper power tube), so as to control the current flowing through the main power switch tube to be within the range of a limit value. As shown in fig. 1, it is a working principle diagram of the step-down DC power supply. The upper power transistor M1 and the lower power transistor M2 are a PMOS transistor and an NMOS transistor, respectively, and M1 is a main power transistor. L is inductance, D1 is parasitic body diode of lower power tube M2. Co is the output capacitance. CLK is a clock signal.
Referring to fig. 3, which is an ideal timing waveform diagram of the signals in the circuit shown in fig. 1, in an ideal state, when the clock signal CLK is at a high level, the upper power transistor M1 is turned on. The sampling circuit 2 has the function of sampling the current flowing through the upper power tube M1 and sending the signal generated by the sampling circuit 2 to the current limiting circuit 3. Referring to fig. 2, the pulse generating circuit 4 generates a high level signal shot with a pulse width t1 in time t1 after the upper power transistor M1 is turned on, and during time t1, the signal generated by the sampling circuit 2 is masked, i.e., the current signal of M1 is not sampled in time t 1.
The current limiting circuit 3 processes the signal from the sampling circuit 2, and when the current (corresponding to the output current IL) flowing through the upper power transistor M1 exceeds the set value I _ Limit, the feedback signal Limit output by the current limiting circuit 3 becomes high level and is sent to the driving control circuit 1, and the driving control circuit 1 will change the first control signal PON to low level and turn off the upper power transistor M1, thereby preventing the output current IL from further increasing.
Referring to fig. 4, a timing waveform diagram of an output current in a small switching period of a DC power supply is shown, in practical applications, since a large noise is generated when a power transistor is turned on, which affects sampling accuracy, an overcurrent protection function is generally shielded within a time t1 after the power transistor is turned on, so as to prevent a phenomenon that the power transistor is turned off by mistake due to the influence of the noise even when the current is small, that is, the minimum on time of the upper power transistor M1 is t 1. When the output voltage is short-circuited, the rising slope Kr of the output current IL is equal to VIN/L, and the rising value of the output current IL in the time t1 is: VIN t 1/L. The falling slope Kf of the output current IL is VD/L, where VIN is the input voltage and VD is the on-state voltage of the diode D1. Assuming that the switching period of the DC power supply is T, the time during which the output current IL drops is T-T1, and therefore the value of the drop of the output current IL is: VD (T-T1)/L. When T < VIN T1/D + T1, VIN T1/L > VD (T-T1)/L, namely the output current IL is increased in time T1 more than decreased in time T-T1. As shown in fig. 4, the overcurrent protection function of the DC power supply is thus disabled. The output current IL of the DC power supply will increase indefinitely, eventually causing the chip to be damaged.
Therefore, in the existing solutions, the switching period of the DC power supply cannot be too small, limiting the range of applications.
Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.
Disclosure of Invention
In order to solve the technical problems, the invention provides an overcurrent protection circuit and an overcurrent protection method of a DC power supply, which commonly perform overcurrent protection on output current in the DC power supply through an upper power tube current limiting module and a lower power tube current limiting module, are beneficial to realizing the controllability of the output current when the output is short-circuited or overloaded, ensure that the output current cannot be infinitely increased even under the condition of a small switching period of the DC power supply, and expand the application range.
In one aspect, the present invention provides an overcurrent protection circuit of a DC power supply, including: the power supply circuit comprises an upper power tube and a lower power tube which are sequentially connected in series between an input voltage input end and a reference ground, wherein the upper power tube is a PMOS transistor, and the lower power tube is an NMOS transistor;
the inductor and the output capacitor are sequentially connected between the drain electrode of the upper power tube and the reference ground in series; and
the driving control circuit is used for generating a first control signal and a second control signal which are used for respectively controlling the on-off of the upper power tube and the lower power tube according to a clock signal;
the overcurrent protection circuit includes:
the upper power tube current limiting module is connected with the upper power tube and used for sampling the current flowing through the upper power tube and generating a first feedback signal to the drive control circuit according to the sampling result;
a lower power tube current limiting module connected with the lower power tube and used for sampling the current flowing through the lower power tube and generating a second feedback signal to the drive control circuit according to the sampling result,
under the condition that the current flowing through the upper power tube meets a first preset condition, the driving control circuit controls the upper power tube to be switched off and controls the lower power tube to be switched on based on the first feedback signal;
and under the condition that the current flowing through the lower power tube meets a second preset condition, the driving control circuit controls the upper power tube to be switched on and controls the lower power tube to be switched off based on the second feedback signal and the clock signal.
Optionally, when the current flowing through the upper power transistor flows in from the source of the upper power transistor and flows out from the drain of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is greater than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is less than a second threshold,
wherein the first threshold and the second threshold are both positive values, and the absolute value of the first threshold is greater than the absolute value of the second threshold.
Optionally, when the current flowing through the upper power transistor flows in from the drain of the upper power transistor and flows out from the source of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is less than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is greater than a second threshold,
wherein the first threshold and the second threshold are both negative values, and an absolute value of the first threshold is greater than an absolute value of the second threshold.
Optionally, the upper power tube current limiting module includes:
the first sampling unit is connected with the upper power tube and is used for sampling the current flowing through the upper power tube;
and the first current limiting unit is connected with the first sampling unit and used for processing the sampling result of the first sampling unit based on the first threshold value and generating the first feedback signal according to the processing result.
Optionally, the upper power tube current limiting module further includes:
and the first pulse generating unit is used for receiving the first control signal and generating a shielding signal with a first pulse width when the first control signal is effective, wherein the shielding signal is used for controlling the first sampling unit and/or the first current limiting unit not to work.
Optionally, the first pulse width is smaller than an effective duration of the first control signal in one signal period.
Optionally, the lower power tube current limiting module includes:
the second sampling unit is connected with the lower power tube and is used for sampling the current flowing through the lower power tube;
and the second current limiting unit is connected with the second sampling unit and used for processing the sampling result of the second sampling unit based on the second threshold value and generating the second feedback signal according to the processing result.
Optionally, the lower power tube current limiting module further includes:
and the second pulse generating unit is used for receiving the second control signal and generating a shielding signal with a second pulse width when the second control signal is effective, wherein the shielding signal is used for controlling the second sampling unit and/or the second current limiting unit to be out of operation.
Optionally, the second pulse width is smaller than an effective duration of the second control signal in one signal period.
On the other hand, according to an over-current protection method of a DC power supply provided by the present invention, the DC power supply includes: an upper power tube and a lower power tube which are sequentially connected in series between an input voltage input end and a reference ground, wherein the upper power tube is a PMOS transistor, the lower power tube is an NMOS transistor,
the overcurrent protection method comprises the following steps:
monitoring the current flowing through the upper power tube, and controlling the upper power tube to be switched off and the lower power tube to be switched on under the condition that the current flowing through the upper power tube meets a first preset condition;
and monitoring the current flowing through the lower power tube, and controlling the upper power tube to be switched on and the lower power tube to be switched off under the condition that the current flowing through the lower power tube meets a second preset condition.
Optionally, when the current flowing through the upper power transistor flows in from the source of the upper power transistor and flows out from the drain of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is greater than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is less than a second threshold,
wherein the first threshold and the second threshold are both positive values, and the absolute value of the first threshold is greater than the absolute value of the second threshold.
Optionally, when the current flowing through the upper power transistor flows in from the drain of the upper power transistor and flows out from the source of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is less than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is greater than a second threshold,
wherein the first threshold and the second threshold are both negative values, and an absolute value of the first threshold is greater than an absolute value of the second threshold.
The invention has the beneficial effects that: the invention discloses an overcurrent protection circuit and an overcurrent protection method of a DC power supply, which not only sample and monitor the current flowing through an upper power tube by an upper power tube current-limiting module connected with the upper power tube to control the turn-off of the upper power tube and the turn-on of a lower power tube when the current meets a first preset condition so as to realize the control of a first end value (one of a maximum value and a minimum value) of the output current in the DC power supply, but also sample and monitor the current flowing through the lower power tube by a lower power tube current-limiting module connected with the lower power tube so as to allow the turn-on of the upper power tube and the turn-off of the lower power tube when the current meets a second preset condition so as to realize the control of a second end value (the other one of the maximum value and the minimum value) of the output current in the DC power supply, thus, the controllability of the output current can be realized when the output is short-circuited or overloaded, and the condition that only the upper power tube current-limiting module exists in the existing overcurrent protection circuit is effectively avoided, the output current in the DC power supply can be increased without limit under the condition of a small switching period of the DC power supply, and the application range is expanded.
On the other hand, for the DC power supplies in different current directions, the corresponding overcurrent protection function can be realized only by changing the preset condition required by judgment, so that the limitation of an application scene is avoided, and the applicability of the circuit is improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic circuit diagram showing an overcurrent protection circuit of a DC power supply;
FIG. 2 shows timing waveforms of part of signals in a DC power supply circuit;
FIG. 3 is an idealized timing waveform diagram of the signals present in the over-current protection circuit of a DC power supply;
FIG. 4 is a timing waveform diagram showing the output current of the over-current protection circuit of the DC power supply in the presence of a small switching period of the DC power supply;
fig. 5 shows a schematic circuit diagram of an overcurrent protection circuit of a DC power supply provided according to an embodiment of the present disclosure;
FIG. 6 illustrates timing waveforms of signals in an over-current protection circuit of a DC power supply provided in accordance with an embodiment of the present disclosure;
fig. 7 is a flow chart of an overcurrent protection method of a DC power supply provided according to an embodiment of the present disclosure.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
The present invention will be described in detail below with reference to the accompanying drawings.
Fig. 5 is a schematic diagram illustrating a circuit structure of an overcurrent protection circuit of a DC power supply provided in an embodiment of the present disclosure, and fig. 6 is a timing waveform diagram illustrating signals in the overcurrent protection circuit of the DC power supply provided in the embodiment of the present disclosure.
In the present disclosure, as shown in fig. 5, a step-down DC power supply is taken as an example, and the DC power supply includes: an upper power tube M1, a lower power tube M2 (a parasitic body diode D1 exists between the drain terminal and the source terminal of the lower power tube M2), an inductor L, an output capacitor Co, and a drive control circuit 1. The upper power transistor M1 and the lower power transistor M2 are sequentially connected in series between the input end of the input voltage VIN and the reference ground, the upper power transistor M1 is a PMOS transistor, and the lower power transistor M2 is an NMOS transistor. The inductor L and the output capacitor Co are sequentially connected in series between the drain of the upper power transistor M1 (i.e., the connection node of the upper power transistor M1 and the lower power transistor M2) and the ground reference. The driving control circuit 1 is respectively connected with the gate of the upper power tube M1 and the gate of the lower power tube M2, and is configured to generate a first control signal Pon and a second control signal Non for respectively controlling the on/off of the upper power tube M1 and the lower power tube M2 according to a clock signal CLK.
Since the channel types of the upper power transistor M1 and the lower power transistor M2 are opposite in the DC power supply, alternatively, the driving control circuit 1 may generate the first control signal Pon and the second control signal Non having the same level state and respectively provide the first control signal Pon and the second control signal Non to the gate of the upper power transistor M1 and the gate of the lower power transistor M2; alternatively, the driving control circuit 1 may generate the first control signal Pon and the second control signal Non having opposite level states, and provide one path directly to one of the upper power transistor M1 and the gate of the lower power transistor M2, and provide the other path to the other of the upper power transistor M1 and the gate of the lower power transistor M2 after passing through the inverter U1.
Further, the overcurrent protection circuit of the DC power supply includes: an upper power tube current limiting module 10 and a lower power tube current limiting module 20. The upper power tube current limiting module 10 is connected to the upper power tube M1, and is configured to sample a current flowing through the upper power tube M1, and generate a first feedback signal Limit1 to the driving control circuit 1 according to a sampling result. The lower power tube current limiting module 20 is connected to the lower power tube M2, and is configured to sample a current flowing through the lower power tube M2, and generate a second feedback signal Limit2 to the driving control circuit 1 according to a sampling result.
In the disclosure, in the case that the current flowing through the upper power transistor M1 satisfies the first preset condition, the driving control circuit 1 controls the upper power transistor M1 to turn off and controls the lower power transistor M2 to turn on based on the first feedback signal Limit 1; and in the case that the current flowing through the lower power tube M2 satisfies the second preset condition, the driving control circuit 1 controls the upper power tube M1 to be turned on and controls the lower power tube M2 to be turned off based on the second feedback signal Limit2 and the clock signal CLK.
It is understood that in the present disclosure, the current flowing through the upper power tube M1 and the current flowing through the lower power tube M2 are both the same as the inductor current.
In the first embodiment of the present disclosure, the current flowing through the upper power transistor M1 is a forward current (i.e. the direction of the current is flowing into the source of the upper power transistor M1 and flowing out of the drain of the upper power transistor M1), and correspondingly, the first predetermined condition at this time is: the current flowing through the upper power tube M1 is greater than the first threshold, and the second preset condition is: the current flowing through the lower power tube M2 is less than the second threshold. In this embodiment, both the first threshold and the second threshold are positive values, and the absolute value of the first threshold is greater than the absolute value of the second threshold.
Further, the upper power tube current limiting module 10 includes: a first sampling unit 11, a first current limiting unit 12 and a first pulse generating unit 13. The first sampling unit 11 is connected to the upper power transistor M1, and is configured to sample a current flowing through the upper power transistor M1. The first current limiting unit 12 is connected to the first sampling unit 11, and configured to process a sampling result of the first sampling unit 11 based on a first threshold, and generate a first feedback signal Limit1 according to the processing result. The first pulse generating unit 13 is configured to receive the first control signal Pon, and generate a mask signal shot1 with a first pulse width when the first control signal Pon is active (that is, when the first control signal Pon can control the upper power transistor M1 to be turned on), where the mask signal shot1 is configured to control the first sampling unit 11 and/or the first current limiting unit 12 to be inactive. The first pulse generating unit 13 is disposed in the upper power transistor current-limiting module 10, so that the overcurrent protection function of the upper power transistor current-limiting module 10 can be shielded within a period of time after the upper power transistor M1 is turned on, the influence of large noise on sampling accuracy when the upper power transistor M1 is turned on is avoided, and the situation that the upper power transistor M1 is turned off by mistake due to the influence of noise when the current is very small is avoided.
The lower power tube current limiting module 20 includes: a second sampling unit 21, a second current limiting unit 22 and a second pulse generating unit 23. The second sampling unit 21 is connected to the lower power tube M2, and is configured to sample a current flowing through the lower power tube M2. The second current limiting unit 22 is connected to the second sampling unit 21, and configured to process a sampling result of the second sampling unit 21 based on a second threshold, and generate a second feedback signal Limit2 according to the processing result. The second pulse generating unit 23 is configured to receive the second control signal Non, and generate a shot2 with a second pulse width when the second control signal Non is active (i.e., when the second control signal Non can control the lower power transistor M2 to be turned on), where the shot2 is configured to control the second sampling unit 21 and/or the second current limiting unit 22 to be inactive. The second pulse generating unit 23 is disposed in the lower power tube current limiting module 20, so that the overcurrent protection function of the lower power tube current limiting module 20 can be shielded within a period of time after the lower power tube M2 is turned on, the influence of large noise on the sampling accuracy when the lower power tube M2 is turned on is avoided, and the situation that the power tube M2 is turned off by mistake due to the influence of noise when the current is small is avoided.
It is understood that the first pulse width is smaller than the effective duration of the first control signal Pon in one signal period, and the second pulse width is smaller than the effective duration of the second control signal Non in one signal period. And the normal operation of the DC power supply is ensured. Optionally, the first pulse width and the second pulse width may be the same or different, and may be set according to an actual application scenario.
Referring to fig. 6, when the clock signal CLK is at a high level, the first control signal Pon outputted by the driving control circuit 1 is at a high level, and controls the upper power transistor M1 to be turned on after passing through the inverter U1, and the second control signal Non is at a low level, and controls the lower power transistor M2 to be turned off. At this time, the first pulse generating unit 13 controls the first sampling unit 11 and/or the first current limiting unit 12 in the upper power transistor current limiting module 10 to be inactive for a time corresponding to the first pulse width based on the mask signal shot1 generated by the high-level first control signal Pon, the upper power transistor current limiting module 10 continuously outputs the low-level first feedback signal Limit1 during the time, and the upper power transistor M1 is continuously turned on. After the time corresponding to the first pulse width, if a condition such as an output short circuit or an output load overload occurs in the DC power circuit, the first sampling unit 11 samples that the current flowing through the upper power transistor M1 is greater than the first threshold P-Limit, and then the first current limiting unit 12 outputs a first feedback signal Limit1 with a high level to the driving control circuit 1. The trigger driving control circuit 1 changes the level states of the output first control signal Pon and the output second control signal Non, and further controls the upper power tube M1 to be turned off, and controls the lower power tube M2 to be turned on, and discharge is performed through the lower power tube M2.
Then, the second pulse generating unit 23 controls the second sampling unit 21 and/or the second current limiting unit 22 in the lower power tube current limiting module 20 to be inactive in a time corresponding to the second pulse width based on the mask signal shot2 generated by the second control signal Non at the high level, the lower power tube current limiting module 20 continuously outputs the second feedback signal Limit2 at the low level in the time, and the lower power tube M2 is continuously turned on for discharging. After the time corresponding to the second pulse width, if the second sampling unit 21 samples that the current flowing through the lower power tube M2 is greater than the second threshold N-Limit, the second current limiting unit 22 outputs the second feedback signal Limit2 with a low level to the driving control circuit 1, at this time, even if the clock signal CLK is at a high level, the driving control circuit 1 is forced to be triggered to output the first control signal Pon with the low level, the upper power tube M1 is controlled to be in an off state, and the lower power tube M2 is continuously turned on to continuously discharge, until the second sampling unit 21 samples that the current flowing through the lower power tube M2 is less than the second threshold N-Limit, the second current limiting unit 22 is triggered to output the second feedback signal Limit2 with the high level to the driving control circuit 1. At this time, the driving control circuit 1 may change the level states of the first control signal Pon and the second control signal Non output when the clock signal CLK is at a high level, so as to control the upper power transistor M1 to be turned on and control the lower power transistor M2 to be turned off.
As can be understood from the above description, the starting point of the output current IL in each switching cycle of the DC power supply is not higher than the second threshold N _ Limit. Therefore, by reasonably setting the value of the second threshold N _ Limit, N _ Limit + VIN × t1/L < P _ Limit, the maximum value of the output current IL can be determined by the first threshold P _ Limit (the output current IL is not greater than the first threshold P _ Limit), and the forward output current can be controlled during short circuit or overload. Therefore, the problem that when only the upper power tube current limiting module is arranged in the existing overcurrent protection circuit, the output current in the DC power supply can be increased without limit in a small switching period of the DC power supply is effectively solved, and the application range is expanded.
In the second embodiment of the present disclosure, the current flowing through the upper power transistor M1 is a negative current (i.e., the current flows in the direction from the drain of the upper power transistor M1 and flows out from the source of the upper power transistor M1). Correspondingly, the first preset condition at this time is: the current flowing through the upper power tube M1 is smaller than the first threshold, and the second preset condition is: the current flowing through the lower power tube M2 is greater than the second threshold.
In this embodiment, the first threshold value P-Limit and the second threshold value N-Limit are both negative values (relative to the first embodiment described above), and the absolute value of the first threshold value is greater than the absolute value of the second threshold value. Accordingly, if the current flowing through the upper power tube M1 is smaller than the first threshold P-Limit, it is: the absolute value of the current flowing through the upper power tube M1 is greater than the absolute value of the first threshold value P-Limit; and if the current flowing through the lower power tube M2 is larger than the second threshold value N-Limit, the following result is obtained: the absolute value of the current flowing through the lower power tube M2 is smaller than the absolute value of the second threshold N-Limit.
Based on a principle similar to that of the foregoing embodiment, in this embodiment, the output current IL is not less than the first threshold value P _ Limit only by reasonably setting the value of the second threshold value N _ Limit, so that the control of the negative output current is realized when the output is short-circuited or overloaded.
According to the method and the device, overcurrent protection corresponding to different inductive current directions can be realized only by changing preset conditions required by judgment, so that the limitation of application scenes is avoided, and the applicability of the circuit is improved.
Fig. 7 is a flow chart of an overcurrent protection method of a DC power supply provided according to an embodiment of the present disclosure.
As shown in fig. 7, in the present embodiment, the overcurrent protection method of the DC power supply, which is applicable to the overcurrent protection circuit of the DC power supply shown in fig. 5 and 6, includes performing steps S1 and S2.
Specifically, referring to fig. 5 and 6, in step S1, the current flowing through the upper power tube is monitored, and in the case where the current flowing through the upper power tube satisfies a first preset condition, the upper power tube is controlled to be turned off and the lower power tube is controlled to be turned on.
In the first embodiment of the present disclosure, the current flowing through the upper power transistor M1 is a forward current (i.e. the direction of the current is flowing into the source of the upper power transistor M1 and flowing out of the drain of the upper power transistor M1), and the first predetermined condition is: the current flowing through the upper power tube M1 is greater than the first threshold, and the second preset condition is: the current flowing through the lower power tube M2 is less than the second threshold. In this embodiment, both the first threshold and the second threshold are positive values, and the absolute value of the first threshold is greater than the absolute value of the second threshold.
Taking this embodiment as an example, when the clock signal CLK is at a high level, the first control signal Pon output by the driving control circuit 1 is at a high level, and controls the upper power transistor M1 to be turned on after passing through the inverter U1, and the second control signal Non is at a low level, and controls the lower power transistor M2 to be turned off. At this time, the first pulse generating unit 13 controls the first sampling unit 11 and/or the first current limiting unit 12 in the upper power transistor current limiting module 10 to be inactive for a time corresponding to the first pulse width based on the mask signal shot1 generated by the high-level first control signal Pon, the upper power transistor current limiting module 10 continuously outputs the low-level first feedback signal Limit1 during the time, and the upper power transistor M1 is continuously turned on. After the time corresponding to the first pulse width, if a condition such as an output short circuit or an output load overload occurs in the DC power circuit, the first sampling unit 11 samples that the current flowing through the upper power transistor M1 is greater than the first threshold P-Limit, and then the first current limiting unit 12 outputs a first feedback signal Limit1 with a high level to the driving control circuit 1. The trigger driving control circuit 1 changes the level states of the output first control signal Pon and the output second control signal Non, and further controls the upper power tube M1 to be turned off and the lower power tube M2 to be turned on.
In step S2, the current flowing through the lower power tube is monitored, and in the case that the current flowing through the lower power tube satisfies a second preset condition, the upper power tube is controlled to be turned on and the lower power tube is controlled to be turned off.
After the lower power tube M2 is controlled to be turned on, the second pulse generating unit 23 controls the second sampling unit 21 and/or the second current limiting unit 22 in the lower power tube current limiting module 20 to not operate within a time corresponding to the second pulse width based on the mask signal shot2 generated by the high-level second control signal Non, the lower power tube current limiting module 20 continuously outputs the low-level second feedback signal Limit2 during the time, and the lower power tube M2 is continuously turned on for discharging. After the time corresponding to the second pulse width, if the second sampling unit 21 samples that the current flowing through the lower power tube M2 is greater than the second threshold N-Limit, the second current limiting unit 22 outputs the second feedback signal Limit2 with a low level to the driving control circuit 1, at this time, even if the clock signal CLK is at a high level, the driving control circuit 1 is forced to be triggered to output the first control signal Pon with the low level, the upper power tube M1 is controlled to be in an off state, and the lower power tube M2 is continuously turned on to continuously discharge, until the second sampling unit 21 samples that the current flowing through the lower power tube M2 is less than the second threshold N-Limit, the second current limiting unit 22 is triggered to output the second feedback signal Limit2 with the high level to the driving control circuit 1. At this time, the driving control circuit 1 may change the level states of the first control signal Pon and the second control signal Non output when the clock signal CLK is at a high level, so as to control the upper power transistor M1 to be turned on and control the lower power transistor M2 to be turned off.
As can be seen from the above, the starting point of the output current IL in each switching cycle of the DC power supply is not higher than the second threshold N _ Limit. Therefore, by reasonably setting the value of the second threshold N _ Limit, N _ Limit + VIN × t1/L < P _ Limit, the maximum value of the output current IL can be determined by the first threshold P _ Limit (the output current IL is not greater than the first threshold P _ Limit), and the forward output current can be controlled during short circuit or overload. Therefore, the problem that when only the upper power tube current limiting module is arranged in the existing overcurrent protection circuit, the output current in the DC power supply can be increased without limit in a small switching period of the DC power supply is effectively solved, and the application range is expanded.
In the second embodiment of the present disclosure, the current flowing through the upper power transistor M1 is a negative current (i.e., the current flows in the direction from the drain of the upper power transistor M1 and flows out from the source of the upper power transistor M1). At this time, the first preset condition is: the current flowing through the upper power tube M1 is smaller than the first threshold, and the second preset condition is: the current flowing through the lower power tube M2 is greater than the second threshold. Wherein the first threshold value P-Limit and the second threshold value N-Limit are both negative values (relative to the first embodiment described above), and the absolute value of the first threshold value is greater than the absolute value of the second threshold value. Accordingly, if the current flowing through the upper power tube M1 is smaller than the first threshold P-Limit, it is: the absolute value of the current flowing through the upper power tube M1 is greater than the absolute value of the first threshold value P-Limit; and if the current flowing through the lower power tube M2 is larger than the second threshold value N-Limit, the following result is obtained: the absolute value of the current flowing through the lower power tube M2 is smaller than the absolute value of the second threshold N-Limit.
Based on a principle similar to that of the foregoing embodiment, in this embodiment, the output current IL is not less than the first threshold value P _ Limit only by reasonably setting the value of the second threshold value N _ Limit, so that the control of the negative output current is realized when the output is short-circuited or overloaded. Therefore, overcurrent protection corresponding to different inductive current directions can be realized only by changing preset conditions required by judgment, so that the limitation of application scenes is avoided, and the applicability of the circuit is improved.
In summary, the over-current protection circuit and the over-current protection method for a DC power supply disclosed by the present invention not only sample and monitor the current flowing through the upper power tube current-limiting module connected to the upper power tube to control the upper power tube to turn off and the lower power tube to turn on when the current satisfies the first preset condition, so as to control the first end value (one of the maximum value and the minimum value) of the output current in the DC power supply, but also sample and monitor the current flowing through the lower power tube current-limiting module connected to the lower power tube, so as to allow the upper power tube to turn on and the lower power tube to turn off when the current satisfies the second preset condition, so as to control the second end value (the other one of the maximum value and the minimum value) of the output current in the DC power supply, thereby realizing the controllability of the output current when outputting a short circuit or an overload, and effectively avoiding the situation that only the upper power tube current-limiting module exists in the existing over-current protection circuit, the output current in the DC power supply can be increased without limit under the condition of a small switching period of the DC power supply, and the application range is expanded.
On the other hand, for the DC power supplies in different current directions, the corresponding overcurrent protection function can be realized only by changing the preset condition required by judgment, so that the limitation of an application scene is avoided, and the applicability of the circuit is improved.
It should be noted that, in this document, the contained terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.
Claims (10)
1. An overcurrent protection circuit of a DC power supply, wherein the DC power supply comprises:
the power supply circuit comprises an upper power tube and a lower power tube which are sequentially connected in series between an input voltage input end and a reference ground, wherein the upper power tube is a PMOS transistor, and the lower power tube is an NMOS transistor;
the inductor and the output capacitor are sequentially connected between the drain electrode of the upper power tube and the reference ground in series; and
the driving control circuit is used for generating a first control signal and a second control signal which are used for respectively controlling the on-off of the upper power tube and the lower power tube according to a clock signal;
the overcurrent protection circuit includes:
the upper power tube current limiting module is connected with the upper power tube and used for sampling the current flowing through the upper power tube and generating a first feedback signal to the drive control circuit according to the sampling result;
a lower power tube current limiting module connected with the lower power tube and used for sampling the current flowing through the lower power tube and generating a second feedback signal to the drive control circuit according to the sampling result,
under the condition that the current flowing through the upper power tube meets a first preset condition, the driving control circuit controls the upper power tube to be switched off and controls the lower power tube to be switched on based on the first feedback signal;
and under the condition that the current flowing through the lower power tube meets a second preset condition, the driving control circuit controls the upper power tube to be switched on and controls the lower power tube to be switched off based on the second feedback signal and the clock signal.
2. The overcurrent protection circuit of claim 1, wherein when the current flowing through the upper power transistor flows in from the source of the upper power transistor and flows out from the drain of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is greater than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is less than a second threshold,
wherein the first threshold and the second threshold are both positive values, and the absolute value of the first threshold is greater than the absolute value of the second threshold.
3. The overcurrent protection circuit of claim 1, wherein when the current flowing through the upper power transistor flows in from the drain of the upper power transistor and flows out from the source of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is less than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is greater than a second threshold value,
wherein the first threshold and the second threshold are both negative values, and an absolute value of the first threshold is greater than an absolute value of the second threshold.
4. The overcurrent protection circuit of claim 2 or claim 3, wherein the upper power tube current limiting module comprises:
the first sampling unit is connected with the upper power tube and is used for sampling the current flowing through the upper power tube;
the first current limiting unit is connected with the first sampling unit and used for processing the sampling result of the first sampling unit based on the first threshold value and generating the first feedback signal according to the processing result;
and the first pulse generating unit is used for receiving the first control signal and generating a shielding signal with a first pulse width when the first control signal is effective, wherein the shielding signal is used for controlling the first sampling unit and/or the first current limiting unit not to work.
5. The overcurrent protection circuit of claim 4, wherein the first pulse width is less than an active duration of the first control signal within one signal period.
6. The overcurrent protection circuit of claim 2 or claim 3, wherein the lower power tube current limiting module comprises:
the second sampling unit is connected with the lower power tube and is used for sampling the current flowing through the lower power tube;
the second current limiting unit is connected with the second sampling unit and used for processing the sampling result of the second sampling unit based on the second threshold value and generating the second feedback signal according to the processing result;
and the second pulse generating unit is used for receiving the second control signal and generating a shielding signal with a second pulse width when the second control signal is effective, wherein the shielding signal is used for controlling the second sampling unit and/or the second current limiting unit to be out of operation.
7. The overcurrent protection circuit of claim 6, wherein the second pulse width is less than an active duration of the second control signal within one signal period.
8. An overcurrent protection method of a DC power supply, wherein the DC power supply comprises: an upper power tube and a lower power tube which are sequentially connected in series between an input voltage input end and a reference ground, wherein the upper power tube is a PMOS transistor, the lower power tube is an NMOS transistor,
the overcurrent protection method comprises the following steps:
monitoring the current flowing through the upper power tube, and controlling the upper power tube to be switched off and the lower power tube to be switched on under the condition that the current flowing through the upper power tube meets a first preset condition;
and monitoring the current flowing through the lower power tube, and controlling the upper power tube to be switched on and the lower power tube to be switched off under the condition that the current flowing through the lower power tube meets a second preset condition.
9. The overcurrent protection method according to claim 8, wherein when the current flowing through the upper power transistor flows in from a source of the upper power transistor and flows out from a drain of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is greater than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is less than a second threshold,
wherein the first threshold and the second threshold are both positive values, and the absolute value of the first threshold is greater than the absolute value of the second threshold.
10. The overcurrent protection method according to claim 8, wherein when the current flowing through the upper power transistor flows in from a drain of the upper power transistor and flows out from a source of the upper power transistor, the first preset condition is: the current flowing through the upper power tube is less than a first threshold,
the second preset condition is as follows: the current flowing through the lower power tube is greater than a second threshold,
wherein the first threshold and the second threshold are both negative values, and an absolute value of the first threshold is greater than an absolute value of the second threshold.
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| CN202011398532.7A CN114583929A (en) | 2020-12-02 | 2020-12-02 | Overcurrent protection circuit and overcurrent protection method of DC power supply |
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