CN114561675A

CN114561675A - Method for controlling thickness of copper on electroplating hole filling surface of printed circuit

Info

Publication number: CN114561675A
Application number: CN202210323016.0A
Authority: CN
Inventors: 王翀; 陈超; 何为; 陈苑明; 王守绪; 周国云; 张伟华; 罗毓瑶; 叶依林
Original assignee: University of Electronic Science and Technology of China; Zhuhai Founder Technology High Density Electronic Co Ltd
Current assignee: University of Electronic Science and Technology of China; Zhuhai Founder Technology High Density Electronic Co Ltd
Priority date: 2022-03-29
Filing date: 2022-03-29
Publication date: 2022-05-31
Anticipated expiration: 2042-03-29
Also published as: CN114561675B

Abstract

A method for controlling the thickness of copper on the electroplating hole filling surface of a printed circuit belongs to the technical field of printed circuit boards. The method comprises the following steps: depositing a conductive buffer layer on the base plate by adopting an electroplating or chemical plating method; forming a through hole; soaking in a passivation solution to form a passivation layer on the conductive buffer layer; flash plating a copper layer on the passivation layer; depositing a copper layer on the wall of the through hole by adopting a chemical copper deposition process; carrying out copper filling electroplating on the through hole; etching the copper layer on the passivation layer until the conductive buffer layer is etched; soaking the substrate in the etching solution of the conductive buffer layer to remove the conductive buffer layer; and removing the copper columns at the hole openings of the through holes remained after etching to obtain smooth and flat copper layers. The invention adopts the copper reducing process to obtain the flat surface copper without the sunken hole, has simple process and high reliability, can realize large-scale industrialization, and provides an effective method for manufacturing the circuit board with higher frequency requirement under the age of 5G.

Description

Method for controlling thickness of copper on electroplating hole filling surface of printed circuit

Technical Field

The invention belongs to the technical field of printed circuit boards, and particularly relates to a method for controlling the thickness of copper on an electroplating filled hole surface of a printed circuit.

Background

With the development of 5G communication technology, the requirement for the speed of transmitting various application data such as servers, intelligent driving, internet of things and the like is faster and faster, the volume of various electronic products is gradually reduced, the integration level of electronic components is higher, the functions of the electronic products are realized by depending on the electronic components and the electrical interconnection among the electronic components, the printed circuit board is used as a main carrier for the electrical interconnection among the electronic components, and the development speed of the printed circuit board inevitably limits the step of 5G technology advancement.

The high-density interconnection printed circuit board is manufactured by the blind hole burying and through hole technology, so that each electronic element has higher integration level, and electronic products are gradually developed towards the direction of smaller volume and higher reliability. In the plate making process, the core plate is usually used for completing hole stacking through the processes of drilling, chemical copper plating, full-plate electroplating, resin hole plugging, secondary electroplating, etching windowing, laser drilling, blind hole filling and the like. However, the process is easy to cause defects in through hole resin hole plugging, so that hole stacking failure is caused, and signal transmission is further influenced. In addition, the hole is easily broken due to the difference of the temperature expansion coefficients of the resin and the substrate material after the hole is plugged, and the reliability is further influenced. In order to solve the above problems and achieve good electrical interconnection, a micro via-filling plating technique may be employed to enhance the electrical and thermal conductivity of the interconnection lines and the mechanical strength of the board.

The micro via hole filling electroplating technology needs special hole filling electroplating liquid, wherein the most important is the use of electroplating additives, and the deposition speed of copper ions at different positions of a hole wall is regulated and controlled through the adsorption action of different additives on the hole wall, so that the deposition speed of the copper ions at the center of the hole wall is the fastest, and the hole filling is completed. However, with the deposition of copper ions in the holes, the thickness of the surface copper plating layer is also increased all the time, and a large recess exists at the position of the hole opening, so that the reliability of the manufactured circuit board is greatly influenced if the recess is too deep. For the subsequent fine circuit fabrication, the surface copper thickness needs to be reduced below the required thickness of the circuit. At present, a method of etching or grinding a board to reduce copper is usually adopted in a circuit board production line, however, etching liquid cannot ensure the same etching speed at all parts of a copper surface, so that the copper surface is very rough after being soaked in the etching liquid for a long time and a circuit cannot be manufactured, and the phenomenon of uneven board surface thickness is caused by long-time board grinding by abrasive paper.

Therefore, the thickness control of the surface copper layer needs to be considered when the through hole is filled by electroplating, so as to ensure the subsequent fine circuit manufacturing. Presently, the prior art discloses the improvement of the quality of surface copper plating by increasing the plating rate and modifying the plating equipment to control the surface copper thickness. The patent publication No. CN 103320844 a proposes a device for controlling surface copper in electroplating process, which effectively controls the thickness of copper plating by arranging plating strips on two sides of a circuit board and arranging a floating plate structure between the bottom of an electroplating bath and the circuit board, but the structure can only limit the surface copper thickness at a designated position, and cannot be applied to electroplating hole filling. Tang Xiao et al (patent publication No. CN107090589A) proposed a PCB electroplating device and an electroplating thickness control method, which realize uniform control of the thickness value of the electroplated layer of the board surface by moving and shielding all parts of the board surface through an electroplating floating tank and a baffle plate. Although the method can control the thickness of the plating layer through the baffle, the method can block the through hole filling and is not suitable for controlling the thickness of the surface copper when the through hole is filled by electroplating.

Disclosure of Invention

The invention aims to provide a method for controlling the thickness of copper on the electroplating filled hole surface of a printed circuit, aiming at the defects in the background technology.

In order to achieve the purpose, the technical scheme adopted by the invention is as follows:

a method for controlling the thickness of copper on the electroplating filling hole surface of a printed circuit comprises the following steps:

step 1, depositing a conductive buffer layer on a base plate by adopting an electroplating or chemical plating method;

step 2, forming through holes on the plate obtained after the treatment in the step 1;

step 3, soaking the plate obtained after the treatment in the step 2 in a passivation solution for 15-20 min to form a passivation layer on the conductive buffer layer, wherein the passivation layer is used for protecting the conductive buffer layer from being oxidized by sulfuric acid in a subsequent electroplating process and preventing hydrogen from influencing the binding force of a copper plating layer;

step 4, flash plating a copper layer on the passivation layer obtained in the step 3, wherein the copper layer is mainly used for protecting the conductive buffer layer from contacting with a subsequent chemical copper deposition solution, and preventing the copper deposition solution from being polluted and the conductive buffer layer from being corroded;

step 5, depositing a copper layer with the thickness of 0.2-0.6 mu m on the hole wall of the through hole by adopting a chemical copper deposition process;

step 6, carrying out copper filling electroplating on the through hole; wherein the electroplating current is DC or pulse, and the current density is 0.4A/dm²～3.0A/dm²；

Step 7, etching the copper layer on the passivation layer by adopting an etching method until the conductive buffer layer is etched;

step 8, soaking the circuit board obtained after the treatment of the step 7 in the conductive buffer layer etching solution to remove the conductive buffer layer;

and 9, removing the copper columns at the hole openings of the through holes remained after etching in the step 8 to obtain smooth and flat copper layers for manufacturing fine lines.

Further, the base board in step 1 is a core board, a multilayer board laminated with a prepreg and a copper foil, or a high-density interconnection printed circuit board and other circuit boards needing through hole interconnection.

Further, in the step 1, the conductive buffer layer is a metal layer with metal activity stronger than that of copper and is used for protecting bottom copper from etching and filling holes for subsequent electroplating for conduction, and the thickness of the conductive buffer layer is 2-40 μm.

Further, the through hole in the step 2 is obtained by adopting a mechanical drilling method, and the aperture of the through hole is 100-300 μm.

Further, the passivation solution in step 3 comprises: 0.5-5 g/L triethanolamine phosphate, 4-20 g/L phosphate imidazolinone and 2-6 g/L benzalkonium chloride.

Further, the flash plating in the step 4 adopts a vertical continuous electroplating line flash plating process, and the thickness of the copper layer obtained by flash plating is 2-5 μm.

Further, the chemical copper deposition process in the step 5 comprises the processes of removing glue, neutralizing, removing oil, micro-etching, activating and reducing.

Further, the electroplating of filling copper into the through hole in the step 6 is realized by gantry line electroplating or vertical continuous electroplating.

Further, the etching solution used in the etching method in step 7 is cupric chloride, which oxidizes cupric ions into cuprous ions, thereby etching away the copper layer on the surface.

Further, the etching solution for the conductive buffer layer in step 8 includes: 70-300 g/L of dilute nitric acid, 1-6 g/L of amido gemini quaternary ammonium salt and 50-200 g/L of ferric nitrate.

Further, in step 9, a plate grinding line deburring and edge cutting process is adopted to remove the copper columns at the hole openings of the through holes left after etching in step 8, and the used sand paper for grinding the hole openings is more than 2400 meshes.

Compared with the prior art, the invention has the beneficial effects that:

the invention provides a method for controlling the thickness of copper on the surface of an electroplating filled hole of a printed circuit, which obtains smooth surface copper without a sunken hole in the hole opening by adopting a copper reducing process, has simple process and high reliability, can realize large-scale industrialization, and provides an effective method for manufacturing a circuit board with higher frequency requirement in the age of 5G.

Drawings

FIG. 1 is a flow chart of a method for controlling the thickness of copper on the surface of a plated filled hole of a printed circuit according to the present invention;

FIG. 2 is a cross-sectional view of the circuit board after the through-hole is plated with copper in step 6 according to the embodiment of the present invention;

FIG. 3 is a sectional view of the polished plate obtained in step 9 according to the embodiment of the present invention;

FIG. 4 is a cross-sectional view of the plated via-filling obtained in step 3 of the comparative example;

fig. 5 is a cut view after etching obtained in comparative example step 4.

In the drawings: 1. copper on the substrate surface; 2. an insulating base material; 3. a tin buffer layer; 4. a through hole; 5. flash-plating a copper layer; 6. chemically plating a copper layer in the hole; 7. electroplating a surface copper layer; 8. and filling copper in the hole.

Detailed Description

The technical scheme of the invention is detailed in the following by combining the drawings and the embodiment.

Examples

A method for controlling the thickness of copper on the electroplating filled hole surface of a printed circuit specifically comprises the following steps:

step 1, depositing a metal tin layer with the thickness of 20 micrometers on a base plate by adopting an electroplating method to be used as a conductive buffer layer, wherein the circuit board after tin electroplating is shown as the second step in figure 1; wherein the base plate is a copper-clad plate (shown as (r) in figure 1) composed of a base material with the thickness of 180 μm and a base plate surface copper with the thickness of 17.5 μm;

step 2, forming a through hole with the aperture of 200 mu m on the board obtained after the processing in the step 1 by adopting a mechanical drilling method, wherein the circuit board after drilling is shown as the third figure in fig. 1;

step 3, soaking the plate obtained after the treatment in the step 2 in a passivation solution for 20min to form a passivation layer on the tin conductive buffer layer; wherein, the passivating liquid includes: triethanolamine phosphate at 2g/L, imidazolinone phosphate at 10g/L, benzalkonium chloride at 4 g/L;

step 4, flash plating a copper layer with the thickness of 3 mu m on the passivation layer obtained in the step 3 by adopting a vertical continuous electroplating line flash plating process;

step 5, depositing a copper layer with the thickness of 0.4 mu m on the wall of the through hole of the flash-plated circuit board through a chemical copper deposition process, wherein the circuit board after chemical copper deposition is shown as the fourth step in the figure 1;

step 6, carrying out through hole copper filling electroplating on the circuit board subjected to chemical copper deposition by adopting gantry line electroplating, wherein the electroplating current is direct current, and the current density is 0.8A/dm²Electroplating for 2 hours to fill the through hole, wherein the thickness of the copper electroplating layer is 50 μm, the circuit board after copper filling and electroplating of the through hole is shown as the fifth drawing in figure 1, and the circuit board after copper filling and electroplating of the through hole is shown as the slice drawing in figure 2;

step 7, etching the copper layer on the passivation layer by using copper chloride as an etching solution by adopting an etching method until the tin conductive buffer layer is etched; the circuit board after etching is shown as (sixth) in figure 1;

step 8, soaking the circuit board obtained after the treatment of the step 7 in the conductive buffer layer etching solution to remove the tin conductive buffer layer, wherein the circuit board after tin etching is shown in the figure 1; wherein, the conductive buffer layer etching solution comprises: 200g/L of dilute nitric acid, 3g/L of amido gemini quaternary ammonium salt and 60g/L of ferric nitrate;

and 9, removing the copper columns at the hole openings of the through holes left after etching in the step 8 by using 4000-mesh sand paper through a plate grinding line, and cutting a plate after grinding as shown in fig. 3.

Comparative example

Step 1, forming a through hole with the aperture of 200 mu m on a base plate by adopting a mechanical drilling method; wherein the base plate is a copper-clad plate consisting of a base material with the thickness of 180 mu m and a substrate surface copper with the thickness of 17.5 mu m;

step 2, depositing a copper layer with the thickness of 0.4 mu m on the wall of the through hole by a chemical copper deposition process;

step 3, the circuit board after chemical copper deposition is plated with the copper filled through hole by using gantry line plating, the plating current is direct current,the current density is 0.8A/dm²(ii) a The slice after electroplating is shown in FIG. 4;

and 4, soaking the circuit board after the electroplating and hole filling in a copper chloride etching solution for about 20min, and etching to obtain a slice diagram as shown in fig. 5.

As can be seen from FIGS. 2-5, the copper-reducing vias have large recesses after the direct electroplating of the comparative example, which seriously affects the reliability of the subsequent circuit fabrication; the embodiment can obtain a smooth surface copper layer without recess in the hole opening by reducing the copper through the buffer layer.

The above description is intended to be illustrative of the present invention and should not be taken as limiting the invention, as the invention is intended to cover all modifications, equivalents, improvements and the like falling within the spirit and scope of the present invention.

Claims

1. A method for controlling the thickness of copper on the electroplating hole filling surface of a printed circuit is characterized by comprising the following steps:

step 2, forming through holes in the plate obtained after the treatment in the step 1;

step 3, soaking the plate obtained after the treatment in the step 2 in a passivation solution for 15-20 min to form a passivation layer on the conductive buffer layer;

step 4, flash plating a copper layer on the passivation layer obtained in the step 3;

step 5, depositing a copper layer with the thickness of 0.2-0.6 mu m on the wall of the through hole by adopting a chemical copper deposition process;

and 9, removing the copper columns at the hole openings of the through holes remained after etching in the step 8 to obtain smooth and flat copper layers.

2. The method for controlling the thickness of copper on the electroplated hole-filling surface of the printed circuit according to claim 1, wherein the conductive buffer layer in step 1 is a metal layer with stronger metal activity than copper, and the thickness of the conductive buffer layer is 2 μm to 40 μm.

3. The method for controlling the copper thickness of the electroplated hole filling surface of the printed circuit as claimed in claim 1, wherein the through hole in step 2 is obtained by a mechanical drilling method, and the aperture of the through hole is 100 μm to 300 μm.

4. The method for controlling the thickness of copper on the electroplating filling hole surface of the printed circuit according to claim 1, wherein the passivation solution in the step 3 comprises the following steps: 0.5-5 g/L triethanolamine phosphate, 4-20 g/L phosphate imidazolinone and 2-6 g/L benzalkonium chloride.

5. The method for controlling the copper thickness of the electroplated hole-filling surface of the printed circuit as claimed in claim 1, wherein the flash plating in step 4 is a vertical continuous electroplating line flash plating process, and the thickness of the copper layer obtained by flash plating is 2 μm to 5 μm.

6. The printed circuit electroplating hole-filling surface copper thickness control method according to claim 1, wherein the through hole copper-filling electroplating of step 6 is implemented by gantry line electroplating or vertical continuous electroplating.

7. The method as claimed in claim 1, wherein the etching solution used in the etching process of step 7 is cupric chloride.

8. The printed circuit electroplating hole filling surface copper thickness control method as claimed in claim 1, wherein the conductive buffer layer etching solution of step 8 comprises: 70-300 g/L of dilute nitric acid, 1-6 g/L of amido gemini quaternary ammonium salt and 50-200 g/L of ferric nitrate.