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CN114521042A - Composite metal foil and circuit board - Google Patents

Composite metal foil and circuit board Download PDF

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Publication number
CN114521042A
CN114521042A CN202011301299.6A CN202011301299A CN114521042A CN 114521042 A CN114521042 A CN 114521042A CN 202011301299 A CN202011301299 A CN 202011301299A CN 114521042 A CN114521042 A CN 114521042A
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CN
China
Prior art keywords
layer
resistance
conductive layer
resistance layer
roughness
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CN202011301299.6A
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Chinese (zh)
Inventor
苏陟
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Guangzhou Fangbang Electronics Co Ltd
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Guangzhou Fangbang Electronics Co Ltd
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Priority to CN202011301299.6A priority Critical patent/CN114521042A/en
Priority to PCT/CN2020/137918 priority patent/WO2022104994A1/en
Publication of CN114521042A publication Critical patent/CN114521042A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0257Overvoltage protection
    • H05K1/0259Electrostatic discharge [ESD] protection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Laminated Bodies (AREA)

Abstract

The invention discloses a composite metal foil and a circuit board, wherein the composite metal foil comprises: the resistor comprises a first conducting layer and a first resistor layer, wherein the first resistor layer is formed on one side of the first conducting layer, and at least partial areas of one side, close to the first conducting layer, of the first resistor layer and one side, far away from the first conducting layer, of the first resistor layer are provided with protruding structures. Due to the existence of the protruding structure, the sectional area of the first resistance layer is increased, the current-carrying capacity of the first resistance layer is improved, the ESD resistance of the first resistance layer is further improved, and the antistatic breakdown capacity of the embedded resistor is further improved.

Description

Composite metal foil and circuit board
Technical Field
The invention relates to the technical field of composite metal foils, in particular to a composite metal foil and a circuit board.
Background
With the rapid development of wireless communication and electronic devices, electronic devices have evolved toward miniaturization, and lightness, and therefore, the size of components inside the electronic devices is required to be as miniaturized and as light as possible.
The resistance element inside the electronic device gradually develops from the previous plug-in resistor with pins, to the chip resistor, and then to the embedded resistor, to be light and thin. The preparation process of the embedded resistor is roughly as follows: and attaching the composite metal foil to the circuit board, and etching the embedded resistor by an etching process.
The embedded resistors are integrated on a circuit board inside an application terminal electronic product, the circuit is sensitive to high static voltage, when people or objects with static electricity contact the embedded resistors, static electricity is released, and after the static high voltage impacts the circuit, the embedded resistors are easily broken down by the high static voltage, so that the embedded resistors fail to function.
Disclosure of Invention
One object of an embodiment of the present invention is to: provided is a composite metal foil, which can improve the current-carrying capacity of a first resistance layer, further improve the ESD (Electro-Static Discharge) resistance of the first resistance layer, and further improve the anti-electrostatic breakdown resistance of an embedded resistor.
It is yet another object of embodiments of the invention to: a circuit board is provided, which comprises the composite metal foil provided by the embodiment of the invention.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, an embodiment of the present invention provides a composite metal foil, including: a first conductive layer and a first resistive layer;
the first resistance layer is arranged on one side of the first conducting layer;
at least partial areas of one side of the first resistance layer close to the first conducting layer and one side of the first resistance layer far away from the first conducting layer are provided with protruding structures.
Optionally, the roughness Rz of the first resistance layer at the side close to the first conductive layer and the side far from the first conductive layer ranges from 0.1 μm to 30 μm.
Optionally, the range of the roughness Sdr of the side of the first resistance layer close to the first conductive layer and the side far away from the first conductive layer is greater than or equal to 0.5%.
Optionally, all areas of one side of the first resistance layer close to the first conductive layer and one side of the first resistance layer far from the first conductive layer are provided with protruding structures.
Optionally, at least partial regions of one side of the first resistance layer close to the first conductive layer and one side of the first resistance layer far from the first conductive layer are provided with a plurality of continuous protruding structures.
Optionally, all areas of one side of the first resistance layer close to the first conductive layer and one side of the first resistance layer far from the first conductive layer are provided with a plurality of continuous protruding structures.
Optionally, the roughness Rz of the first resistance layer at the side close to the first conductive layer and the side far from the first conductive layer ranges from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer at the side close to the first conductive layer and the side far from the first conductive layer ranges from 20% or more.
Optionally, the roughness Rz of the first resistance layer at the side close to the first conductive layer and the side far from the first conductive layer ranges from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer at the side close to the first conductive layer and the side far from the first conductive layer ranges from greater than or equal to 50%.
Optionally, the roughness Rz of the first resistance layer at the side close to the first conductive layer and the side far from the first conductive layer ranges from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer at the side close to the first conductive layer and the side far from the first conductive layer ranges from 200% or more.
Optionally, the composite metal foil further includes at least one dielectric layer, and the dielectric layer is disposed on a side of the first resistance layer away from the first conductive layer.
Optionally, a second resistance layer and a second conductive layer are disposed on one side of the dielectric layer away from the first resistance layer, and the second resistance layer is located between the dielectric layer and the second conductive layer.
Optionally, at least a partial region of one side of the first conductive layer, which is close to the first resistive layer, is formed with a concave-convex surface, so that at least partial regions of one side of the first resistive layer, which is close to the first conductive layer, and one side of the first conductive layer, which is far away from the first conductive layer, both form a convex structure.
Optionally, continuous protruding structures are arranged in all areas of one side of the first resistance layer close to the first conductive layer and one side of the first resistance layer far away from the first conductive layer, so that the first resistance layer forms a continuous wavy structure.
Optionally, the material of the first resistance layer includes at least one simple metal of nickel, chromium, platinum, palladium, and titanium, and/or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum.
Optionally, the first resistive layer has a single-layer structure or at least a two-layer structure.
In a second aspect, an embodiment of the present invention further provides a circuit board, including the composite metal foil provided in the first aspect of the present invention.
The composite metal foil provided by the embodiment of the invention comprises a first conducting layer and a first resistance layer, wherein the first resistance layer is arranged on one side of the first conducting layer, and at least partial areas of one side of the first resistance layer close to the first conducting layer and one side of the first resistance layer far away from the first conducting layer are provided with protruding structures. Due to the existence of the protruding structure, the sectional area of the first resistance layer is increased, the current-carrying capacity of the first resistance layer is improved, the ESD resistance of the first resistance layer is further improved, and the antistatic breakdown performance of the embedded resistor is further improved.
Drawings
The invention is explained in more detail below with reference to the figures and examples.
Fig. 1A is a schematic structural diagram of a composite metal foil according to an embodiment of the present invention;
fig. 1B is a schematic structural diagram of another composite metal foil provided in an embodiment of the present invention;
FIG. 2A is a schematic diagram of another composite metal foil according to an embodiment of the present invention;
FIG. 2B is a schematic structural diagram of another composite metal foil according to an embodiment of the present invention;
FIG. 2C is a schematic structural diagram of another composite metal foil according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of another composite metal foil provided in an embodiment of the present invention;
FIG. 4A is a schematic structural diagram of another composite metal foil provided in an embodiment of the present invention;
FIG. 4B is a schematic structural diagram of another composite metal foil according to an embodiment of the present invention;
fig. 5A is a flowchart of a method for manufacturing a composite metal foil according to an embodiment of the present invention;
fig. 5B is a schematic diagram of forming a first conductive layer on a carrier layer according to an embodiment of the invention;
fig. 5C is a schematic view of forming a concave-convex surface on a side of the first conductive layer away from the carrier layer according to an embodiment of the present invention;
fig. 5D is a schematic diagram of forming a first resistive layer on the first conductive layer according to an embodiment of the invention;
fig. 5E is a schematic diagram of forming a dielectric layer on the first resistive layer according to an embodiment of the present invention;
FIG. 6A is a flow chart of another method for manufacturing a composite metal foil according to an embodiment of the present invention;
fig. 6B is a schematic diagram of forming a first resistive layer on a carrier layer according to an embodiment of the present invention;
fig. 6C is a schematic diagram of forming a bump structure on a side of the first resistive layer away from the carrier layer according to an embodiment of the present invention;
FIG. 6D is a schematic diagram illustrating a first conductive layer formed on the first resistive layer according to an embodiment of the present invention;
FIG. 6E is a schematic view of the carrier being peeled off according to an embodiment of the present invention;
fig. 6F is a schematic diagram of forming a protruding structure on a side of the first resistive layer away from the carrier according to an embodiment of the present invention;
fig. 6G is a schematic diagram of forming a dielectric layer on the first resistive layer according to an embodiment of the invention;
FIG. 7A is a flow chart of another method for making a composite metal foil according to an embodiment of the present invention;
FIG. 7B is a schematic diagram of a first resistive layer formed on a carrier layer according to an embodiment of the present invention;
fig. 7C is a schematic diagram of forming a first conductive layer on the first resistive layer according to an embodiment of the present invention;
FIG. 7D is a schematic view of the carrier being peeled off according to an embodiment of the present invention;
fig. 7E is a schematic diagram of forming a dielectric layer on the first resistance layer according to an embodiment of the invention.
Detailed Description
In order to make the technical problems solved, technical solutions adopted and technical effects achieved by the present invention clearer, the technical solutions of the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, unless expressly stated or limited otherwise, the terms "connected," "connected," and "fixed" are to be construed broadly, e.g., as meaning permanently connected, removably connected, or integral to one another; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or may be connected through the use of two elements or the interaction of two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature. Furthermore, the terms "first" and "second" are used merely for descriptive purposes and are not intended to have any special meaning.
Fig. 1A is a schematic structural diagram of a composite metal foil according to an embodiment of the present invention, and fig. 1B is a schematic structural diagram of another composite metal foil according to an embodiment of the present invention, as shown in fig. 1A and fig. 1B, in this embodiment, the composite metal foil includes a first conductive layer 110 and a first resistive layer 120.
Specifically, the first conductive layer 110 has good conductive performance, and the material of the metal layer may be gold, silver, copper, or aluminum, or an alloy of at least two of gold, silver, copper, and aluminum. In other embodiments of the present invention, the first conductive layer 110 may also be another non-metal layer with good conductive performance, and the material of the first conductive layer is not limited in the embodiments of the present invention as long as it has good conductive performance. The thickness of the first conductive layer 110 ranges from 2 μm to 18 μm.
First resistive layer 120 is a key functional layer of the composite metal foil, and is used to implement the resistive function of the embedded resistor. First resistive layer 120 may be made of different materials to provide different resistive properties. The material of first resistance layer 120 may include any one of elementary metals of nickel, chromium, platinum, palladium, and titanium, and/or an alloy including a combination of at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum. For example, a nickel-chromium alloy (NiCr) or a nickel-phosphorus alloy (NiP) having a low resistivity, or a chromium-silicon alloy (CrSi) having a high resistivity, and the embodiments of the present invention are not limited thereto. The first resistance layer 120 is used as a precursor of the first resistance layer in the embedded resistor, in other words, the first resistance layer in the embedded resistor is obtained by removing a portion of the first resistance layer 120 by etching or the like. First resistance layer 120 has a thickness in the range of 0.01 μm to 0.2 μm. It should be noted that the high resistivity and the low resistivity in the embodiments of the present invention are for the first resistive layer itself, and not for the first conductive layer.
In some embodiments of the present invention, first resistive layer 120 is a single layer structure or at least a two-layer structure. Illustratively, the single-layer structure may be a single-layer structure composed of any one metal of nickel, chromium, platinum, palladium and titanium, or may be a single-layer structure composed of an alloy of at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum. Any layer in the at least two-layer structure can be a single metal composed of any one of nickel, chromium, platinum, palladium and titanium, and can also be an alloy formed by combining at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum.
First resistance layer 120 is disposed on one side of first conductive layer 110, and in one embodiment of the present invention, first conductive layer 110 may be prepared in advance, and then first resistance layer 120 may be formed on one side of first conductive layer 110 by physical vapor deposition, chemical vapor deposition, evaporation plating, sputter plating, electroplating, hybrid plating, and the like. In another embodiment of the present invention, first resistive layer 120 may be prepared in advance, and then first conductive layer 110 may be formed on one side of first resistive layer 120 by physical vapor deposition, chemical vapor deposition, evaporation plating, sputter plating, electroplating, hybrid plating, and the like. The order of forming first conductive layer 110 and first resistive layer 120 is not limited in the embodiments of the present invention.
At least partial areas of the first resistive layer 120 close to the first conductive layer and the side far from the first conductive layer are provided with protruding structures 121, so that at least partial areas of both sides of the first resistive layer 120 have rough surfaces.
The inventors have found that the cross-sectional area of the first resistance layer in the embedded resistor affects the ESD resistance. When the sectional area of the first resistance layer is larger, the current-carrying capacity of the first resistance layer is larger, and the ESD resistance is better. In order to improve the ESD resistance of the buried resistor, the cross-sectional area of the first resistance layer may be increased.
The embodiment of the present invention forms several protruding structures 121 on at least partial areas of both sides of first resistive layer 120, so that at least partial areas of both sides of first resistive layer 120 have rough surfaces. Due to the existence of the protruding structure 121, the sectional area of the first resistance layer 120 is increased, the current-carrying capacity of the first resistance layer 120 is increased, and therefore the ESD resistance of the first resistance layer is improved, and the anti-electrostatic breakdown capability of the embedded resistor is improved.
The composite metal foil provided by the embodiment of the invention comprises a first conducting layer and a first resistance layer, wherein the first resistance layer is arranged on one side of the first conducting layer, and at least partial areas of one side of the first resistance layer close to the first conducting layer and one side of the first resistance layer far away from the first conducting layer are provided with protruding structures. Due to the existence of the protruding structure, the sectional area of the first resistance layer is increased, the current-carrying capacity of the first resistance layer is improved, the ESD resistance of the first resistance layer is further improved, and the antistatic breakdown performance of the embedded resistor is further improved.
In the embodiment of the present invention, roughness Rz of both sides of first resistance layer 120 ranges from 0.1 μm or more, and roughness Sdr ranges from 0.5% or more. Roughness Rz and roughness Sdr are used to characterize the microscopic unevenness of the surface of first resistive layer 120, and in particular, the roughness Rz is generally taken as the sum of the average of the five largest profile peak heights and the average of the five largest profile valley depths within the sampling length. The roughness Sdr is an extended area (surface area) of the defined region indicates how much an increase is made with respect to the area of the defined region, wherein the roughness Sdr of the completely flat surface is zero. It should be noted that, in the embodiment of the present invention, the roughness Rz of the two sides of the first resistance layer 120 may be the same or different, and the roughness Sdr of the two sides of the first resistance layer 120 may be the same or different, which is not limited herein. In this and subsequent examples, the roughness test standard is ISO25178 standard.
Further, in some embodiments of the present invention, in order to further improve the ESD resistance of the first resistance layer, the roughness Rz of both sides of the first resistance layer 120 ranges from 0.1 μm to 30 μm, including 0.1 μm and 30 μm, and the roughness Rz of both sides of the first resistance layer 120 may also take on values of 1 μm, 5 μm, 8 μm, 9 μm, 10 μm, 15 μm, 20 μm, and the like. The roughness Sdr may range from 0.5% to 8000%, including 0.5% and 8000%, and may also take on values of 1%, 5%, 12%, 20%, 50%, 80%, 100%, 200%, 500%, 800%, 1500%, 2000%, 2500%, 3000%, 3500%, 4000%, 4500%, 5000%, 5500%, 6000%, 6500%, 7000%, 7500%, and the like.
Table 1 shows the ESD resistance test on the first resistance layers with different roughness Rz, and the test method is as follows: under other conditions, the test electrostatic voltage is applied to the first resistance layer having a certain roughness three times with a 10-second interval time using the forward direction, and then applied to the first resistance layer three times with a 10-second interval time using the reverse direction. And gradually increasing the testing electrostatic voltage, and taking the testing electrostatic voltage which breaks through the first resistance layer as the electrostatic discharge resistant voltage of the first resistance layer.
TABLE 1
Rz(μm) Resisting electrostatic discharge voltage (KV)
0.1 0.51
1 1.22
2 1.57
4 2.25
6 3.15
10 3.49
30 4.1
As shown in table 1, the different roughness Rz has different esd withstanding voltages, that is, the roughness Rz of the first resistance layer is adjusted by providing the protruding structure on at least a partial region of the first resistance layer on the side away from the first conductive layer, so that the esd withstanding voltage of the first resistance layer can be improved.
Table 2 shows the test results obtained by performing the ESD resistance test on the first resistance layers with different roughness Sdr, in the same manner as the above.
TABLE 2
Sdr(%) Resisting electrostatic discharge voltage (KV)
0.5 0.53
10 0.76
70 1.45
100 2.18
500 3.07
1000 4.11
8000 4.3
As shown in table 2, different roughness Sdr have different electrostatic discharge voltage resistances, that is, by providing a protruding structure on at least a partial region of the first resistance layer on the side away from the first conductive layer, the roughness Sdr of the first resistance layer is adjusted, so that the electrostatic discharge voltage resistance of the first resistance layer can be improved.
In the embodiment of the present invention, the shape of the protruding structure 121 may have a variety according to actual needs, and may be a regular or irregular solid geometry, for example, the shape of the protruding structure 121 may be one or more of a sharp corner, an inverted cone, a granule, a branch, a column, a block, and an arc, and the embodiment of the present invention is not limited herein.
Further, in order to further improve the ESD resistance (i.e., the electrostatic discharge voltage resistance) of first resistance layer 120, protruding structures 121 provided on at least partial regions of both sides of first resistance layer 120 are continuously provided. Illustratively, as shown in fig. 1A, the shape of the protruding structures 121 is dendritic, and the protruding structures 121 are continuously distributed on at least a partial region of the first resistive layer 120; as shown in fig. 1B, the protruding structures 121 are arc-shaped, and the protruding structures 121 are continuously distributed on at least a partial area of the first resistive layer 120 to form a structure similar to a "sine line" shape on both sides of the first resistive layer 120. In addition, in other embodiments of the present invention, the protruding structure may include a continuous undulating surface formed on both sides of the first resistive layer, and a plurality of protruding portions formed on the undulating surface, which is not limited herein. In addition, in other embodiments of the present invention, at least partial areas of the protruding structures 121 on both sides of the first resistive layer 120 may also be discontinuously distributed, and the embodiments of the present invention are not limited herein.
In some embodiments of the present invention, as shown in fig. 1A and 1B, the composite metal foil may further comprise at least one dielectric layer 130, dielectric layer 130 being disposed on a side of first resistive layer 120 away from first conductive layer 110. The dielectric layer 130 may be made of resin adhesive, Polyimide (PI), modified polyimide, fiberglass cloth composite, a paper substrate, a composite substrate, an HDI plate, modified epoxy resin, modified acrylic resin, polyethylene terephthalate, glycol ester, polybutylene terephthalate, polyethylene, or the like, and is used to protect the first resistance layer 120 and prevent the first resistance layer 120 from being damaged by external force. Specifically, the dielectric layer 130 may be a single-layer structure or at least two-layer structure, and when the dielectric layer is at least two-layer structure, the material of each layer may be the same or different.
Further, the dielectric layer may be a single layer or at least two layers, in one embodiment of the present invention, the dielectric layer 130 is a two-layer structure, both two layers of the dielectric layer 330 may be made of the same material, such as polyimide, may also be made from two different materials, such as a layer of resin glue, a layer of polyimide, in any of these configurations, however, in order to meet specific requirements, a filler may be optionally disposed in the dielectric layer adjacent to the first resistive layer 320, so as to improve the bonding strength between the dielectric layer and its adjacent layers, or some functional fillers, such as thermal conductive fillers, can conduct heat generated on the resistance layer out through the thermal conductive fillers, effectively ensure that heat generated due to electrostatic impact can be quickly conducted out, improve the ESD resistance of the first resistance layer, and further effectively improve the anti-electrostatic breakdown capability of the embedded resistance device.
In some embodiments of the present invention, first resistive layer 120 is formed on dielectric layer 130, and a filler may be disposed in a partial region close to a sublayer of first resistive layer 120, so that dielectric layer 130 has a concave-convex surface, so that when first resistive layer 120 is formed on the concave-convex surface, at least partial regions on both sides of first resistive layer 120 may form convex structures 121 according to the concave-convex surface of dielectric layer 130.
Specifically, the filler makes the dielectric layer 130 have a roughness in the range of 0.1 μm to 30 μm near the first resistance layer 120, and a roughness Sdr in the range of 0.5% or more.
In some embodiments of the present invention, first resistive layer 120 is formed on first conductive layer 110. The first conductive layer 110 may be processed in advance to form a concave-convex surface on at least a partial region of the surface of the first conductive layer 110, so that when the first resistive layer 120 is formed on the concave-convex surface, the convex structures 121 may be formed on at least partial regions of both sides of the first resistive layer 120 according to the concave-convex surface of the first conductive layer 110.
Fig. 2A is a schematic structural diagram of another composite metal foil provided in the embodiment of the present invention, fig. 2B is a schematic structural diagram of another composite metal foil provided in the embodiment of the present invention, and fig. 2C is a schematic structural diagram of another composite metal foil provided in the embodiment of the present invention, as shown in fig. 2A, fig. 2B, and fig. 2C, in the embodiment, the composite metal foil includes a first conductive layer 210 and a first resistive layer 220.
Specifically, the first conductive layer 210 has good conductive performance, and the material of the metal layer may be gold, silver, copper, or aluminum, or an alloy of at least two of gold, silver, copper, and aluminum. The first resistive layer 220 is a key functional layer of the composite metal foil, and is used for realizing the resistive function of the composite metal foil. The material of the first resistance layer 220 may include at least one elemental metal of nickel, chromium, platinum, palladium, titanium, and/or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum. For example, a nickel-chromium alloy (NiCr) or a nickel-phosphorus alloy (NiP) having a low resistivity, or a chromium-silicon alloy (CrSi) having a high resistivity. In one embodiment of the present invention, the material of the first resistance layer 220 is nichrome. In some embodiments of the present invention, the first resistive layer 220 may be a single layer structure or at least a two-layer structure. Illustratively, the single-layer structure may be a single-layer structure composed of any one metal of nickel, chromium, platinum, palladium and titanium, or may be a single-layer structure composed of an alloy of at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum. Any layer in the at least two-layer structure can be a simple substance metal composed of any one of nickel, chromium, platinum, palladium and titanium, and can also be an alloy of at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum.
All regions of both sides of the first resistance layer are provided with the convex structures, and exemplarily, as shown in fig. 2A, 2B and 2C, all regions of both sides of the first resistance layer are provided with the convex structures 221, so that both sides of the first resistance layer 220 form a rough surface. Because the whole surfaces of the two sides of the first resistance layer 220 are provided with the protruding structures 221, the sectional area of the first resistance layer 220 is further increased compared with the partial areas provided with the protruding structures 221, and the anti-static breakdown capability of the embedded resistor is improved.
Specifically, the roughness Rz of both sides of the first resistance layer 220 ranges from 0.1 μm or more, and the roughness Sdr ranges from 0.5% or more. It should be noted that, in the embodiment of the present invention, the roughness Rz of the two sides of the first resistance layer 220 may be the same or different, and the roughness Sdr of the two sides of the first resistance layer 220 may be the same or different, which is not limited herein. Preferably, the roughness Rz of both sides of the first resistance layer 220 ranges from 0.1 μm to 30 μm, including 0.1 μm and 30 μm, and the roughness Rz of both sides of the first resistance layer 220 may also take on the values of 1 μm, 5 μm, 8 μm, 9 μm, 10 μm, 15 μm, 20 μm, and the like. The roughness Sdr may range from 0.5% to 8000%, including 0.5% and 8000%, and may also take on values of 1%, 5%, 12%, 20%, 50%, 80%, 100%, 200%, 500%, 800%, 1500%, 2000%, 2500%, 3000%, 3500%, 4000%, 4500%, 5000%, 5500%, 6000%, 6500%, 7000%, 7500%, and the like.
In the embodiment of the present invention, the shape of the protruding structure may have diversity according to actual needs, and may be a regular or irregular solid geometric shape, which is not limited herein. In some examples, the protruding structures may form a continuous undulating surface on both sides of the first resistance layer, may form a more regular "sine line" shape on both sides of the first resistance layer, or may form one or more shapes of sharp corners, inverted cones, particles, dendrites, columns, blocks, and arcs.
In the embodiment of the invention, as shown in fig. 2C, in order to further improve the ESD resistance of the first resistance layer 220, the protrusion structures 221 disposed in all the regions on both sides of the first resistance layer 220 are continuously disposed, that is, the protrusion structures 221 are continuously disposed on both sides of the first resistance layer 220, so as to further improve the cross-sectional area of the first resistance layer 220, improve the ESD resistance of the first resistance layer 220, and further improve the anti-electrostatic breakdown capability of the embedded resistor.
Further, if the roughness height parameter Rz of the protruding structure 221 is set too high, the protruding structure 221 is easily broken by an external force during application, and the ESD resistance of the first resistance layer 220 is further affected, so the roughness Rz of the first resistance layer 220 is set to be in a range of 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer 220 is set to be greater than or equal to 20%. By defining the roughness height parameter Rz of the first resistance layer 220 to be 0.1 μm-10 μm and the range of the increase parameter Sdr of the surface area relative to the area of the defined area to be more than or equal to 20%, the continuous and tightly arranged protrusion structures 221 (the continuous and tightly arranged protrusion structures of all the areas are similar to a "fluff" structure) are obtained in all the areas on both sides of the first resistance layer 220 within a certain height range of the protrusion structures 221, so that the first resistance layer 220 with a larger cross section is obtained under the condition that the height parameter Rz of the roughness is certain, that is, under the condition that the protrusion structures 221 are not broken due to the external force, the ESD resistance of the first resistance layer 220 is improved, and the embedded resistance has a stronger anti-static breakdown capability.
Preferably, the roughness Rz of the first resistance layer 220 ranges from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer 220 ranges from 50% or more. By limiting the roughness height parameter Rz of the first resistance layer 220 to be 0.1 μm-10 μm and the range of the increase parameter Sdr of the surface area relative to the area of the defined area to be more than or equal to 50%, the continuous and more closely arranged convex structures 221 are obtained in all areas on both sides of the first resistance layer 220 within a certain height range of the convex structures 221, that is, the convex structures which are more closely arranged than the range of the roughness Sdr to be more than or equal to 20% are obtained, so that the cross section of the first resistance layer is further increased, the ESD resistance of the first resistance layer is further improved, and the embedded resistance is effectively ensured to have stronger anti-static breakdown capability.
More preferably, the roughness Rz of the first resistance layer 220 ranges from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer 220 ranges from 200% or more, so as to further increase the cross section of the first resistance layer, further improve the ESD resistance of the first resistance layer, and effectively ensure that the embedded resistor has excellent anti-electrostatic breakdown capability.
In some embodiments of the present invention, as shown in fig. 2A, 2B and 2C, the composite metal foil may further include a dielectric layer 230, the dielectric layer 230 being disposed on a side of the first resistive layer 220 away from the first conductive layer 210. The dielectric layer 230 may be made of resin adhesive, Polyimide (PI), or the like, and is used for protecting the first resistance layer 220 and preventing the first resistance layer 220 from being damaged by external force.
Further, the dielectric layer may be a single layer or a multi-layer structure, in a specific embodiment of the present invention, the dielectric layer 230 is a two-layer structure, both the two-layer structure of the dielectric layer 230 may be made of the same material, such as polyimide, or may be made of two different materials, such as a layer of resin adhesive and a layer of polyimide, in addition, in order to meet some specific requirements, a filler may be optionally disposed in the dielectric layer near the first resistance layer 220, so as to improve the bonding force between the dielectric layer and its adjacent layers, or some functional fillers, such as a thermal conductive filler, so as to conduct away heat generated on the resistance layer through the thermal conductive filler, effectively ensure that heat generated due to electrostatic impact can be quickly conducted out, improve the ESD resistance of the first resistance layer, and further effectively improve the antistatic breakdown capability of the embedded resistance device.
In some embodiments of the present invention, the first resistance layer 220 is formed on the dielectric layer 230, and a filler may be disposed in a sub-layer adjacent to the first resistance layer 220, so that the dielectric layer 230 has a concave-convex surface, so that when the first resistance layer 220 is formed on the concave-convex surface, the convex structures 221 may be formed on both sides of the first resistance layer 220 according to the concave-convex surface of the dielectric layer 230.
Specifically, the filler makes the dielectric layer 230 have a roughness in a range of 0.1 μm to 20 μm near the first resistance layer 220, and a roughness Sdr in a range of 0.5% or more.
In some embodiments of the present invention, first resistive layer 220 is formed on first conductive layer 210. The first conductive layer 210 may be processed in advance to form a concave-convex surface on the surface of the first conductive layer 210, so that when the first resistance layer 220 is formed on the concave-convex surface, the convex structures 221 may be formed on both sides of the first resistance layer 220 according to the concave-convex surface of the first conductive layer 210.
Fig. 3 is a schematic structural diagram of another composite metal foil according to an embodiment of the present invention, as shown in fig. 3, in this embodiment, the composite metal foil includes a first conductive layer 310 and a first resistive layer 320.
Specifically, the first conductive layer 310 has good conductive performance, and the material of the metal layer may be gold, silver, copper, or aluminum, or an alloy of at least two of them. The first resistance layer 320 is a key functional layer of the composite metal foil, and is used for realizing the resistance function of the composite metal foil. The material of the first resistance layer 320 may include at least one elemental metal of nickel, chromium, platinum, palladium, titanium, and/or an alloy including at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum. For example, a nickel-chromium alloy (NiCr) or a nickel-phosphorus alloy (NiP) having a low resistivity, or a chromium-silicon alloy (CrSi) having a high resistivity. In one embodiment of the present invention, the material of the first resistance layer 320 is nichrome. In some embodiments of the present invention, the first resistive layer 320 may be a single layer structure or at least a two-layer structure. Illustratively, the single-layer structure may be a single-layer structure composed of any one of nickel, chromium, platinum, palladium and titanium, or may be a single-layer structure composed of an alloy of at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum. Any layer in the at least two-layer structure can be a simple substance metal composed of any one of nickel, chromium, platinum, palladium and titanium, and can also be an alloy of at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum.
All areas of the first resistance layer are provided with raised structures, for example, as shown in fig. 3, all areas on both sides of the first resistance layer are provided with continuous raised structures 321, and the continuous raised structures 321 enable the first resistance layer 320 to form a continuous wavy and undulating structure. Since the whole surfaces of the two sides of the first resistance layer 320 are provided with the protruding structures 321, the sectional area of the first resistance layer 320 is further increased compared with the partial areas provided with the protruding structures 321, and the anti-electrostatic breakdown capability of the embedded resistor is improved.
Specifically, the roughness Rz of both sides of the first resistance layer 320 ranges from 0.1 μm or more, and the roughness Sdr ranges from 0.5% or more. It should be noted that, in the embodiment of the present invention, the roughness Rz of the two sides of the first resistance layer 320 may be the same or different, and the roughness Sdr of the two sides of the first resistance layer 320 may be the same or different, which is not limited herein. Preferably, the roughness Rz on both sides of the first resistance layer 320 ranges from 0.1 μm to 30 μm, including 0.1 μm and 30 μm, and may also take values of 1 μm, 5 μm, 8 μm, 9 μm, 10 μm, 15 μm, 20 μm, etc. on both sides of the first resistance layer 320. The roughness Sdr may range from 0.5% to 8000%, including 0.5% and 8000%, and may also take on values of 1%, 5%, 12%, 20%, 50%, 80%, 100%, 200%, 500%, 800%, 1500%, 2000%, 2500%, 3000%, 3500%, 4000%, 4500%, 5000%, 5500%, 6000%, 6500%, 7000%, 7500%, and the like.
In some embodiments of the present invention, as shown in fig. 3, the composite metal foil may further include a dielectric layer 330, the dielectric layer 330 being disposed on a side of the first resistive layer 320 away from the first conductive layer 310. The dielectric layer 330 may be made of resin adhesive, Polyimide (PI), or the like, and is used for protecting the first resistance layer 320 and preventing the first resistance layer 320 from being damaged by external force.
Further, the dielectric layer may be a single layer or at least two layers, in one embodiment of the present invention, the dielectric layer 330 has a two-layer structure, both the two-layer structure of the dielectric layer 330 may be made of the same material, such as polyimide, may also be made from two different materials, such as a layer of resin glue, a layer of polyimide, in any of these configurations, however, in order to meet specific requirements, a filler may be optionally disposed in the dielectric layer adjacent to the first resistive layer 320, so as to improve the bonding strength between the dielectric layer and its adjacent layers, or some functional fillers, such as thermal conductive fillers, can conduct heat generated on the resistance layer out through the thermal conductive fillers, effectively ensure that heat generated due to electrostatic impact can be quickly conducted out, improve the ESD resistance of the first resistance layer, and further effectively improve the anti-electrostatic breakdown capability of the embedded resistance device.
In some embodiments of the present invention, the first resistive layer 320 is formed on the dielectric layer 330, and a filler may be disposed in a sub-layer adjacent to the first resistive layer 320, so that the dielectric layer 330 has an undulating surface, so that the first resistive layer 320 may form an undulating structure according to the undulating surface of the dielectric layer 330.
Specifically, the filler makes the roughness of the dielectric layer 330 close to the first resistance layer 320 in the range of 0.1 μm to 20 μm, and the roughness Sdr in the range of 0.5% to 8000%.
In some embodiments of the present invention, first resistive layer 320 is formed on first conductive layer 310. The first conductive layer 310 may be previously processed to have an undulating surface on the first conductive layer 310, so that the first resistive layer 320 may form an undulating structure according to the undulating surface of the first conductive layer 310.
Furthermore, a second resistance layer and a second conductive layer are arranged on one side, far away from the first resistance layer, of the dielectric layer, and the second resistance layer is located between the dielectric layer and the second conductive layer. The materials and purposes of the second resistance layer and the first resistance layer can be the same or different, and the materials and purposes of the second conductive layer and the first conductive layer can be the same or different. In addition, the structure and parameters of the second resistance layer may be the same as those of the first resistance layer, and the structure and parameters of the second conductive layer may also be the same as those of the first conductive layer, which is not repeated herein.
Fig. 4A is a schematic structural diagram of another composite metal foil provided in the embodiment of the present invention, and fig. 4B is a schematic structural diagram of another composite metal foil provided in the embodiment of the present invention, as shown in fig. 4A and fig. 4B, the composite metal foil includes a first conductive layer 410, a first resistive layer 420, a dielectric layer 430, a second resistive layer 440, and a second conductive layer 450. The first resistance layer 420 is disposed on one side of the first conductive layer 410, and all areas on both sides of the first resistance layer 420 are provided with the protrusion structures 421, so that the whole surfaces on both sides of the first resistance layer 420 form a rough surface. The dielectric layer 430 is disposed on a side of the first resistive layer 420 away from the first conductive layer 410 and covers the protrusion 421. The materials of the first conductive layer, the first resistive layer, and the dielectric layer, the shape of the protrusion structure, and the roughness of the two sides of the first resistive layer are described in detail in the foregoing embodiments, and are not described herein again.
Second resistive layer 440 is disposed on a side of dielectric layer 430 distal from first resistive layer 420, and second conductive layer 450 is disposed on a side of second resistive layer 440 distal from dielectric layer 430. In an embodiment of the present invention, the materials and purposes of the second resistive layer 420 and the first resistive layer 440 are the same, and the materials and purposes of the second conductive layer 450 and the first conductive layer 410 are the same.
One or both sides of the second resistive layer 440 may be flat, or at least a portion of the second resistive layer may be provided with a protrusion structure, like the first resistive layer 420. For example, as shown in fig. 4A, two sides of the second resistance layer 440 are flat surfaces; as shown in fig. 4B, the protrusion structures 451 are disposed on the entire areas on both sides of the second resistive layer 440, and the protrusion structures 451 may refer to the protrusion structures on the first resistive layer 420 described in the foregoing embodiments of the present invention, which is not described herein again.
Fig. 5A is a flowchart of a method for manufacturing a composite metal foil according to an embodiment of the present invention, and as shown in fig. 5A, the method includes:
s501, providing a carrier layer.
Specifically, the carrier layer can be a polyacetamide substrate, a resin substrate or a glass substrate, and the carrier layer should have a flat surface to avoid the influence of the unevenness of the surface of the carrier layer on the roughness of the first conductive layer formed on the carrier layer.
And S502, forming a first conductive layer on one side of the carrier layer.
Specifically, the first conductive layer may be formed on one side of the carrier layer by physical vapor deposition, chemical vapor deposition, evaporation plating, sputter plating, electroplating, hybrid plating, and the like. The first conductive layer has good conductive performance, and the material of the metal layer can be gold, silver, copper or aluminum, or an alloy of at least two of the gold, silver, copper or aluminum.
Fig. 5B is a schematic diagram of forming a first conductive layer on a carrier layer according to an embodiment of the present invention, and as shown in fig. 5B, a first conductive layer 510 is formed on one side of the carrier layer 540.
In another embodiment, the carrier layer may not be used, and the first conductive layer may be directly formed.
S503, forming a concave-convex surface on at least partial area of one side of the first conducting layer far away from the carrier layer.
Specifically, the side of the first conductive layer away from the carrier layer may be roughened, and after the roughening, a concave-convex surface is formed in at least a partial region of the side of the first conductive layer away from the carrier layer. The roughening treatment process includes, but is not limited to, one or more of electroless plating, physical vapor deposition, chemical vapor deposition, evaporation plating, sputtering plating, electroplating, and hybrid plating.
Fig. 5C is a schematic diagram of forming a concave-convex surface on a side of the first conductive layer away from the carrier layer according to an embodiment of the present invention, and as shown in fig. 5C, the concave-convex surface is formed on the entire area of the side of the first conductive layer 510 away from the carrier layer 540.
It should be noted that the convex shape of the concave-convex surface may have a variety of shapes according to actual needs, and may be a regular or irregular solid geometry, and the embodiment of the present invention is not limited herein. In some examples, the convex surface may form a continuous undulating surface on the first resistance layer side, may form a more regular sine line shape on the first resistance layer side, or may form one or more of a sharp corner shape, an inverted cone shape, a granular shape, a dendritic shape, a columnar shape, a block shape, and an arc shape.
And S504, forming a first resistance layer on one side of the first conductive layer, which is far away from the carrier layer.
Specifically, the first resistance layer can be formed on the side of the first conductive layer away from the carrier layer by physical vapor deposition, chemical vapor deposition, evaporation plating, sputtering plating, electroplating, hybrid plating, and the like. The first resistance layer is a key functional layer of the composite metal foil and is used for realizing the resistance function of the composite metal foil. The material of the first resistance layer may include at least one elemental metal of nickel, chromium, platinum, palladium, titanium, and/or an alloy including a combination of at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum. For example, a nickel-chromium alloy (NiCr) or a nickel-phosphorus alloy (NiP) having a low resistivity, or a chromium-silicon alloy (CrSi) having a high resistivity, and the embodiments of the present invention are not limited thereto. In some embodiments of the present invention, the first resistive layer may be a single layer structure or at least a two-layer structure. Any layer can be made of any metal of nickel, chromium, platinum, palladium and titanium, or can be made of an alloy of at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum.
Since the first conductive layer has been formed with a concave-convex surface, the first resistive layer formed on the first conductive layer conforms to the convex structure formed on the first conductive layer. When the whole area of one side of the first conductive layer forms the concave-convex surface, the whole area of two sides of the first resistance layer is distributed to form the convex structure, and the convex structure comprises the condition that the first resistance layer forms a continuous wavy surface.
Fig. 5D is a schematic diagram of forming a first resistive layer on the first conductive layer according to an embodiment of the invention, and as shown in fig. 5D, the first resistive layer 520 is formed on a side of the first conductive layer 510 away from the carrier layer 540. The side of the first conductive layer 510 away from the carrier layer 540 forms a concave-convex surface, so that the convex structures 521 can be formed on both sides of the first resistance layer 520 according to the concave-convex surface, and the both sides of the first resistance layer 520 have a rough surface. In the embodiment of the present invention, the shape of the protruding structure 521 may have a variety according to actual needs, and may be a regular or irregular solid geometry, which is not limited herein. In some examples, the protruding structures may form a continuous undulating surface on both sides of the first resistance layer, may form a more regular sine line shape on both sides of the first resistance layer, or may form one or more of a pointed shape, an inverted cone shape, a granular shape, a dendritic shape, a columnar shape, and a block shape.
Specifically, the roughness Rz is in the range of 0.1 μm or more and the roughness Sdr is in the range of 0.5% or more on both sides of the first resistance layer 520. Preferably, the roughness Rz of both sides of the first resistance layer 520 ranges from 0.1 μm to 30 μm, including 0.1 μm and 30 μm, and the roughness Rz of both sides of the first resistance layer 520 may also take on the values of 1 μm, 5 μm, 8 μm, 9 μm, 10 μm, 15 μm, 20 μm, and the like. The roughness Sdr may range from 0.5% to 8000%, including 0.5% and 8000%, and may also take on values of 1%, 5%, 12%, 20%, 50%, 80%, 100%, 200%, 500%, 800%, 1500%, 2000%, 2500%, 3000%, 3500%, 4000%, 4500%, 5000%, 5500%, 6000%, 6500%, 7000%, 7500%, and the like.
Further, a dielectric layer may be formed on a side of the first resistance layer away from the first conductive layer.
Specifically, the dielectric layer is formed on the first resistance layer on the side away from the first conductive layer. The dielectric layer may be made of resin adhesive, Polyimide (PI), or other materials with certain buffering and shock-absorbing functions, and is used to protect the first resistance layer and prevent the first resistance layer from being damaged by external force. Specifically, the precursor solution of the dielectric layer may be formed on the side of the first resistance layer away from the first conductive layer by spraying or coating, so as to obtain the dielectric layer.
Fig. 5E is a schematic diagram of forming a dielectric layer on the first resistive layer according to the embodiment of the invention, and exemplarily, as shown in fig. 5E, a dielectric layer 530 is formed on a side of the first resistive layer 520 away from the first conductive layer 510.
Further, the dielectric layer may be a single-layer structure or at least a two-layer structure. In addition, in order to meet certain specific requirements, a filler can be arranged in the dielectric layer close to the first resistance layer so as to improve the bonding force between the dielectric layer and adjacent layers, or some functional fillers, such as thermal conductive fillers, can conduct heat generated on the resistance layer out through the thermal conductive fillers, effectively ensure that the heat generated due to electrostatic impact can be quickly conducted out, improve the ESD resistance of the first resistance layer, and further effectively improve the antistatic breakdown capacity of the embedded resistance device.
Further, the method further comprises: the carrier layer was peeled off.
Specifically, the carrier layer and the first conductive layer should have a suitable peel strength so that the carrier layer can be peeled off from the first conductive layer.
Furthermore, a second resistance layer and a second conductive layer are arranged on one side, far away from the first resistance layer, of the dielectric layer, and the second resistance layer is located between the dielectric layer and the second conductive layer. The materials and purposes of the second resistance layer and the first resistance layer can be the same or different, and the materials and purposes of the second conductive layer and the first conductive layer can be the same or different.
The preparation method of the composite metal foil provided by the embodiment of the invention comprises the following steps: providing a carrier layer, forming a first conductive layer on one side of the carrier layer, forming a concave-convex surface on at least partial region of one side of the first conductive layer far away from the carrier layer, forming a first resistance layer on one side of the first conductive layer far away from the carrier layer so as to form a convex structure on at least partial regions of two sides of the first resistance layer, forming a dielectric layer on one side of the first resistance layer far away from the first conductive layer, and finally peeling off the carrier layer. By the above method, the protrusion structures are formed on both sides of the first resistance layer. Due to the existence of the protruding structure, the sectional area of the first resistance layer is increased, the current-carrying capacity of the first resistance layer is improved, the ESD resistance of the first resistance layer is further improved, and the antistatic breakdown performance of the embedded resistor is further improved.
Fig. 6A is a flowchart of another method for manufacturing a composite metal foil according to an embodiment of the present invention, and as shown in fig. 6A, the method includes:
s601, providing a carrier layer.
Specifically, the carrier layer can be a polyacetamide substrate, a resin substrate or a glass substrate, and the carrier layer should have a flat surface to avoid the influence of the unevenness of the surface of the carrier layer on the roughness of the first conductive layer formed on the carrier layer.
S602, forming a first resistive layer on one side of the carrier layer.
Specifically, the first resistance layer may be formed on one side of the carrier layer by physical vapor deposition, chemical vapor deposition, evaporation plating, sputter plating, electroplating, hybrid plating, and the like. The first resistance layer is a key functional layer of the composite metal foil and is used for realizing the resistance function of the composite metal foil. Generally, the resistor can be made of different materials according to the requirements of different functions, and further has different resistance characteristics. For example, the material of the first resistance layer may include at least one elemental metal of nickel, chromium, platinum, palladium, and titanium, and/or an alloy of at least two combinations of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum, such as a nickel-chromium alloy (NiCr) or a nickel-phosphorus alloy (NiP) with low resistivity, or a chromium-silicon alloy (CrSi) with high resistivity, which is not limited herein. In some embodiments of the present invention, the first resistive layer may be a single layer structure or at least a two-layer structure. Any layer can be made of any metal of nickel, chromium, platinum, palladium and titanium, or can be made of an alloy of at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum.
Fig. 6B is a schematic diagram of forming a first resistive layer on a carrier layer according to an embodiment of the present invention, and as shown in fig. 6B, a first resistive layer 620 is formed on one side of the carrier layer 540.
And S603, forming a convex structure on at least partial region of the side, away from the carrier layer, of the first resistance layer.
Specifically, the side of the first resistance layer away from the carrier layer may be roughened, and after the roughening, a protruding structure is formed on at least a partial region of the side of the first resistance layer away from the carrier layer, so that at least a partial region of the side of the first resistance layer away from the carrier layer has a rough surface. The roughening treatment process includes, but is not limited to, one or more of electroless plating, physical vapor deposition, chemical vapor deposition, evaporation plating, sputtering plating, electroplating, and hybrid plating.
Fig. 6C is a schematic view of forming a protruding structure on a side of the first resistance layer away from the carrier layer according to an embodiment of the invention, as shown in fig. 6C, after the roughening treatment, the protruding structure is formed on the entire area of the side of the first resistance layer 620 away from the carrier layer 540, so that the side of the first resistance layer 620 away from the carrier layer 640 has a rough surface.
In the embodiment of the present invention, the shape of the protruding structure may have diversity according to actual needs, and may be a regular or irregular solid geometric shape, which is not limited herein. In some examples, the protruding structures may form a continuous undulating surface on the first resistance layer side, may form a more regular "sine line" shape on the first resistance layer side, or may form one or more of a pointed shape, an inverted cone shape, a granular shape, a dendritic shape, a columnar shape, and a block shape.
Specifically, the roughness Rz of the side of the first resistive layer 620 facing away from the carrier layer 640 ranges from 0.1 μm or more, and the roughness Sdr ranges from 0.5% or more. Preferably, the roughness Rz of the side of the first resistive layer 620 facing away from the carrier layer 640 ranges from 0.1 μm to 30 μm, including 0.1 μm and 30 μm, and may also take the values 1 μm, 5 μm, 8 μm, 9 μm, 10 μm, 15 μm, 20 μm, etc. on the side of the first resistive layer 620 facing away from the carrier layer 640. The roughness Sdr may range from 0.5% to 8000%, including 0.5% and 8000%, and may also take on values of 1%, 5%, 12%, 20%, 50%, 80%, 100%, 200%, 500%, 800%, 1500%, 2000%, 2500%, 3000%, 3500%, 4000%, 4500%, 5000%, 5500%, 6000%, 6500%, 7000%, 7500%, and the like.
And S604, forming a first conductive layer on the side, away from the carrier layer, of the first resistance layer.
Specifically, the first conductive layer may be formed on a side of the first resistance layer away from the carrier layer by physical vapor deposition, chemical vapor deposition, evaporation plating, sputter plating, electroplating, hybrid plating, and the like. The first conductive layer may have good conductive performance, and the material of the metal layer may be gold, silver, copper, or aluminum, or an alloy of at least two of them, or the like.
Fig. 6D is a schematic diagram of forming a first conductive layer on the first resistance layer according to the embodiment of the invention, and as shown in fig. 6D, the first conductive layer 610 is formed on a side of the first resistance layer 620 away from the carrier 640.
S605, peeling the carrier layer.
Specifically, the carrier and the first resistance layer should have a suitable peel strength so that the carrier can be peeled off from the first resistance layer.
Fig. 6E is a schematic diagram of the carrier after being peeled off, as shown in fig. 6E, after the carrier is peeled off, the remaining stacked structure includes a first resistance layer 620 and a first conductive layer 610, and a protruding structure 621 is formed on one side of the first resistance layer 620 close to the first conductive layer 610.
And S606, forming a convex structure on at least a partial region of one side of the first resistance layer far away from the first conductive layer.
Specifically, the side of the first resistance layer away from the first conductive layer may be roughened, and after the roughening treatment, a protruding structure is formed in at least a partial region of the side of the first resistance layer away from the first conductive layer, so that at least a partial region of the side of the first resistance layer away from the first conductive layer has a rough surface. Thus, the protruding structures are formed on both sides of the first resistance layer. The roughening treatment process includes, but is not limited to, one or more of electroless plating, physical vapor deposition, chemical vapor deposition, evaporation plating, sputtering plating, electroplating, and hybrid plating.
Fig. 6F is a schematic diagram of forming a protruding structure on a side of the first resistive layer away from the carrier according to an embodiment of the present invention, and as shown in fig. 6F, a protruding structure 622 is formed on an entire area of a side of the first resistive layer 620 away from the first conductive layer 610, so that a side of the first resistive layer 620 away from the carrier layer 640 has a rough surface.
In the embodiment of the present invention, the shape of the protruding structure may have diversity according to actual needs, and may be a regular or irregular solid geometric shape, which is not limited herein. In some examples, the protruding structures may form a continuous undulating surface on the first resistance layer side, may form a more regular "sine line" shape on the first resistance layer side, or may form one or more of a pointed shape, an inverted cone shape, a granular shape, a dendritic shape, a columnar shape, and a block shape.
Specifically, the roughness Rz of the first resistance layer 620 on the side away from the first conductive layer 610 ranges from 0.1 μm or more, and the roughness Sdr ranges from 0.5% or more. Preferably, the roughness Rz of the side of the first resistance layer 620 away from the first conductive layer 610 ranges from 0.1 μm to 30 μm, including 0.1 μm and 30 μm, and the roughness Rz of the side of the first resistance layer 620 away from the first conductive layer 610 can also take on the values of 1 μm, 5 μm, 8 μm, 9 μm, 10 μm, 15 μm, 20 μm, and the like. The roughness Sdr may range from 0.5% to 8000%, including 0.5% and 8000%, and may also take on values of 1%, 5%, 12%, 20%, 50%, 80%, 100%, 200%, 500%, 800%, 1500%, 2000%, 2500%, 3000%, 3500%, 4000%, 4500%, 5000%, 5500%, 6000%, 6500%, 7000%, 7500%, and the like.
Further, a dielectric layer may be formed on a side of the first resistance layer away from the first conductive layer.
Specifically, the dielectric layer is formed on the side of the first resistance layer away from the first conductive layer. The dielectric layer may be made of resin adhesive, Polyimide (PI), or other materials with certain buffering and shock-absorbing functions, and is used to protect the first resistance layer and prevent the first resistance layer from being damaged by external force. Specifically, the precursor solution of the dielectric layer may be formed on the side of the first resistance layer away from the first conductive layer by spraying or coating, so as to obtain the dielectric layer.
Fig. 6G is a schematic diagram of forming a dielectric layer on the first resistive layer according to an embodiment of the present invention, and exemplarily, as shown in fig. 6G, the dielectric layer 630 is formed on a side of the first resistive layer 620 away from the first conductive layer 610.
Further, the dielectric layer may be a single-layer structure or at least a two-layer structure. For example, the dielectric layer has a two-layer structure, and the two-layer structure of the dielectric layer may be made of the same material, such as polyimide, or may be made of two different materials, such as a layer of resin adhesive and a layer of polyimide, however, in any structure, in order to meet some specific requirements, it may be selected to set a filler in the layer of the dielectric layer close to the first resistance layer so as to improve the bonding force between the dielectric layer and its adjacent layers, or some functional fillers, such as thermal conductive fillers, so as to conduct away heat generated on the resistance layer through the thermal conductive filler, thereby effectively ensuring that heat generated due to electrostatic impact can be quickly conducted away, improving the ESD resistance of the first resistance layer, and further effectively improving the anti-static breakdown capability of the embedded resistor device.
Furthermore, a second resistance layer and a second conductive layer are arranged on one side, far away from the first resistance layer, of the dielectric layer, and the second resistance layer is located between the dielectric layer and the second conductive layer. The materials and purposes of the second resistance layer and the first resistance layer can be the same or different, and the materials and purposes of the second conductive layer and the first conductive layer can be the same or different.
Fig. 7A is a flowchart of another method for manufacturing a composite metal foil according to an embodiment of the present invention, as shown in fig. 7A, the method includes:
s701, providing a carrier layer, wherein one side surface of the carrier layer is provided with a rough surface.
Specifically, the carrier layer may be a substrate of polyacetamide, a resin or a glass, and one side of the carrier layer has an uneven rough surface.
S702, forming a first resistance layer on the rough surface of the carrier layer.
Specifically, the first resistance layer may be formed on the rough surface of the carrier layer by physical vapor deposition, chemical vapor deposition, evaporation plating, sputter plating, electroplating, hybrid plating, and the like. The first resistance layer is a key functional layer of the composite metal foil and is used for realizing the resistance function of the composite metal foil. The material of the first resistance layer may include at least one elemental metal of nickel, chromium, platinum, palladium, titanium, and/or an alloy including a combination of at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum. For example, a nickel-chromium alloy (NiCr) or a nickel-phosphorus alloy (NiP) having a low resistivity, or a chromium-silicon alloy (CrSi) having a high resistivity, and the embodiments of the present invention are not limited thereto. In some embodiments of the present invention, the first resistive layer may be a single layer structure or at least a two-layer structure. Any layer can be made of any metal of nickel, chromium, platinum, palladium and titanium, or can be made of an alloy of at least two of nickel, chromium, platinum, palladium, titanium, silicon, phosphorus and aluminum.
Because the carrier layer is already formed with the concave-convex surface, the carrier layer is used as a substrate, and the first resistance layer is very thin, so that the first resistance layer formed on the carrier layer can be conformed to form a convex structure. When the whole area of one side of the carrier layer forms the concave-convex surface, the whole area of two sides of the first resistance layer is distributed to form the convex structure, and the convex structure comprises the condition that the first resistance layer forms a continuous wavy and undulating surface.
Fig. 7B is a schematic diagram of forming a first resistance layer on a carrier layer according to an embodiment of the present invention, and as shown in fig. 7B, a first resistance layer 720 is formed on a rough surface of a carrier layer 740. When the first resistance layer 720 is formed on the surface of the concave-convex portion, the convex structures 721 are formed on both sides of the first resistance layer 720 because the first resistance layer 720 is thin, so that both sides of the first resistance layer 720 have rough surfaces. In the embodiment of the present invention, the shape of the protruding structure 721 may have a variety according to actual needs, and may be a regular or irregular solid geometry, which is not limited herein. In some examples, the protruding structures may form a continuous undulating surface on both sides of the first resistance layer, may form a more regular sine line shape on both sides of the first resistance layer, or may form one or more of a pointed shape, an inverted cone shape, a granular shape, a dendritic shape, a columnar shape, and a block shape. Illustratively, as shown in fig. 7B, one side of the carrier layer 740 comprises a plurality of continuous undulating surfaces, and thus, the resulting first resistive layer 720 comprises a plurality of continuous undulating structures such that both sides of the first resistive layer form the raised structures 521.
Specifically, the roughness Rz is in the range of 0.1 μm or more and the roughness Sdr is in the range of 0.5% or more on both sides of the first resistance layer 720. Preferably, the roughness Rz of the two sides of the first resistance layer 720 ranges from 0.1 μm to 30 μm, including 0.1 μm and 30 μm, and the roughness Rz of the two sides of the first resistance layer 720 may also take the values of 1 μm, 5 μm, 8 μm, 9 μm, 10 μm, 15 μm, 20 μm, and the like. The roughness Sdr may range from 0.5% to 8000%, including 0.5% and 8000%, and may also take on values of 1%, 5%, 12%, 20%, 50%, 80%, 100%, 200%, 500%, 800%, 1500%, 2000%, 2500%, 3000%, 3500%, 4000%, 4500%, 5000%, 5500%, 6000%, 6500%, 7000%, 7500%, and the like.
And S703, forming a first conductive layer on the side of the first resistance layer far away from the carrier layer.
Specifically, the first conductive layer may be formed on a side of the first resistance layer away from the carrier by physical vapor deposition, chemical vapor deposition, evaporation plating, sputtering plating, electroplating, hybrid plating, or the like. The first conductive layer may have good conductive performance, and the material of the metal layer may be gold, silver, copper, or aluminum, or an alloy of at least two of them, or the like.
Fig. 7C is a schematic diagram of forming a first conductive layer on the first resistive layer according to an embodiment of the invention, and as shown in fig. 7C, the first conductive layer 710 is formed on a side of the first resistive layer 720 away from the carrier 640.
Further, the method further comprises: the carrier layer was peeled off.
In particular, the carrier layer and the first resistive layer should have a suitable peel strength such that the carrier layer can be peeled off from the first resistive layer.
Fig. 7D is a schematic diagram of the carrier peeled off according to the embodiment of the invention, as shown in fig. 7D, after the carrier is peeled off, the remaining stacked structure includes a first resistance layer 720 and a first conductive layer 710, and protruding structures 721 are formed on both sides of the first resistance layer 720.
Further, a dielectric layer may be formed on a side of the first resistance layer away from the first conductive layer.
Specifically, the dielectric layer is formed on the side of the first resistance layer away from the first conductive layer. The dielectric layer can be made of resin adhesive, Polyimide (PI) and other materials with certain buffering and shock absorption functions, and is used for protecting the first resistance layer and preventing the first resistance layer from being damaged by external force. Specifically, the precursor solution of the dielectric layer may be formed on the side of the first resistance layer away from the first conductive layer by spraying or coating, so as to obtain the dielectric layer.
Fig. 7E is a schematic diagram of forming a dielectric layer on the first resistive layer according to the embodiment of the invention, and exemplarily, as shown in fig. 7E, the dielectric layer 730 is formed on the side of the first resistive layer 720 far from the first conductive layer 710.
Further, the dielectric layer may be a single-layer structure or at least a two-layer structure. For example, the dielectric layer has a two-layer structure, and the two-layer structure of the dielectric layer may be made of the same material, such as polyimide, or may be made of two different materials, such as a layer of resin adhesive and a layer of polyimide, however, in any structure, in order to meet some specific requirements, it may be selected to set a filler in the layer of the dielectric layer close to the first resistance layer so as to improve the bonding force between the dielectric layer and its adjacent layers, or some functional fillers, such as thermal conductive fillers, so as to conduct away heat generated on the resistance layer through the thermal conductive filler, thereby effectively ensuring that heat generated due to electrostatic impact can be quickly conducted away, improving the ESD resistance of the first resistance layer, and further effectively improving the anti-static breakdown capability of the embedded resistor device.
Furthermore, a second resistance layer and a second conductive layer are arranged on one side, far away from the first resistance layer, of the dielectric layer, and the second resistance layer is located between the dielectric layer and the second conductive layer. The materials and purposes of the second resistance layer and the first resistance layer can be the same or different, and the materials and purposes of the second conductive layer and the first conductive layer can be the same or different.
The embodiment of the invention also provides a circuit board which comprises the composite metal foil provided by any embodiment of the invention.
The circuit board provided by the embodiment of the invention has the corresponding functions and beneficial effects with the composite metal foil provided by the embodiment of the invention.
In the description herein, it is to be understood that the terms "upper", "lower", "left", "right", and the like are used in a descriptive sense or positional relationship based on the orientation or positional relationship shown in the drawings for convenience in description and simplicity of operation, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus are not to be construed as limiting the present invention.
In the description herein, references to the description of "an embodiment," "an example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be appropriately combined to form other embodiments as will be appreciated by those skilled in the art.
The technical principle of the present invention is described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without inventive effort, which would fall within the scope of the present invention.

Claims (16)

1. A composite metal foil, comprising: a first conductive layer and a first resistive layer;
the first resistance layer is arranged on one side of the first conducting layer;
at least partial areas of one side of the first resistance layer close to the first conducting layer and one side of the first resistance layer far away from the first conducting layer are provided with protruding structures.
2. The composite metal foil according to claim 1, wherein the roughness Rz of the first resistive layer on the side closer to the first conductive layer and the side farther from the first conductive layer each ranges from 0.1 μ ι η to 30 μ ι η.
3. The composite metal foil as claimed in claim 1, wherein the roughness Sdr ranges from both the side of the first resistance layer closer to the first conductive layer and the side farther from the first conductive layer by 0.5% or more.
4. The composite metal foil as claimed in claim 1, wherein all areas of the side of the first resistive layer close to the first conductive layer and the side far from the first conductive layer are provided with a raised structure.
5. The composite metal foil according to claim 1, wherein at least partial areas of a side of the first resistive layer adjacent to the first conductive layer and a side thereof remote from the first conductive layer are provided with a plurality of continuous raised structures.
6. The composite metal foil as claimed in claim 5, wherein the first resistive layer is provided with a plurality of continuous raised structures over all areas of a side thereof close to the first conductive layer and a side thereof remote from the first conductive layer.
7. The composite metal foil according to claim 1, 4, 5 or 6, wherein the roughness Rz of the first resistance layer on the side close to the first conductive layer and the roughness Sdr of the first resistance layer on the side far from the first conductive layer both range from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer on the side close to the first conductive layer and the roughness Sdr of the first resistance layer on the side far from the first conductive layer both range from 20% or more.
8. The composite metal foil according to claim 1, 4, 5 or 6, wherein the roughness Rz of the first resistance layer on the side close to the first conductive layer and the roughness Sdr of the first resistance layer on the side far from the first conductive layer both range from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer on the side close to the first conductive layer and the roughness Sdr of the first resistance layer on the side far from the first conductive layer both range from 50% or more.
9. The composite metal foil according to claim 1, 4, 5 or 6, wherein the roughness Rz of the first resistance layer on the side close to the first conductive layer and the roughness Sdr of the first resistance layer on the side far from the first conductive layer both range from 0.1 μm to 10 μm, and the roughness Sdr of the first resistance layer on the side close to the first conductive layer and the roughness Sdr of the first resistance layer on the side far from the first conductive layer both range from 200% or more.
10. The composite metal foil of any one of claims 1-6, further comprising at least one dielectric layer disposed on a side of said first resistive layer remote from said first conductive layer.
11. The composite metal foil of claim 10, wherein a side of the dielectric layer remote from the first resistive layer is provided with a second resistive layer and a second conductive layer, the second resistive layer being located between the dielectric layer and the second conductive layer.
12. The composite metal foil as claimed in claim 1, wherein at least a portion of the first conductive layer on a side thereof adjacent to the first resistive layer is formed with a concave-convex surface, so that at least a portion of the first resistive layer on a side thereof adjacent to the first conductive layer and a side thereof away from the first conductive layer are formed with the convex structure.
13. The composite metal foil as claimed in claim 1, wherein the first resistive layer has a continuous raised structure on both the side close to the first conductive layer and the side far from the first conductive layer, so that the first resistive layer forms a continuous wave structure.
14. The composite metal foil according to any one of claims 1 to 6, wherein the material of the first resistance layer comprises at least one elemental metal selected from nickel, chromium, platinum, palladium, and titanium, and/or an alloy comprising a combination of at least two selected from nickel, chromium, platinum, palladium, titanium, silicon, phosphorus, and aluminum.
15. The composite metal foil of claim 14, wherein said first resistive layer is a single layer structure or an at least two layer structure.
16. A circuit board comprising the composite metal foil as claimed in any one of claims 1 to 15.
CN202011301299.6A 2020-11-19 2020-11-19 Composite metal foil and circuit board Pending CN114521042A (en)

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US3691007A (en) * 1969-08-14 1972-09-12 Mica Corp The Printed circuit board fabrication by electroplating a surface through a porous membrane
US6489035B1 (en) * 2000-02-08 2002-12-03 Gould Electronics Inc. Applying resistive layer onto copper
CN1514449A (en) * 2002-10-18 2004-07-21 希普雷公司 Electric resistance material
JP3954958B2 (en) * 2002-11-26 2007-08-08 古河テクノリサーチ株式会社 Copper foil with resistive layer and circuit board material with resistive layer
JP5448616B2 (en) * 2009-07-14 2014-03-19 古河電気工業株式会社 Copper foil with resistance layer, method for producing the copper foil, and laminated substrate

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