CN114490036A - Extensible distributed redundancy unmanned aerial vehicle intelligent flight control computer - Google Patents
Extensible distributed redundancy unmanned aerial vehicle intelligent flight control computer Download PDFInfo
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Abstract
The invention discloses an extensible distributed type redundancy unmanned aerial vehicle intelligent flight control computer, wherein a distributed system adopts a hardware similarity redundancy form and consists of a redundancy flight control module node taking an XCZU7EV device as a carrier, a redundancy comprehensive information processing intelligent calculation module node taking an XCZU7EV device as a carrier and a group of two-channel FlexRay redundancy time trigger buses. And a time-sharing partition mapping strategy based on task division is adopted to efficiently map the multiple tasks, distribute intelligent processing strongly related to control laws and decisions to a flight control module, and distribute intelligent processing related to intelligent perception to an intelligent redundancy comprehensive information processing calculation module. The method provides and realizes an open type and integrated information processing integrated design method, realizes integrated information processing of flight control, navigation calculation and atmospheric data calculation, and provides and applies a fault-tolerant design method based on dual-core self-monitoring to prevent the occurrence of Byzantine faults.
Description
Technical Field
The invention belongs to the technical field of computers, and particularly relates to an intelligent flight control computer for an unmanned aerial vehicle.
Background
In the field of aviation computers, redundancy fault-tolerant design technology is generally adopted to improve the reliability and fault-tolerant capability of a flight control system, and dual-redundancy computers and triple-redundancy computers are common. In a flight control system based on event triggering, the currently disclosed flight control computer usually performs node fault tolerance design based on the limited number of nodes, has poor expandability, and cannot support large-data-volume calculation and transmission processing of intelligent calculation nodes of a neural network due to the lack of support for intelligent calculation and limited bandwidth limitation; in a flight control system based on time triggering, on one hand, the support of an elastic expandability fault-tolerant architecture is lacked, and on the other hand, the support of a hardware architecture for intelligent flight control is lacked, so that the flight control information processing and calculation of a neural network which is more and more mature cannot be adapted.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides an intelligent flight control computer of an extensible distributed redundancy unmanned aerial vehicle, wherein a distributed system adopts a hardware-similar redundancy form and consists of a redundancy flight control module node taking an XCZU7EV device as a carrier, a redundancy comprehensive information processing intelligent calculation module node taking an XCZU7EV device as a carrier and a group of two-channel FlexRay redundancy time trigger buses. And a time-sharing partition mapping strategy based on task division is adopted to efficiently map the multiple tasks, distribute intelligent processing strongly related to control laws and decisions to a flight control module, and distribute intelligent processing related to intelligent perception to an intelligent redundancy comprehensive information processing calculation module. The method provides and realizes an open type and integrated information processing integrated design method, realizes integrated information processing of flight control, navigation calculation and atmospheric data calculation, and provides and applies a fault-tolerant design method based on dual-core self-monitoring to prevent the occurrence of Byzantine faults.
The technical scheme adopted by the invention for solving the technical problems is as follows:
an extensible distributed redundancy unmanned aerial vehicle intelligent flight control computer comprises two double-channel FlexRay buses, m flight control modules, n comprehensive information processing intelligent calculation modules, an extensible redundancy node configuration module and a redundancy power supply module;
each flight control module is respectively connected with two double-channel FlexRay buses; each flight control module is connected with the unmanned aerial vehicle sensing module and receives data of the unmanned aerial vehicle sensor; the flight control module realizes the functions of flight control law calculation, intelligent flight control information calculation, intelligent decision information calculation and aircraft platform management, and the control law and decision information are resolved by using the management result;
each comprehensive information processing intelligent computing module is respectively connected with two double-channel FlexRay buses; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle sensing module and receives data of the unmanned aerial vehicle sensor; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle airborne equipment, receives state data of the unmanned aerial vehicle airborne equipment and outputs control instructions to the unmanned aerial vehicle airborne equipment; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle servo system and outputs a control instruction to the unmanned aerial vehicle servo system; the integrated information processing intelligent computing module realizes redundancy management, sensor information resolving and intelligent sensing information resolving of input and output data of a flight control computer;
the double-channel FlexRay bus is used for data cross-linking among functional nodes of the flight control computer, and ensures the information transmission among each flight control module and each information processing intelligent computing module;
the extensible redundancy node configuration module is respectively connected with the two double-channel FlexRay buses and is used for redundancy node configuration and FlexRay bus parameter configuration of the multi-redundancy flight control computer;
the power supply module supplies power to each module of the flight control computer;
the flight control module takes an XCZU7EV device of UltraScale + MPSoC series of Xilinx company as a core resolving chip; the peripheral equipment and the circuit of the flight control module comprise an external memory and an external interface circuit; the external memory comprises DDR, MRAM, NORFlash, SDRAM and FlashROM; the external interface circuit comprises an RS485 bus, an RS232 bus, an RS422 bus, a data recording bus, an LVDS cross transmission bus and a FlexRay synchronous bus;
the flight control modules are connected through a FlexRay synchronous bus, when one flight control module initiates a synchronous signal, the other flight control modules receive the synchronous signal, the single-side delay from the input of a sending driver to the output of a receiving driver is not more than 10us, and the inter-channel asynchronization degree is not more than 20 mu s;
the comprehensive information processing intelligent computing module takes an UltraScale + MPSoC series XCZU7EV device of Xilinx company as a core resolving chip; the peripheral equipment and the circuit of the comprehensive information processing intelligent computing module comprise an external memory and an external interface circuit; the external memory comprises DDR, MRAM, NORFlash, SDRAM and FlashROM; the external interface circuit comprises an RS485 bus, an RS232 bus, an RS422 bus, a data recording bus, an LVDS cross transmission bus and a FlexRay synchronous bus; the comprehensive information processing intelligent computing module also comprises a discrete quantity output module which is used for outputting discrete control signals;
when one intelligent computation module initiates synchronization, the other intelligent computation modules receive the synchronous signal, the synchronous signal adopts TTL differential level, the unilateral delay is not more than 10us, and the asynchronism between channels is not more than 20 mus.
Preferably, m is 3 and n is 3.
Preferably, the unmanned aerial vehicle sensing module includes intelligent flight control information sensor, intelligent decision information sensor, redundancy inertial sensor, redundancy atmospheric sensor, intelligent perception information sensor, redundancy phase height sensor, etc.
Preferably, the unmanned aerial vehicle airborne equipment comprises engine control equipment, remote control and telemetry equipment and electrical equipment.
Preferably, the drone servo system comprises k servo controllers.
The invention has the following beneficial effects:
1. the distributed redundancy flight control computer system of the unmanned aerial vehicle is constructed based on a FlexRay time trigger bus and an XCZU7EV device, the system adopts a hardware-similar redundancy form, and is subjected to system synchronization design, redundancy management design, and open/integrated redundancy unmanned aerial vehicle information processing integrated node design integrating flight control, navigation calculation and atmospheric data calculation, so that the distribution and the expansibility of the system are effectively improved.
2. The invention adopts a time-sharing partition mapping strategy based on task partition to specifically partition the multiple tasks of the intelligent flight control computer of the unmanned aerial vehicle, such as flight task management, air route planning, redundancy management, flight control law calculation, information interaction, neural network algorithm processing and the like, performs multi-task efficient mapping aiming at the multi-core heterogeneous processor, meets the complex characteristics of the multiple tasks of the unmanned aerial vehicle system, and effectively solves the problems of information interaction between the multi-core heterogeneous processor and processor platform management by utilizing a storage control unit, a platform management unit, a configuration safety unit and the like, thereby effectively improving the efficiency and reliability of the system.
3. The intelligent processing method of the intelligent flight control information sensor, the intelligent decision information sensor and the intelligent processing process of the intelligent sensing information sensor are decoupled, the intelligent processing strongly related to the control law and the decision is distributed to the redundancy flight control module board, the intelligent processing strongly related to the intelligent sensing is distributed to the redundancy comprehensive information processing intelligent calculation module board, the priority requirement characteristics of the extensible distributed unmanned aerial vehicle intelligent flight control computer on various types of intelligent calculation tasks are met, and the intelligence and the autonomy of the system are effectively improved.
Drawings
Fig. 1 is a diagram of an extensible distributed redundancy unmanned aerial vehicle intelligent flight control computer architecture according to the present invention.
Fig. 2 is an architecture diagram of the expandable distributed redundancy unmanned aerial vehicle intelligent flight control computer with the addition of an external module.
FIG. 3 is a flight control module architecture diagram of the present invention.
FIG. 4 is a block diagram of an XCZU7EV multitasking, time-sharing partition mapping in accordance with the present invention.
FIG. 5 is a diagram of an integrated information processing intelligent computing module architecture according to the present invention.
FIG. 6 is a diagram of a system configuration of the single redundancy integrated information processing intelligent computing module according to the present invention.
FIG. 7 is a diagram of an extensible distributed redundancy UAV intelligent flight control computer monitoring/voting surface setup of the present invention
Detailed Description
The invention is further illustrated with reference to the following figures and examples.
As shown in fig. 1, an extensible distributed redundancy unmanned aerial vehicle intelligent flight control computer includes two dual-channel FlexRay buses, m flight control modules, n comprehensive information processing intelligent calculation modules, an extensible redundancy node configuration module, and a redundancy power supply module;
each flight control module is respectively connected with two double-channel FlexRay buses; each flight control module is connected with the unmanned aerial vehicle sensing module and receives data of the unmanned aerial vehicle sensor; the flight control module realizes the functions of flight control law calculation, intelligent flight control information calculation, intelligent decision information calculation and aircraft platform management, and the control law and decision information are resolved by using the management result;
each comprehensive information processing intelligent computing module is respectively connected with two double-channel FlexRay buses; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle sensing module and receives data of the unmanned aerial vehicle sensor; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle airborne equipment, receives state data of the unmanned aerial vehicle airborne equipment and outputs control instructions to the unmanned aerial vehicle airborne equipment; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle servo system and outputs a control instruction to the unmanned aerial vehicle servo system; the integrated information processing intelligent computing module realizes redundancy management, sensor information resolving and intelligent sensing information resolving of input and output data of a flight control computer;
the double-channel FlexRay bus is used for data cross-linking among functional nodes of the flight control computer, and ensures the information transmission among each flight control module and each information processing intelligent computing module;
the extensible redundancy node configuration module is respectively connected with the two double-channel FlexRay buses and is used for redundancy node configuration and FlexRay bus parameter configuration of the multi-redundancy flight control computer;
the power supply module supplies power to each module of the flight control computer;
the flight control module takes an XCZU7EV device of UltraScale + MPSoC series of Xilinx company as a core resolving chip; the peripheral equipment and the circuit of the flight control module comprise an external memory and an external interface circuit; the external memory comprises DDR, MRAM, NORFlash, SDRAM and FlashROM; the external interface circuit comprises an RS485 bus, an RS232 bus, an RS422 bus, a data recording bus, an LVDS cross transmission bus and a FlexRay synchronous bus;
the flight control modules are connected through a FlexRay synchronous bus, when one flight control module initiates a synchronous signal, the other flight control modules receive the synchronous signal, the single-side delay from the input of a sending driver to the output of a receiving driver is not more than 10us, and the inter-channel asynchronization degree is not more than 20 mu s;
the comprehensive information processing intelligent computing module takes an UltraScale + MPSoC series XCZU7EV device of Xilinx company as a core resolving chip; the peripheral equipment and the circuit of the comprehensive information processing intelligent computing module comprise an external memory and an external interface circuit; the external memory comprises DDR, MRAM, NORFlash, SDRAM and FlashROM; the external interface circuit comprises an RS485 bus, an RS232 bus, an RS422 bus, a data recording bus, an LVDS cross transmission bus and a FlexRay synchronous bus; the comprehensive information processing intelligent computing module also comprises a discrete quantity output module which is used for outputting discrete control signals;
when one intelligent computation module initiates synchronization, the other intelligent computation modules receive the synchronous signal, the synchronous signal adopts TTL differential level, the unilateral delay is not more than 10us, and the asynchronism between channels is not more than 20 mus.
The specific embodiment is as follows:
to the expandable demand of redundancy node elasticity and the intelligent calculation demand of neural network of unmanned aerial vehicle in the aspect of flight control, this embodiment discloses an unmanned aerial vehicle intelligent flight control computer platform based on expandable distributed redundancy structural design. The distributed system adopts a dual-channel FlexRay bus to form a redundancy flight control computer system based on dual-channel redundancy time trigger bus interconnection. As shown in fig. 2, the system mainly comprises 2 dual-channel FlexRay buses, m flight control modules, n comprehensive information processing intelligent computing modules, 1 expandable redundancy node configuration module and 1 redundancy power supply module; the external sensor module comprises an intelligent flight control information sensor, an intelligent decision information sensor, a redundancy inertial sensor, a redundancy atmospheric sensor, an intelligent perception information sensor, a redundancy phase height sensor and the like; the airborne equipment module comprises engine control equipment, remote control and remote measuring equipment, electrical equipment and the like; the servo system module includes k servo controllers.
In the distributed redundancy flight control computer, redundancy flight control module nodes realize the functions of flight control law calculation, intelligent flight control information calculation, intelligent decision information calculation and aircraft platform management, and the redundancy management results are utilized to solve the control law and decision information; redundancy management, partial sensor information resolving and intelligent sensing information resolving of input and output data (including digital quantity, analog quantity, discrete quantity and frequency quantity) of a flight control computer are realized by a redundancy comprehensive information processing intelligent computing module node; the dual-channel FlexRay bus is used for data cross-linking among functional nodes of the distributed system; the Flexray bus can ensure the internal information transmission of each flight control module and each comprehensive information processing intelligent computing module; and aiming at the redundant flight control module nodes, a CCDL bus is reserved for partial information interaction, so that the information flow directions of different categories are clearer. The flight control computer outputs external instructions in a master/backup mode, wherein the comprehensive information processing intelligent computing module 1 is a master node, the rest nodes are backup nodes, and the self-monitoring result of the comprehensive information processing intelligent computing module is used as a judgment condition. When all redundancy comprehensive information processing intelligent computing modules are normal, the main node outputs instruction information outwards, when the main node fails to work, the instruction output is cut off, and the system is degraded to output instruction information by the backup node.
The extensible distributed redundancy unmanned aerial vehicle intelligent flight control computer adopts an N + N structure, takes a 3+3 form as a realization carrier, and can perform hardware system extension according to the structure form and the distributed redundancy system structure provided in the figure 2. The flight control computer can collect various external discrete quantity and analog quantity inputs and output discrete quantity and analog quantity control signals according to requirements. The specific hardware comprises three flight control module boards, three comprehensive information processing intelligent calculation module boards, a power supply board and the like, and the hardware is inserted into the chassis in a plug-in mode to form a complete whole. Specific functions of the intelligent flight control computer of the extensible distributed redundancy unmanned aerial vehicle comprise: the method comprises the following steps of Flexray/LVDS/422/485/232 bus communication, intelligent neural network calculation, discrete quantity input/output, analog quantity input/output, communication between flight control modules, intelligent comprehensive information processing calculation module redundancy output selection, communication fault logic management, expandable redundancy node configuration, redundancy power module management and the like.
The single-redundancy flight control module board takes an UltraScale of Xilinx company and an XCZU7EV device of MPSoC series as a core resolving chip, is mainly used for realizing airline binding, guidance, control law resolving and the like of the whole flight control system, and is a core module of a flight control computer. The working process is described as follows: the control input module collects sensor signals of analog quantity, discrete quantity, digital quantity and the like, realizes cross transmission, simultaneously performs redundancy management, solves a control law by using a redundancy management result, finally outputs an instruction signal for voting, and controls an external interface to complete control surface action control. The functional modules of the single redundancy flight control module board are shown in fig. 3.
The flight control function module board comprises a processor system, a programmable logic system, peripheral equipment and a circuit. The processor system comprises an application processing unit, a real-time processing unit, a storage control unit, a platform management unit, a configuration safety unit, a system function unit, a high-speed interface unit and a general interface unit; the programmable logic system comprises intelligent computing logic, system watchdog logic, a cross channel data link, channel fault logic, channel hard wire synchronization, debugging loading logic and a FlexRay bus interface unit. The flight control function module board multitask function time-sharing partition mapping block diagram is shown in FIG. 4.
The application processing unit executes flight task management and route planning, the real-time processing unit executes tasks such as redundancy management and flight control law calculation, the high-speed interface unit and the universal interface unit are used for information interaction between redundancy channels and between the processor and the comprehensive information processing intelligent computing module unit, the storage control unit, the platform management unit and the configuration safety unit are used for information interaction between multi-core heterogeneous processor cores and processor platform management, and the programmable logic system is used for realizing various intelligent processing and processing logic related functions. Aiming at the flight control function module, intelligent processing in the programmable logic system comprises intelligent flight control information calculation and intelligent decision information calculation.
In a processor system, an application processing unit takes a 64-bit ARM Cortex-A53 dual core as an arithmetic unit, has a main frequency of 1.3GHz, supports single-precision and double-precision floating point types, and can work in a single processing mode, a symmetrical four-processor mode and an asymmetrical four-processing mode; the level L2 cache size is 1MB, supporting ECC checking.
The interrupts and timers include a general interrupt manager, an ARM general timer, a watchdog timer, a global timer, and a time trigger.
The real-time processing unit takes a 32-bit ARM Cortex-R5 dual core as an arithmetic unit, has main frequency of 533MHz, supports L1 level cache and EEC inspection, can work in a single-processor mode or a dual-processor mode, and supports on-chip debugging and tracking.
The memory control unit is provided with a 256KB on-chip RAM, provides a dynamic memory manager, has a multi-port mode, supports a processor system and a programmable logic system to share and access the same memory, and is provided with a plurality of 128-bit AXI ports.
The platform management unit may perform system initialization during the boot phase, managing low level event request sequences, such as power up, power down, reset, clock gating, power gating, etc.; including local and global registers, interrupt managers, JTAG interfaces, etc.
And configuring the safety unit as a redundancy safety processing unit to monitor the temperature and the voltage of the processor system.
The system function unit specifically comprises a DMA (direct memory access), a watchdog timer, a reset, a clock, a debugging and the like, wherein the DMA is used in a full-power area or a low-power area and supports the transmission types from a memory to a memory, from the memory to a peripheral, from the peripheral to the memory and the like; the watchdog timer comprises 2 timers for the application processing unit and the real-time processing unit; the timers include 1 global system timer, 4 general timers, 2 Triple Timer Counters (TTCs).
In the system function unit, reset is used for processing reset input from the outside to the processor system, and all reset requirements of the system and the sub-modules are met inside the system function unit, and the system has the independent reset capability of the processor system in the power-on reset, system reset and continuous operation processes, and the like; the clock is mainly used for generating clock signals for the DDR controller, the application processor, the real-time processor, the peripheral I/O and the intelligent computation video module in the programmable logic system; the debug interface supports full system debugging using both intrusive and non-intrusive debugging methods.
The high-speed interface unit comprises interfaces such as a display interface, a USB3.0, a SATA3.1 and a PCIe.
The universal interface unit comprises an I/O peripheral and a static memory interface, wherein the I/O peripheral interface supports a plurality of paths of Ethernet, a USB interface controller, CAN, SPI, UART, I2C, GPIO and the like, and the static memory interface supports NAND flash, SPI with different positions, an eMMC interface and the like.
In the programmable logic system comprising the system, the system watchdog logic is respectively applied to an application processing unit, a real-time processing unit, a configuration security unit and a platform management unit.
The cross channel data link is used for data transmission between the redundancy processor system boards, each processor system board is provided with a data sending buffer area used for sending to other redundancy processor boards, and meanwhile, each processor system board is provided with a data receiving buffer area used for receiving data from other redundancy processor boards.
In the channel fault logic, the redundancy processor system board sends the self state to other processor system boards, and meanwhile, the self state can be judged according to the monitoring of the self state by other processor system boards.
The channel hardwire synchronization is used for synchronous operation among the redundancy processor boards, when one processor board initiates a synchronization signal, the other redundancy processor boards receive the synchronization signal, the unilateral delay from the input of a sending driver to the output of a receiving driver is not more than 10us, and the inter-channel asynchronization is not more than 20 us.
The debugging loading logic is used for multi-channel synchronous debugging and application program loading among the redundancy processor boards, and the debugging loading interface comprises a debugging data interface, an application loading interface and a debugging control interface; the debugging data interface is used for the interaction of debugging information of the upper computer and the computer during synchronous debugging; the application loading interface is used for loading an application program; the debugging control interface is used for discrete input and output signal control.
The FlexRay bus interface unit is used for time triggering to realize full system interconnection and can be used for bus transmission of critical data of an application layer of a flight control computer.
The peripheral equipment and the circuit comprise an external memory and an external interface circuit. External memory includes DDR, MRAM, NORFlash, SDRAM, and FlashROM. The external interface circuit comprises an RS485 bus, an RS232 bus, an RS422 bus, a data recording bus, an LVDS cross transmission bus, a FlexRay synchronous bus and the like.
The interrupt priority of the processor system, the programmable logic system and the platform management unit can be configured according to watchdog interrupt, power-down interrupt, FlexRay bus interrupt, synchronous interrupt and the like.
The single-redundancy comprehensive information processing intelligent computing module board also takes an XCZU7EV device of an UltraScale + MPSoC series of Xilinx company as a core resolving chip, and has the main task of completing the acquisition of digital signals, analog signals, discrete signals, frequency signals and the like and uploading the signals to the flight control module board; meanwhile, redundancy voting monitoring is carried out on a control signal transmitted by the flight control module board through a FlexRay bus, and the control signal is output to external equipment; and completing navigation calculation, input and output redundancy management, neural network intelligent calculation and atmospheric data calculation based on the input information to form an information integrated comprehensive processing system structure. Aiming at the comprehensive information processing intelligent computing module, the intelligent processing in the programmable logic system mainly comprises intelligent perception information computation, the computation result is transmitted to a flight control function module board through a FlexRay bus for assisting the flight control process, and the network parameter compression is completed based on cutting and a hardware self-adaptive bit quantization compression algorithm. The functional module of the single-redundancy integrated information processing intelligent computing module board is shown in fig. 5.
Based on the high bandwidth characteristic of a FlexRay single-channel bus 10Mbit/s, an intelligent computing module for comprehensive information processing is designed, and a system composition diagram of the intelligent computing module for single-redundancy comprehensive information processing is shown in FIG. 6. The single-redundancy comprehensive information processing intelligent calculation module adopts dual-core self-monitoring comparison to realize SoC architecture, adopts an on-chip bus to integrate required resources, and finishes navigation calculation, input and output redundancy management, neural network intelligent perception calculation and atmospheric data calculation based on node input information on an embedded operation system based on time triggering, thereby forming an information integrated comprehensive processing system structure. The single-redundancy comprehensive information processing intelligent computing module adopts an interface resource configuration mode, and performs the enabling configuration on the on-chip interface resources under the condition of different application requirements. The problem of Byzantine faults of the flight control computer can be effectively solved by the dual-core self-monitoring comparison to the SoC framework.
The node input information mainly comprises airborne sensor equipment information, including inertial sensor information such as triaxial accelerometer information p 1/triaxial rate gyro information p2 and the like, intelligent calculation parameter information such as satellite navigation equipment information p3 and intelligent sensing parameters n1 and atmospheric sensor information such as sideslip angle sensor information p 4/attack angle sensor information p 5/static pressure sensor information p 6/total pressure sensor p7 and the like. And the application layer software above the operating system completes task management and scheduling based on the calculation task priorities of navigation calculation, input and output redundancy management, neural network intelligent calculation and atmospheric data calculation, and completes the neural network intelligent perception calculation based on a cutting and quantitative compression algorithm. The dual-core self-monitoring comparison opposite-pointing device is characterized in that each flight control module and each comprehensive information processing intelligent computing module are designed in a redundancy mode in a self-monitoring mode based on a dual-core structure.
In the aspect of redundancy voting, the monitoring/voting surface of the integrated information processing intelligent computing module is set as shown in fig. 7, and the monitoring/voting surface includes monitoring voting of input signals, monitoring voting of nodes of the integrated information processing intelligent computing module by the flight control module, self-monitoring of nodes of the flight control module, and monitoring voting of output signals. Because the design of intelligent comprehensive information processing nodes is adopted, the distributed flight control computer in the system is added with a first-level input signal voting monitoring compared with a centralized flight control computer, and the reliability and the safety of the system can be effectively improved under the condition of not increasing the redundancy number.
The single-redundancy comprehensive information processing intelligent computing module board also comprises various peripherals and bus communication interfaces, and supports FlexRay bus, multi-path Ethernet, USB interface controller, CAN, SPI, UART, I2C, GPIO and the like, thereby realizing the compatibility with various types of external equipment.
Interrupt control logic provides interrupt priority configuration support for watchdog/power down interrupts, FlexRay bus interrupts, debug interrupts, sync interrupts, LVDS bus interrupts, etc.
The channel fault logic judgment process sends the self state of each intelligent computing module board to other intelligent computing module boards, sends the self state to other boards according to the channel fault logic, and simultaneously judges the self state according to the monitoring of other boards on the self state.
The integrated information processing intelligent computing module boards are connected through hard wires, when one computing module board initiates synchronization, the other two computing module boards receive the synchronous signals, the synchronous signals adopt TTL differential levels, the unilateral delay is not more than 10us, and the asynchronization degree between channels is not more than 20 us.
The cross channel data link is used for data transmission between redundant comprehensive information processing intelligent computing module boards, each board is provided with a data sending buffer area for sending to other redundancy computing module boards, and meanwhile, each board is provided with a data receiving buffer area for receiving data from other redundancy computing module boards.
Claims (5)
1. An extensible distributed redundancy unmanned aerial vehicle intelligent flight control computer is characterized by comprising two double-channel FlexRay buses, m flight control modules, n comprehensive information processing intelligent calculation modules, an extensible redundancy node configuration module and a redundancy power supply module;
each flight control module is respectively connected with two double-channel FlexRay buses; each flight control module is connected with the unmanned aerial vehicle sensing module and receives data of the unmanned aerial vehicle sensor; the flight control module realizes the functions of flight control law calculation, intelligent flight control information calculation, intelligent decision information calculation and aircraft platform management, and the control law and decision information are resolved by using the management result;
each comprehensive information processing intelligent computing module is respectively connected with two double-channel FlexRay buses; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle sensing module and receives data of the unmanned aerial vehicle sensor; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle airborne equipment, receives state data of the unmanned aerial vehicle airborne equipment and outputs control instructions to the unmanned aerial vehicle airborne equipment; each comprehensive information processing intelligent computing module is connected with the unmanned aerial vehicle servo system and outputs a control instruction to the unmanned aerial vehicle servo system; the integrated information processing intelligent computing module realizes redundancy management, sensor information resolving and intelligent sensing information resolving of input and output data of a flight control computer;
the double-channel FlexRay bus is used for data cross-linking among functional nodes of the flight control computer, and ensures the information transmission among each flight control module and each information processing intelligent computing module;
the extensible redundancy node configuration module is respectively connected with the two double-channel FlexRay buses and is used for redundancy node configuration and FlexRay bus parameter configuration of the multi-redundancy flight control computer;
the power supply module supplies power to each module of the flight control computer;
the flight control module takes an XCZU7EV device of UltraScale + MPSoC series of Xilinx company as a core resolving chip; the peripheral equipment and the circuit of the flight control module comprise an external memory and an external interface circuit; the external memory comprises DDR, MRAM, NORFlash, SDRAM and FlashROM; the external interface circuit comprises an RS485 bus, an RS232 bus, an RS422 bus, a data recording bus, an LVDS cross transmission bus and a FlexRay synchronous bus;
the flight control modules are connected through a FlexRay synchronous bus, when one flight control module initiates a synchronous signal, the other flight control modules receive the synchronous signal, the single-side delay from the input of a sending driver to the output of a receiving driver is not more than 10us, and the inter-channel asynchronization degree is not more than 20 mu s;
the comprehensive information processing intelligent computing module takes an UltraScale + MPSoC series XCZU7EV device of Xilinx company as a core resolving chip; the peripheral equipment and the circuit of the comprehensive information processing intelligent computing module comprise an external memory and an external interface circuit; the external memory comprises DDR, MRAM, NORFlash, SDRAM and FlashROM; the external interface circuit comprises an RS485 bus, an RS232 bus, an RS422 bus, a data recording bus, an LVDS cross transmission bus and a FlexRay synchronous bus; the comprehensive information processing intelligent computing module also comprises a discrete quantity output module which is used for outputting discrete control signals;
when one intelligent computation module initiates synchronization, the other intelligent computation modules receive the synchronous signal, the synchronous signal adopts TTL differential level, the unilateral delay is not more than 10us, and the asynchronism between channels is not more than 20 mus.
2. The intelligent flight control computer of an expandable distributed redundancy unmanned aerial vehicle of claim 1, wherein m is 3 and n is 3.
3. The intelligent flight control computer of an expandable distributed redundancy unmanned aerial vehicle of claim 1, wherein the unmanned aerial vehicle sensing module comprises an intelligent flight control information sensor, an intelligent decision information sensor, a redundancy inertial sensor, a redundancy atmospheric sensor, an intelligent perception information sensor, a redundancy phase height sensor, and the like.
4. The intelligent flight control computer of an expandable distributed redundancy unmanned aerial vehicle of claim 1, wherein the onboard equipment of the unmanned aerial vehicle comprises engine control equipment, remote control and telemetry equipment and electrical equipment.
5. The scalable distributed redundancy unmanned aerial vehicle intelligent flight control computer of claim 1, wherein the unmanned aerial vehicle servo system comprises k servo controllers.
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