CN114256864A

CN114256864A - Timing control method and device for SVCC in high-voltage direct-current power transmission system

Info

Publication number: CN114256864A
Application number: CN202111516841.4A
Authority: CN
Inventors: 周小平; 邓凌峰; 于浩祺; 洪乐荣; 夏海涛; 刘一锋; 朱仁龙; 尹寒航
Original assignee: Hunan University
Current assignee: Hunan University
Priority date: 2021-12-13
Filing date: 2021-12-13
Publication date: 2022-03-29
Anticipated expiration: 2041-12-13
Also published as: CN114256864B

Abstract

The invention discloses a timing control method and a timing control device for SVCC in a high-voltage direct-current power transmission system. Compared with the traditional SVCC control method, the method avoids complex signal detection and logic processing, improves the stability of SVCC control, and has certain guiding significance for the engineering popularization of SVCC.

Description

Timing control method and device for SVCC in high-voltage direct-current power transmission system

Technical Field

The invention relates to the technical field of high-voltage direct-current power transmission, in particular to a timing control method and a timing control device for SVCC in a high-voltage direct-current power transmission system.

Background

The power grid commutation Converter type High Voltage Direct Current (LCC-HVDC) has the advantages of large transmission capacity, long transmission distance, flexible power regulation and the like. However, with the rapid increase of the number of high-capacity direct-current transmission projects, the coupling between the alternating-current and direct-current power grids is increasingly tight, and a single alternating-current system fault may be conducted through a plurality of transmission lines to cause cascading faults. The commutation failure fault is a common fault in the operation of the LCC-HVDC system, and after commutation failure of the DC system, if the DC system is improperly controlled and regulated, continuous commutation failure may be caused, even DC blocking and power transmission interruption are caused, and the stable operation of the AC/DC system is seriously damaged. Therefore, it is highly desirable to avoid the hazards of commutation failure by effective inhibition methods.

Series Voltage Commutation Converter (SVCC) is a novel commutation topology applied to high-Voltage direct-current power transmission, and by serially connecting an auxiliary commutation capacitor, the commutation Voltage of a lifting valve group is increased, and the system commutation failure resistance capability is improved. The direct current transmission system based on the series voltage commutation converter mainly comprises: the system comprises a transmitting end alternating current power grid, a transmitting end converter transformer, a rectifier valve, a direct current transmission line, an inverter valve, a receiving end converter transformer, a receiving end alternating current power grid, SVCC submodules and a control system; the SVCC submodule is an H-bridge structure consisting of 4 IGBTs, 4 anti-parallel diodes and 1 auxiliary commutation capacitor, and can realize forward conduction, reverse conduction, bypass and other modal outputs; the SVCC sub-module is connected between the inversion converter valve and the receiving end converter transformer; the control system is configured in the rectifying station and the inverter station. However, when the SVCC system operates, the problem of unbalanced charging and discharging of capacitor voltage exists, and the popularization of the SVCC system is limited. In order to solve the problem, current prediction balance control is proposed in documents, however, after a system fails, the fluctuation of system alternating voltage and direct current is large, and the balance of the auxiliary commutation capacitor is difficult to guarantee only by means of the current prediction control. Meanwhile, the controller of the scheme needs to additionally acquire a plurality of detection quantities such as valve group current, valve group commutation voltage, valve group synchronous signals and the like to be used for judging the occurrence and ending time of the commutation process, and the problems of large electric quantity measurement error, complex logic processing and the like in the detection process also limit the engineering application of the SVCC.

Disclosure of Invention

The invention aims to solve the technical problem that aiming at the defects of the prior art, the invention provides the timing control method and the timing control device for the SVCC in the high-voltage direct-current power transmission system, so that the quick control of the SVCC under the fault is realized, the balance of an auxiliary commutation capacitor is ensured, and the auxiliary commutation capacitor does not need to be pre-discharged to a predicted value before the commutation process is started and then put into the system.

In order to solve the technical problems, the technical scheme adopted by the invention is as follows: SVCC timing control method in high-voltage direct-current power transmission system, and SVCC capacitor charging time t_chargeAnd time t of capacitor discharge_dischargeThe relationship of (A) is as follows:

wherein u is_co(t) represents the valve group exit phase SVCC capacitor voltage value at the time t, u_cIAnd (t) the voltage value of the valve bank access phase SVCC capacitor at the time t is shown, alpha is a trigger angle of the inversion side of the high-voltage direct-current transmission system, and omega is the angular frequency of the power grid system.

The switching time of the converter chain (SVCC) can be obtained only through mathematical operation, the processing process is simple, the capacitor voltage balance of the SVCC system can be ensured more quickly and stably, and the commutation failure resistance capability of the HVDC system is improved.

Charging time t of SVCC capacitor_chargeIs calculated byThe following were used: t is t_charge＝arccos[cosα-2ωLI_d/(1-d％)u_l]-α；I_dFor the direct current transmitted by the HVDC system, L is the equivalent commutation inductance of the HVDC system, u_lThe amplitude value difference of the two-phase alternating voltage of the phase change valve group is shown, and d% is the voltage drop depth. Compared with other methods such as fault current detection, the method can more stably switch the auxiliary commutation capacitor, avoid detection interference, ensure the balance of the auxiliary commutation capacitor and improve the anti-interference capability of the SVCC.

The process of determining the voltage drop depth d% comprises the following steps:

given grid voltage amplitude component threshold u_dtCombined with zero-sequence component threshold u (0)_TJudging the fault type FT of the alternating current system:

when | u (0) & gtneutral>u(0)_TJudging that the power grid system has unbalanced voltage drop, and determining that FT is 2;

when u is_d<u_dTJudging that a three-phase voltage drop fault occurs in the power grid system, wherein FT is 1;

when u is_d>u_dTJudging that the power grid system does not have a voltage drop fault, and setting FT as 0;

u (0) represents a zero-sequence voltage component, and u (0) is equal to u_a+u_b+u_c；u(0)_TRepresenting a zero sequence component threshold;

when FT is 1, d% ═ u%_d/u_n；u_nIs the rated three-phase alternating current voltage amplitude;

when FT is 2, d% ═ u%_xdfault/u_n；u_xdfault＝min(u_da，u_db，u_dc)；u_dxIs the amplitude component of the three-phase virtual AC voltage, u_xX is a sampled value of the voltage of x phase, wherein x is a, b and c; the three-phase virtual alternating voltage expression is as follows:

the method for obtaining the alternating voltage amplitude through alpha beta conversion and further determining the voltage drop depth d% can rapidly and accurately obtain the alternating voltage amplitude because the obtained alternating voltage amplitude component is a direct current component, and further judge the fault degree of a system.

The invention also provides a method for inhibiting commutation failure of the high-voltage direct-current transmission system, which comprises the following steps:

if the three-phase voltage drop fault is not detected, controlling the SVCC to work in a bypass state;

if the high-voltage direct-current power transmission system is detected to have failed in phase commutation, switching the SVCC to a discharge mode, reducing the voltage value of an SVCC capacitor to 0, turning on all switching devices of the SVCC, and bypassing the SVCC capacitor;

if voltage drop fault is detected and no commutation failure occurs, determining commutation starting time according to a trigger pulse signal PLUSE output by a power grid system, and controlling a valve group connecting phase SVCC converter chain to work in a charging mode when a valve group connected with the SVCC is disconnected, namely PLUSE is 0, and lasting for t_chargeA back bypass SVCC; when the valve group connected with the SVCC is triggered to be conducted, namely PLUSE is equal to 1, the SVCC converter chain of the connection phase of the control valve group works in a discharging mode for a duration time t_dischargeThen bypassing the SVCC converter chain;

wherein, t_chargeAnd t_dischargeThe timing control method is obtained by calculation.

As an inventive concept, the present invention also provides a computer arrangement comprising a memory, a processor and a computer program stored on the memory; the processor executes the computer program to realize the steps of the timing control method of the invention; or the processor executes the computer program to realize the steps of the phase change failure suppression method for the high-voltage direct-current power transmission system.

As an inventive concept, the present invention also provides a computer-readable storage medium having stored thereon a computer program/instructions; the computer program/instructions when executed by a processor implement the steps of a timing control method; or the computer program/instructions when executed by a processor implement the steps of the method for suppressing commutation failure in a hvdc transmission system.

As an inventive concept, the present invention also provides a computer program product comprising computer programs/instructions; the computer program/instructions when executed by a processor implement the steps of a timing control method; or the computer program/instructions when executed by the processor, to implement the steps of the method for suppressing commutation failure in a hvdc transmission system.

Compared with the prior art, the invention has the beneficial effects that: the invention discloses a timing control method of a series voltage commutation converter, which is a control method with less measurement quantity, no complex logic processing and capability of quickly ensuring the charge-discharge balance of an SVCC converter chain. When an alternating current power grid fails, the fluctuation of the voltage and current fluctuation amount is huge, the balance of the capacitance of a converter chain cannot be well guaranteed by the traditional SVCC converter chain balance control only depending on current prediction control, the SVCC converter chain switching time provided by the invention can be obtained only by mathematical operation, the capacitance and voltage balance of an SVCC system can be guaranteed more quickly and stably, the resistance capability of HVDC system commutation failure is improved, the instability problem caused by frequent detection of a commutation process by an SVCC controller can be avoided, the quick control of SVCC submodules under the failure is realized, and the stability of a control system is guaranteed.

Drawings

Fig. 1 is an overall structure of a series voltage commutation converter-based direct current transmission system of the present invention;

FIG. 2 is a schematic diagram of a series voltage commutation converter valve set and transformer wiring structure according to the present invention;

FIG. 3 is a diagram of the operation mode of the series voltage commutation converter according to the present invention;

FIG. 4 is a block diagram of an AC system fault detection module according to the present invention;

FIG. 5 is a block diagram of a timing control method for a series voltage commutation converter according to the present invention;

fig. 6(a) -6 (d) are simulation diagrams of the SVCC three-phase grounding inductor L-0.8H fault according to the present invention;

FIG. 6(a) a system dynamics waveform; FIG. 6(b) the system turn-off angle waveform; FIG. 6(c) commutation capacitor voltage waveform; FIG. 6(d) valve block voltage waveform;

fig. 7(a) -7 (d) are simulation diagrams of the SVCC single-phase grounding inductor L-0.6H fault according to the present invention;

FIG. 7(a) a system dynamics waveform; FIG. 7(b) the system turn-off angle waveform; FIG. 7(c) commutation capacitor voltage waveform; FIG. 7(d) valve block voltage waveform;

Detailed Description

Fig. 1 is a block diagram of the overall design of the timing control method of the series voltage commutation converter according to the embodiment of the present invention. The direct current transmission system based on the series voltage commutation converter comprises an inversion side converter valve, an inversion side converter transformer, an SVCC converter chain module and a timing controller, wherein the timing controller triggers signals PLUSEEY and PLUSED through collecting valve groups and triggers the signals according to an alternating voltage u of the inversion side_a，u_b,u_cAnd determining that the SVCC module works in a mode X according to the drop degree d% of the alternating current power grid and the fault type instruction FT.

Fig. 2 is a diagram showing a connection structure of a series voltage commutation converter valve set and a transformer according to an embodiment of the present invention, where the series voltage commutation converter valve set includes two gray rectifier bridges of an upper bridge arm and a lower bridge arm, and the two gray rectifier bridges are respectively connected to a Y/Y transformer, a Y/Δ transformer, and an outlet three-phase ac bus.

Fig. 3 shows 8 operation modes of the SVCC module according to the present invention, wherein the black line indicates current flowing and the gray line indicates no current flowing. Wherein, the mode 1 to the mode 4 are that the current flows positively, and the mode 5 to the mode 8 represent that the current flows negatively.

The SVCC timing control method in the embodiment of the invention is composed of a fault detection module and a timing controller.

(1) Fault detection module

Referring to fig. 4, firstly, three-phase alternating-current voltage u of receiving-end power grid of HVDC system is sampled_a，u_b，u_cAnd calculating a zero sequence voltage component u (0) of the alternating current system, wherein the calculation formula is as follows (1):

u(0)＝u_a+u_b+u_c； (1)

i) when | u (0) & gtneutral<u(0)_TIn time, the voltage balance of the three-phase AC side power grid is judged

When the three-phase alternating-current side power grid voltage is balanced, calculating the fundamental wave amplitude component u of the power grid voltage_dFirst of all, the three-phase network voltage is dq converted into u_α，u_βThe calculation process is as follows (2):

then, the amplitude component u of the fundamental wave of the grid voltage is obtained through calculation_dThe calculation process is as follows (3):

the calculated AC voltage amplitude component and the AC voltage threshold u_dtComparing and judging whether a fault occurs;

when u is_d<u_dTIf so, judging that the system has a three-phase voltage drop fault, and setting a fault type flag bit FT to 1; when u is_d>u_dTAnd if so, judging that the system has no voltage drop fault, and setting the fault type flag bit FT as 0. And (3) calculating the voltage drop degree d% of the alternating current power grid according to the following calculation formula:

d％＝u_d/u_n； (4)

ii) when | u (0) & gtis non-fluorinated>u(0)_TTimely judging three-phase AC side network voltage unbalance

When the zero sequence component of the system exceeds the threshold value u (0)_TWhen the system is in an unbalanced fault state, judging that the system has an unbalanced fault, wherein the fault type flag bit FT is 2, calculating the fundamental wave amplitude component of each phase voltage, and constructing a sampling value u of each phase voltage_x(x ═ a, b, c) of a virtual three-phase voltage component, the virtual voltage expression being as in formula (4):

calculating the amplitude component u of the three-phase virtual AC voltage_dxThe calculation formula is consistent with the balance calculation mode of the three-phase power grid, and u is calculated_xu，u_xv，u_xwCarrying the compounds of formulas (2) and (3).

And judging the phase with the minimum fault voltage amplitude as a fault phase, wherein the calculation formula is as follows:

u_xdfault＝min(u_da，u_db，u_dc)； (6)

and (3) calculating the voltage drop degree d% of the alternating current power grid according to the following calculation formula:

d％＝u_xdfault/u_n； (7)

(2) timing control method

Referring to fig. 5, in the SVCC variable flow chain timing control method, according to the system fault type FT and the voltage drop depth d%, the controller solves the commutation time of the HVDC system in a steady state, and the calculation formula is as follows (8):

t_μ＝arccos(cosα-2ωLI_d/u_l)-α (8)

wherein alpha is an inversion side trigger angle, omega is a system angular frequency, L is an equivalent commutation inductance of the high-voltage direct-current transmission system, and u is_lAmplitude difference of two-phase AC voltage of phase-change valve set_lThe calculation formula is shown in table 1, when a single-phase fault occurs, the zero sequence component of the voltage of the secondary side of the Y/D transformer is 0, the phase-changing voltage of the valve group can be calculated by using a symmetrical component method, wherein when the voltage of the phase A falls, the phase-changing voltage of each valve group is shown in table 2. Will change phase time t_μSetting the charging time t of the auxiliary commutation capacitor of the SVCC converter chain_charge. When the charging time t of the auxiliary commutation capacitor of the SVCC converter chain is determined_chargeThen, in order to ensure the voltage charge-discharge balance of the auxiliary commutation capacitor, the discharge time t of the auxiliary commutation capacitor_dischargeThe formula (9) is required to be satisfied:

wherein u is_co(t) represents the valve group exit phase SVCC converter chain capacitance voltage value, the valve group exit phase represents the impending exitOutputting the phase of the conducting valve group; u. of_cI(t) the voltage value of the SVCC converter chain capacitor of the valve bank access phase indicates the phase of the valve bank to be conducted; SVCC converter chain capacitance voltage u in formula (9)_co(t)，u_cIThe computational expression of (t) is as follows (10):

wherein i_o(t) represents the valve group exit phase SVCC converter chain current value, i_IAnd (t) represents the valve group access phase SVCC variable flow chain current value. u. of_o(t) represents the valve train exit phase voltage value, u_I(t) represents the valve block access phase voltage value, u_co(t) represents the voltage value of the exiting phase capacitor, u_cI(t) represents the value of the input phase capacitance voltage, u_co(0) Indicating the initial value of the exiting phase capacitor voltage. See tables 1 and 2 for calculations.

The discharge time t of the auxiliary commutation capacitor of the SVCC converter chain can be obtained by solving the formulas (9) and (10)_discharge。

TABLE 1 commutation voltages for each phase valve set

TABLE 2 phase voltage drop valve commutation voltage

If the system fault detection module determines that FT is 1 or FT is 2, determining the commutation starting time according to the system output trigger pulse signal PLUSE, and then referring to the charging time t obtained by calculation_chargeTime of discharge t_dischargeDetermining the working mode of a converter chain and the input time of an auxiliary commutation capacitor. For example, when the system outputs the trigger signal PLUSE1, the phase change process of the valve group VT5-VT1 starts, the phase change link capacitor a needs to be discharged, the phase change link capacitor C needs to be charged, the phase change link a is controlled to operate in the mode 7, and the duration t is t_dischargeBack bypass, and simultaneously control the C phase change flow chain to work in a mode 6 with duration t_chargeAnd then the rear bypass is carried out.

And if the three-phase voltage drop fault is detected, namely the output FT of the fault detection module is 0, controlling the SVCC converter chain to work in a bypass state. If the high-voltage direct-current power transmission system is detected to have failed in phase change, the SVCC converter chain is switched to a discharging mode, the voltage value of the auxiliary phase change capacitor is reduced to 0 in an emergency, then all the switch devices are switched on, and the capacitor is bypassed in an emergency.

The effectiveness and the advancement of the control method provided by the invention are verified through PSCAD simulation:

referring to fig. 6(a) to 6(d), the SVCC using the timing control method can withstand a three-phase ground fault in which the three-phase ground inductance L is 0.8H. HVDC system direct current I when fault occurs_dThe maximum value is only 1.2p.u, the three-phase ac mains voltage does not change drastically, and the cut-off angle γ is 7.5 °. And the SVCC three-phase auxiliary commutation capacitor voltage keeps stable, fluctuates by 1kV within the range of 15kV of the initial value, and meets the SVCC variable-current chain capacitor voltage balance requirement. Meanwhile, the voltage of the valve group can resist the rated value of 300kV for operation, and the access of the SVCC converter chain does not cause the overvoltage of the system. The effectiveness of the SVCC timing control method in three-phase earth fault is verified through simulation, and compared with the traditional LCC-HVDC critical grounding inductance L which is 1.5H, the SVCC critical grounding inductance L is 0.75H.

Referring to fig. 7(a) to 7(d), the SVCC using the timing control method can withstand a single-phase ground fault in which the single-phase ground inductance L is 0.6H. HVDC system direct current I when fault occurs_dThe maximum value is only 1.18p.u, the three-phase ac mains voltage does not change drastically, and the cut-off angle γ is 8.1 °. The voltage of the SVCC three-phase auxiliary commutation capacitor is kept stable, fluctuates by 3kV within the range of 15kV of the initial value, and the voltage fluctuation is aggravated when the three-phase voltage drops (the commutation voltage of each valve bank is changed greatly due to unbalance fault), but the fluctuation in the range also meets the requirements of the SVCC converter chainCapacitance voltage balancing requirements. Meanwhile, the voltage of the valve group can resist the rated value of 300kV for operation, and the access of the SVCC converter chain does not cause the overvoltage of the system.

Claims

1. A timing control method for SVCC in a high-voltage direct-current power transmission system is characterized in that the charging time t of an SVCC capacitor_chargeAnd time t of capacitor discharge_dischargeThe relationship of (A) is as follows:

2. The method according to claim 1, wherein the SVCC capacitor charging time t is a time t_chargeThe calculation formula of (a) is as follows: t is t_charge＝arccos[cosα-2ωLI_d/(1-d％)u_l]-α；I_dFor the direct current transmitted by the HVDC system, L is the equivalent commutation inductance of the HVDC system, u_lThe amplitude value difference of the two-phase alternating voltage of the phase change valve group is shown, and d% is the voltage drop depth.

3. The method for timing control of SVCC in a hvdc power transmission system according to claim 2, wherein the determination of d% of the voltage sag depth comprises:

when u is_d<u_dTIn time, the three-phase voltage drop of the power grid system is judgedFailure, FT is 1;

4. a method for suppressing commutation failure of a high-voltage direct-current transmission system is characterized by comprising the following steps:

if voltage drop fault is detected and no commutation failure occurs, determining commutation starting time according to a trigger pulse signal PLUSE output by a power grid system, and controlling a valve group connecting phase SVCC converter chain to work in a charging mode when a valve group connected with the SVCC is disconnected, namely PLUSE is 0Duration t of time_chargeA back bypass SVCC; when the valve group connected with the SVCC is triggered to be conducted, namely PLUSE is equal to 1, the SVCC converter chain of the connection phase of the control valve group works in a discharging mode for a duration time t_dischargeThen bypassing the SVCC converter chain;

wherein, t_chargeAnd t_dischargeCalculated according to the method of any one of claims 1 to 3.

5. A computer apparatus comprising a memory, a processor and a computer program stored on the memory; characterized in that the processor executes the computer program to carry out the steps of the method according to one of claims 1 to 3; alternatively, the processor executes the computer program to implement the steps of the method of claim 4.

6. A computer readable storage medium having stored thereon a computer program/instructions; computer program/instructions for implementing the steps of the method according to any one of claims 1 to 3 when executed by a processor; or which computer program/instructions when executed by a processor performs the steps of the method of claim 4.

7. A computer program product comprising a computer program/instructions; characterized in that the computer program/instructions, when executed by a processor, performs the steps of the method according to one of claims 1 to 6; or which computer program/instructions when executed by a processor performs the steps of the method of claim 4.