CN114201942A - Automatic checking method for capacitance parameter in circuit schematic diagram - Google Patents
Automatic checking method for capacitance parameter in circuit schematic diagram Download PDFInfo
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- CN114201942A CN114201942A CN202210150198.6A CN202210150198A CN114201942A CN 114201942 A CN114201942 A CN 114201942A CN 202210150198 A CN202210150198 A CN 202210150198A CN 114201942 A CN114201942 A CN 114201942A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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Abstract
The invention discloses an automatic checking method of capacitance parameters in a circuit schematic diagram, which comprises the following steps: deriving information from the schematic diagram of the circuit and extracting a power network; judging the resistance value of the resistor in the network; judging magnetic beads, inductors and ICs in the network, judging that the magnetic beads and the inductors are short-circuited, if the magnetic beads and the inductors are not available, performing other judgments, judging that the ICs are open-circuited, and judging that the ICs are not available; and judging that the diodes in the network are in positive connection and reverse connection, defining positive and negative electrodes for the diodes, wherein the power supply end is in short circuit connection with the positive electrode, and the power supply end is in open circuit connection with the negative electrode; judging the connection relation of the switch tubes in the network, and defining pins 2 and 3 as short circuits; extracting the withstand voltage and the capacitance value of the capacitor in the effective path; the capacitance value load is calculated in parallel, the withstand voltage and the power supply voltage are compared, and the margin is calculated.
Description
Technical Field
The invention relates to the technical field of detection, in particular to an automatic detection method for capacitance parameters in a circuit schematic diagram.
Background
The capacitance can be widely applied to the fields of industry, civil use, commercial use and the like, the reliability and the stability of the system can be effectively reflected by the size of the capacitance, and meanwhile, the change of the capacitance can sensitively reflect some local defects, such as whether insulation is affected with moisture and is degraded, whether elements are broken or broken, whether oil leaks and the like. Thus, measurement of capacitance is a key technique to confirm system reliability.
The chinese invention with publication number CN113219257A discloses a parameter measuring circuit of a capacitor and an ESR capacity measuring instrument of the capacitor, which output digital driving signals through a control circuit; the digital-to-analog conversion circuit converts the digital driving signal into an analog driving voltage; the frequency of the analog drive voltage is associated with the digital drive signal; the driving circuit amplifies the analog driving voltage to output a driving amplification voltage; the voltage division circuit divides the driving amplification voltage to output a first voltage; the capacitor to be tested is charged and discharged according to the first voltage so as to output a first voltage to be tested and a first current to be tested; the voltage detection circuit detects the first voltage to be detected and the first voltage to output a first voltage detection signal; the current detection circuit detects a first current to be detected to output a first current detection signal; the control circuit obtains an initial capacitance parameter according to the first voltage detection signal and the first current detection signal, however, the parameter measurement circuit has low detection precision when testing the capacitance parameter.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides the automatic detection method of the capacitance parameter in the circuit schematic diagram with high detection precision.
The purpose of the invention is realized by the following technical scheme:
an automatic checking method for capacitance parameters in a circuit schematic diagram comprises the following steps: step one, deriving information from a circuit schematic diagram, wherein the information comprises a power supply network, the number of capacitors, capacitor parameters, and data of resistors, magnetic beads, inductors, diodes, switching tubes and ICs;
step two, naming a global power network and capacitance parameters in a standard mode, and extracting the power network;
judging the resistance value of the resistor in the network, presetting a value X, wherein the resistance value is open when being larger than the set value X, and is short when being smaller than the set value X; judging magnetic beads, inductors and ICs in the network, judging that the magnetic beads and the inductors are short-circuited, if the magnetic beads and the inductors are not available, performing other judgments, judging that the ICs are open-circuited, and judging that the ICs are not available; and judging that the diodes in the network are in positive connection and reverse connection, defining positive and negative electrodes for the diodes, wherein the power supply end is in short circuit connection with the positive electrode, and the power supply end is in open circuit connection with the negative electrode; judging the connection relation of the switch tubes in the network, and defining pins 2 and 3 as short circuits;
step four, extracting the withstand voltage and the capacitance value of the capacitor in the effective path;
and step five, carrying out parallel calculation on the capacity value load, comparing the withstand voltage with the power supply voltage and calculating the margin.
Furthermore, the pin 2 is a source electrode, and the pin 3 is a drain electrode.
Further, the short circuit is defined as an active power path, and the open circuit is defined as an inactive power path.
Further, the step of comparing comprises: comparing the withstand voltage with the power supply voltage in the circuit schematic diagram, wherein the withstand voltage is greater than the power supply voltage, the withstand voltage of the capacitor meets the requirement, and if the withstand voltage is less than the power supply voltage, the withstand voltage of the capacitor does not meet the requirement.
Furthermore, the switching tube in the circuit schematic diagram is an MOS tube and is used for switching on and off the circuit.
Further, the calculation of the capacity load satisfies the following conditions:
c is a capacitance value load, and the capacitance of each capacitor is C1、C2、C3、...、Cn。
Further, of marginsCalculating to satisfy:
n is a margin, M is a capacitor withstand voltage, and Z is a power supply voltage.
Compared with the prior art, the invention has the following advantages and beneficial effects:
compared with the existing parameter inspection, the automatic inspection method for the capacitance parameters in the circuit schematic diagram provided by the invention is not easy to miss information, has high inspection efficiency and is not easy to make mistakes, is easy to realize, does not need complex operation, and can improve the control effect, reliability, stability and detection precision of the circuit.
Drawings
FIG. 1 is a flow chart of a method for automatically checking a capacitance parameter in a circuit schematic;
FIG. 2 is a circuit diagram of a pre-processing state;
fig. 3 is a circuit diagram of a post-processing state.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, an automatic checking method for capacitance parameters in a schematic circuit diagram includes the following steps: step one, deriving information from a circuit schematic diagram, wherein the information comprises data of a power supply network, the number of capacitors, capacitor parameters, resistors, magnetic beads, inductors, diodes, a switching tube and an IC (integrated circuit);
step two, naming a global power network and capacitance parameters in a standard mode, and extracting the power network; wherein, the power supply parameter must contain voltage value, and the capacitance parameter comprises withstand voltage and capacitance value;
judging the resistance value of the resistor in the network, presetting a value X, wherein the resistance value is open when being larger than the set value X, and is short when being smaller than the set value X; judging magnetic beads, inductors and ICs in the network, judging that the magnetic beads and the inductors are short-circuited, if the magnetic beads and the inductors are not available, performing other judgments, judging that the ICs are open-circuited, and judging that the ICs are not available; and judging that the diodes in the network are in positive connection and reverse connection, defining positive and negative electrodes for the diodes, wherein the power supply end is in short circuit connection with the positive electrode, and the power supply end is in open circuit connection with the negative electrode; judging the connection relation of switching tubes in the network, defining pins 2 and 3 as short circuits, and basically judging an effective path after the third step, wherein the four judging modes have no sequence;
step four, extracting the withstand voltage and the capacitance value of the capacitor in the effective path;
and step five, carrying out parallel calculation on the capacity value load, comparing the withstand voltage with the power supply voltage and calculating the margin.
The 2 pin is a source electrode, and the 3 pin is a drain electrode. A short circuit is defined as an active power path and an open circuit is defined as an inactive power path. The switching tube in the circuit schematic diagram is an MOS tube and is used for switching on and off the circuit. The invention can automatically analyze the open circuit and short circuit states of the resistor, the inductor, the magnetic bead, the switch tube and the diode in the network in the power network.
The calculation of the capacity value load satisfies the following conditions:
c is a capacitance value load, and the capacitance of each capacitor is C1、C2、C3、...、Cn。
The calculation of the margin satisfies:
n is margin, M is capacitor withstand voltage, Z is power supply voltage, if M is>Z, the capacitance withstand voltage meets the requirement, such as M<And Z, the capacitor withstand voltage does not meet the requirement.
As shown in fig. 2 and 3, in the state that the circuit has a diode in step three, when processing Vdd2 network, Vdd2 and Vdd3 are short-circuited; when dealing with Vdd3 networks, Vdd2 and Vdd3 are open circuits.
The working principle of the invention is as follows:
deriving information from the circuit schematic diagram, standardizing and naming a global power network and capacitance parameters, and extracting the power network; the power supply parameters comprise voltage values, the capacitance parameters comprise withstand voltage and capacitance values, resistance values of resistors in a network are judged, a preset value X is preset, the resistance values are larger than the set value X and are open-circuit, the resistance values are smaller than the set value X and are short-circuit, magnetic beads, inductors and ICs in the network are judged, the magnetic beads and the inductors are considered as short-circuit, if the magnetic beads and the inductors do not exist, other judgments are carried out, if the ICs exist, the ICs are open-circuit, and if the ICs do not exist, other judgments are carried out; and judging that the diodes in the network are in positive connection and reverse connection, defining positive and negative electrodes for the diodes, wherein the power supply end is in short circuit connection with the positive electrode, and the power supply end is in open circuit connection with the negative electrode; and judging the connection relation of the switching tubes in the network, defining pins 2 and 3 as short circuits, extracting the withstand voltage and the capacitance value of the capacitor in the effective path in no sequence by the four judging modes, carrying out parallel calculation on the capacitance value load, comparing the withstand voltage with the power supply voltage and carrying out margin calculation to obtain a checking result.
Through the processing mode of the third step, the withstand voltage of the capacitor in the effective path power supply network can be compared with the power supply voltage, the capacitor parameters in the circuit schematic diagram, such as capacitance value load, withstand voltage and margin parameters, whether the capacitor parameters of the power supply network are enough or not can be detected, missing detection or detection errors can be prevented, the reliability and the stability of the system can be effectively reflected by the capacitance value, meanwhile, the change of the capacitance can more sensitively reflect some local defects, the service life of a product can be prolonged, and the risk generated when the circuit schematic diagram is designed can be reduced.
It should be understood that the above-described embodiments are merely preferred embodiments of the present invention and the technical principles applied thereto, and that any changes, modifications, substitutions, combinations and simplifications made by those skilled in the art without departing from the spirit and principle of the present invention shall be regarded as equivalent substitutions and shall be covered by the protection scope of the present invention.
Claims (7)
1. An automatic checking method for capacitance parameters in a circuit schematic diagram is characterized by comprising the following steps: step one, deriving information from a circuit schematic diagram, wherein the information comprises a power supply network, the number of capacitors, capacitor parameters, and data of resistors, magnetic beads, inductors, diodes, switching tubes and ICs;
step two, naming a global power network and capacitance parameters in a standard mode, and extracting the power network;
judging the resistance value of the resistor in the network, presetting a value X, wherein the resistance value is open when being larger than the set value X, and is short when being smaller than the set value X; judging magnetic beads, inductors and ICs in the network, judging that the magnetic beads and the inductors are short-circuited, if the magnetic beads and the inductors are not available, performing other judgments, judging that the ICs are open-circuited, and judging that the ICs are not available; and judging that the diodes in the network are in positive connection and reverse connection, defining positive and negative electrodes for the diodes, wherein the power supply end is in short circuit connection with the positive electrode, and the power supply end is in open circuit connection with the negative electrode; judging the connection relation of the switch tubes in the network, and defining pins 2 and 3 as short circuits;
step four, extracting the withstand voltage and the capacitance value of the capacitor in the effective path;
and step five, carrying out parallel calculation on the capacity value load, comparing the withstand voltage with the power supply voltage and calculating the margin.
2. The method of claim 1, wherein the method comprises: the pin 2 is a source electrode, and the pin 3 is a drain electrode.
3. The method of claim 2, wherein the method comprises: the short circuit is defined as an active power path and the open circuit is defined as an inactive power path.
4. The method of claim 3, wherein the method comprises: the switching tube in the circuit schematic diagram is an MOS tube and is used for switching on and off the circuit.
5. The method of claim 4, wherein the method comprises: the comparison determination step comprises: comparing the withstand voltage with the power supply voltage in the circuit schematic diagram, wherein the withstand voltage is greater than the power supply voltage, the withstand voltage of the capacitor meets the requirement, and if the withstand voltage is less than the power supply voltage, the withstand voltage of the capacitor does not meet the requirement.
6. The method of claim 5, wherein the method comprises: the calculation of the capacity value load satisfies the following conditions:
c is a capacitance value load, and the capacitance of each capacitor is C1、C2、C3、...、Cn。
7. The method of claim 6, wherein the method comprises: the calculation of the margin satisfies:
n is a margin, M is a capacitor withstand voltage, and Z is a power supply voltage.
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| CN202210150198.6A CN114201942B (en) | 2022-02-18 | 2022-02-18 | Automatic checking method for capacitance parameter in circuit schematic diagram |
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Address after: Floor 25, Block A, Zhongzhou Binhai Commercial Center Phase II, No. 9285, Binhe Boulevard, Shangsha Community, Shatou Street, Futian District, Shenzhen, Guangdong 518000 Patentee after: Shenzhen Youjia Innovation Technology Co.,Ltd. Address before: 518000 401, building 1, Shenzhen new generation industrial park, No. 136, Zhongkang Road, Meidu community, Meilin street, Futian District, Shenzhen, Guangdong Province Patentee before: SHENZHEN MINIEYE INNOVATION TECHNOLOGY Co.,Ltd. |
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