CN114205954B - Electrolytic capacitor-free control method for improved Sepic-LED driving circuit - Google Patents
Electrolytic capacitor-free control method for improved Sepic-LED driving circuit Download PDFInfo
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/32—Pulse-control circuits
- H05B45/325—Pulse-width modulation [PWM]
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- H—ELECTRICITY
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- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/355—Power factor correction [PFC]; Reactive power compensation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
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Abstract
The invention provides an electrolytic capacitor-free control method for improving a Sepic-LED drive circuit, which comprises a power factor correction peak current critical mode (BCM) control unit and a valley Current Continuous Mode (CCM) control unit; the control circuit is used for realizing the control of the input peak current and the control of the output valley current, thereby optimizing the power factor of the network side, achieving the purpose of removing the electrolytic capacitor through electric energy conversion and enhancing the reliability of the LED driving circuit. In order to achieve the above purpose, the core technical scheme of the invention is as follows: in the LED driving circuit, the ripple wave of the output capacitor is transferred to the intermediate capacitor by controlling the current of the intermediate capacitor C, so that the output capacitor has no electrolytic capacitor. The method optimizes the characteristics of the grid side, achieves the purpose of removing the electrolytic capacitor of the direct current side through electric energy conversion, and achieves single-stage high-power-factor, high-efficiency and high-reliability LED driving control.
Description
Technical Field
The invention belongs to the technical field of LED illumination driving, relates to an AC-DC electroless capacitor LED driving illumination circuit with liftable output voltage and a control method, and particularly relates to an electroless capacitor control method for improving a Sepic-LED driving circuit.
Background
In recent years, the LED has been widely used in the illumination field due to the characteristics of good luminous brightness, long service life, short starting time, high electric energy utilization rate and the like, and becomes an important research direction of light sources and illumination technology. Meanwhile, in order to reduce pollution of harmonic waves to an alternating current power grid, relevant standards for limiting current harmonic waves are formulated at home and abroad, and the power quality standards are increasingly strict, so that a Power Factor Correction (PFC) technology has become a research hot spot in the field of power electronics. The single-stage power factor correction circuit combines the PFC stage and the DC-DC stage, reduces the circuit cost, improves the power factor and the power density, and simplifies the structure and the control of the circuit. Larger electrolytic capacitors are commonly used in the field of LED driving power supplies to ensure the stability of the output voltage of conventional Power Factor Correction (PFC) converters. However, the lifetime of the electrolytic capacitor is far less than the lifetime of the LED, and when the temperature of the LED operating environment increases, the failure of the electrolytic capacitor is further accelerated, and the electrolytic capacitor is not a good choice in terms of reliability and size of the system. Meanwhile, in the single-phase power factor correction system, there is inherently twice ripple power, so that the light emission output of the LED is deteriorated. With the increasing service life and reliability standard of the LED driving power supply, the LED lighting driving circuit without the electrolytic capacitor provides good help for the high power factor, high efficiency and high reliability of the driving power supply.
Disclosure of Invention
In view of the above, in order to overcome the defects of the prior art, the present invention provides a method for controlling an electroless capacitor for improving a Sepic-LED driving circuit, which comprises a power factor correction peak current critical mode (BCM) control unit and a valley Current Continuous Mode (CCM) control unit; the control circuit is used for realizing the control of the input peak current and the control of the output valley current, thereby optimizing the power factor of the network side, achieving the purpose of removing the electrolytic capacitor through electric energy conversion and enhancing the reliability of the LED driving circuit. In order to achieve the above purpose, the core technical scheme of the invention is as follows: in the LED driving circuit, the ripple wave of the output capacitor is transferred to the intermediate capacitor by controlling the current of the intermediate capacitor C, so that the output capacitor has no electrolytic capacitor. The method optimizes the characteristics of the grid side, achieves the purpose of removing the electrolytic capacitor of the direct current side through electric energy conversion, and achieves single-stage high-power-factor, high-efficiency and high-reliability LED driving control.
The invention adopts the following technical scheme:
An electroless capacitance control method for improving a Sepic-LED driving circuit is characterized in that: in the LED driving circuit, the ripple wave of the output capacitor is transferred to the intermediate capacitor by controlling the current of the intermediate capacitor C, so that the output capacitor has no electrolytic capacitor.
Further, the LED driving circuit comprises an alternating current input power supply, a rectifier bridge, an intermediate capacitor C, an output capacitor C o and a load LED; two ends of the intermediate capacitor C are respectively connected with a first inductor L 1, a power MOS switch tube Q 1, a second inductor L 2 and a power MOS switch tube Q 2;
An AC-DC power factor correction peak current critical mode unit (BCM) and a DC-DC output current valley control continuous mode unit (CCM) control to realize network-side PFC and LED load current constant current by using a power MOS switch tube Q 1 and a power MOS switch tube Q 2 according to voltage and current values obtained by sampling from the LED driving circuit respectively, and control the current valley of an intermediate capacitor C.
Further, the AC-DC power factor correction peak current critical mode unit obtains a current peak value reference signal of a current Is flowing through the MOS switch tube Q 1 by sampling an input voltage V r and an output current I LED and processing the current peak value reference signal by a multiplier, generates a reset signal by a comparator, simultaneously samples a current I L1 of a first inductor L 1, generates a zero current trigger signal by a zero-crossing comparator, sends the generated reset signal and zero current trigger signal to an R end and an S end of a trigger, and generates a PFM signal for controlling the MOS switch tube Q 1 to be turned on and off;
The DC-DC output current valley control continuous mode unit generates a second inductor L 2 current valley reference signal Ivy by sampling the current of the intermediate capacitor C, generates a set signal by a comparator, and sends the generated set signal and a reset signal generated by peak current control to the S terminal and the R terminal of the trigger, thereby controlling the on and off PWM signals of the MOS switch transistor Q 2.
Further, the AC-DC power factor correction peak current critical mode unit and the DC-DC output current valley control continuous mode unit are respectively used for inputting BCM peak current control and outputting CCM valley current control;
The BCM peak current control Is characterized in that a current peak reference signal of a current Is flowing through a MOS switch tube Q 1 Is obtained through sampling an input voltage V r and an output current I LED through multiplier processing, when the current Is flowing through the MOS switch tube Q 1 reaches a peak reference, a reset signal Is generated and Is simultaneously sent to R ends of a Q 1 latch and a Q 2 latch, so that the MOS switch tube Q 1、Q2 Is simultaneously turned off, the turn-on time of the MOS switch tube Q 1、Q2 Is controlled, the current I L1 of a first inductor L 1 Is sampled to detect a zero current signal through a zero-crossing comparator, when the current I L1 of the first inductor L 1 Is reduced to zero, a set signal Is generated and Is sent to the S end of the Q 1 latch, the MOS switch tube Q 1 Is turned on, the turn-off time of the MOS switch tube Q 1 Is controlled, and a PFM signal for controlling the turn-on and turn-off of the MOS switch tube Q 1 Is generated;
The output CCM valley current control is performed by sampling the current of the intermediate capacitor C to generate a second inductor L 2 current valley reference signal Ivy, and when the second inductor L 2 current I L2 drops to the reference value Ivy, a generated set signal is generated and sent to the S end of the Q 2 latch, so that the MOS switch Q 2 is turned on, and the turn-off time of the MOS switch Q 2 is controlled, so that a PWM signal for controlling the turn-on and turn-off of the MOS switch Q 2 is generated.
Further, the AC-DC power factor correction peak current critical mode unit includes: the input voltage sampling unit, the output current error amplifying unit, the multiplier unit, the I L1 current zero detection unit, the peak current detection unit and the Q 1 latch unit; the DC-DC output current valley control continuous mode unit includes: the device comprises a sampling intermediate capacitance current unit, an intermediate capacitance current error amplifying unit, a valley current detecting unit and a Q 2 latch unit;
The input voltage sampling unit and the output current error amplifying unit are respectively connected with two input ends of the multiplier unit, the output end of the multiplier unit is connected with the non-inverting input end of the comparator of the peak current detecting unit, and the inverting input end of the comparator of the peak current detecting unit collects the current of the branch where the power MOS switch tube Q 1 is located and outputs the current to the R end of the Q 1 latch; the I L1 current zero detection unit detects the current passing through the first inductor L 1 and outputs the current to the S end of the Q 1 latch; the Q 1 latch outputs a control signal to the power MOS switch tube Q 1;
The sampling intermediate capacitance current unit is connected with the comparator non-inverting input end of the valley current detection unit through the inter-capacitance current error amplification unit, and the comparator inverting input end of the valley current detection unit collects the current of the branch where the second inductor L 2 is located and outputs the current to the S end of the Q 2 latch; and the R end of the Q 2 latch is connected with the output end of the peak current detection unit and outputs a control signal to the power MOS switch tube Q 2.
Further, the specific structure of the LED driving circuit is as follows: one end of the input alternating current source U in is connected with the anode of the first power diode D 1 and the cathode of the third power diode, and the other end of the input alternating current source U in is connected with the anode of the second power diode D 2 and the cathode of the fourth power diode D 4; One end of the first inductor L 1 is connected with the cathode of the first power diode D 1 and the cathode of the second power diode D 2; the other end of the first inductor L 1 is connected with the drain electrode of the power MOS switch tube Q 1 and one end of the intermediate capacitor C; The source electrode of the power MOS switch tube Q 1 is connected with the cathode of the third power diode D 3 and the cathode of the fourth power diode D 4; one end of the second inductor L 2 is connected with the anode of the fifth power diode D 5, and the other end of the second inductor L 2 is connected with the cathode of the sixth power diode and the source electrode of the power MOS switch tube Q 2; the drain electrode of the power MOS tube Q 2 is connected with the cathode of the seventh power diode D 7; the anode of the sixth power diode D 6 is connected with the anode of the seventh power diode D 7; One end of the output capacitor C o is connected with the anode of the LED and the cathode of the fifth power diode D 5, and the other end of the output capacitor C o is connected with the cathode of the LED and the anode of the seventh power diode D 7.
Further, the first inductor L 1 and the second inductor L 2 are both high-frequency inductors.
Further, the intermediate-stage capacitor C and the output capacitor C o are both thin-film capacitors.
Further, the first power diode D 1, the second power diode D 2, the third power diode D 3, the fourth power diode D 4, the fifth power diode D 5, the sixth power diode D 6, and the seventh power diode D 7 are all fast recovery power diodes.
Further, the power MOS switch transistor Q 1、Q2 is a silicon-based power MOS transistor or an IGBT or a wide bandgap semiconductor power MOS transistor.
Compared with the prior art, the invention and the preferred scheme thereof optimize the network side characteristic through the peak current of the BCM and the valley current control mode of the CCM, and achieve the purpose of removing the electrolytic capacitor at the direct current side through electric energy conversion, thereby realizing the LED driving control with single-stage high power factor, high efficiency and high reliability.
Drawings
The invention is described in further detail below with reference to the attached drawings and detailed description:
FIG. 1 is a schematic circuit diagram of an embodiment of a single-stage electroless capacitor Sepic-LED driver circuit in accordance with an embodiment of the present invention.
FIG. 2 is a block diagram of a control circuit of an embodiment of a single-stage electroless capacitor Sepic-LED driver circuit in accordance with an embodiment of the present invention.
Fig. 3 is a schematic diagram of mode 1 of working states of each element in a switching tube Q 1 on and Q 2 off stage of a single-stage electroless capacitor Sepic-LED driving circuit according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of mode 2 of the working states of each element in the conducting stage of the switching tube Q 1、Q2 of the single-stage electroless capacitor Sepic-LED driving circuit according to the embodiment of the present invention.
Fig. 5 is a schematic diagram of mode 3 of the working states of each element in the switching-off stage of the switching tube Q 1、Q2 in the single-stage electroless capacitor Sepic-LED driving circuit according to the embodiment of the present invention.
Fig. 6 is a schematic diagram of the operation waveforms of the key device in the switching cycle of the input BCM and the output CCM according to the embodiment of the present invention.
Fig. 7 is a schematic diagram of a complete circuit in accordance with an embodiment of the present invention incorporating fig. 1 and 2.
Detailed Description
In order to make the features and advantages of the present patent more comprehensible, embodiments accompanied with figures are described in detail below:
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The components generally described and illustrated in the figures herein may be combined in different configurations. Thus, the following detailed description of selected embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention based on the embodiments of the present invention.
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The application will be described in detail below with reference to the drawings in connection with embodiments.
As shown in fig. 1, the present embodiment provides a single-stage electroless capacitor Sepic-LED driving circuit, and the design contents of the circuit portion thereof are specifically: the main circuit comprises an alternating current input power supply U in, a rectifier bridge (D 1、D2、D3、D4), a first inductor L 1, an intermediate capacitor C and a power MOS switch tube Q 1; the power supply circuit further comprises a second inductor L 2, a fifth power diode D 5, a sixth power diode D 6, a seventh power diode D 7, an output capacitor C o, a power MOS switch tube Q 2 and a load LED.
The control circuit part shown in fig. 2 comprises an input voltage sampling unit, an output current error amplifying unit, a multiplier unit, an I L1 current zero detection unit, a peak current detection unit, a Q 1 latch unit, a sampling intermediate capacitance current unit, an intermediate capacitance current error amplifying unit, a valley current detection unit and a Q 2 latch unit.
As shown in fig. 7, fig. 1 and fig. 2 are combined to form a complete circuit structure including an LED driving circuit and a control circuit according to an embodiment of the present invention.
The following provides specific embodiments of the circuit scheme working process of the invention:
The working process of the control circuit of the single-stage electroless capacitor Sepic-LED driving circuit of the embodiment is described below with reference to specific examples, as shown in FIG. 2, and specific working modes, as shown in FIGS. 3, 4 and 5; fig. 6 is a waveform of operation of the switching cycle critical device in the input BCM and output CCM modes.
Referring to fig. 2, in this embodiment, the control circuit includes an input BCM peak current control and an output CCM valley current control. The BCM peak current control Is to obtain a current peak reference signal of the current Is flowing through the MOS switch tube Q 1 by sampling the input voltage V r and the output current I LED and processing the current peak reference signal by a multiplier, when the current Is flowing through the MOS switch tube Q 1 reaches the peak reference, a reset signal Is generated and Is simultaneously sent to the R ends of the Q 1 and Q 2 latches, So that the MOS switch tube Q 1、Q2 is turned off simultaneously, the on time of the MOS switch tube Q 1、Q2 is controlled, the current I L1 of the first inductor L 1 is sampled to detect a zero current signal through a zero-crossing comparator, When the current I L1 of the first inductor L 1 drops to zero, a set signal is generated and sent to the S end of the Q 1 latch, so that the MOS switch tube Q 1 is turned on, The turn-off time of the MOS switch tube Q 1 is controlled, so that a PFM signal for controlling the turn-on and turn-off of the MOS switch tube Q 1 is generated; The output CCM valley current control is to sample the current of the intermediate capacitor C to generate a second inductor L 2 current valley reference signal Ivy, when the second inductor L 2 current I L2 drops to the reference value Ivy, generate a set signal to be sent to the S end of the Q 2 latch, The MOS switch tube Q 2 is enabled to be on, the turn-off time of the MOS switch tube Q 2 is controlled, and accordingly PWM signals for controlling the MOS switch tube Q 2 to be on and off are generated.
Referring to fig. 3, which is a period of Q 1 on and Q 2 off, a semiconductor power device waveform diagram corresponds to stage t 0~t1 in fig. 6. U in charges the first inductor L 1 after rectification, and the current I L1 of the first inductor L 1 rises linearly; the second inductor L 2 supplies power to the load LED with its current I L2 falling linearly, and the second inductor L 2 current I L2 falling to zero at time t 1.
Referring to fig. 4, this diagram is a Q 1、Q2 on period, whose semiconductor power device waveform diagram corresponds to stage t 1~t2 in fig. 6. After the U in is rectified, the first inductor L 1 is continuously charged, and the current I L1 of the first inductor continues to linearly rise; the intermediate capacitor charges the second inductor L 2 through the MOS switch tube Q 2, and the current I L2 of the intermediate capacitor rises linearly; at time t 2, the current I L1 of the first inductor L 1 and the current I L2 of the second inductor L 2 both peak.
Referring to fig. 5, the diagram is a Q 1、Q2 off period, and the semiconductor power device waveform diagram corresponds to the t 2~t3 stage in fig. 6. The first inductor L 1 charges the intermediate capacitor C, whose current I L1 drops linearly; the second inductor L 2 discharges the load LED through the fifth power diode D 5 and the sixth power diode D 6, and the current I L2 of the second inductor L 2 drops linearly; the current I L1 of the first inductor L 1 drops to zero at time t 3.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the invention in any way, and any person skilled in the art may make modifications or alterations to the disclosed technical content to the equivalent embodiments. However, any simple modification, equivalent variation and variation of the above embodiments according to the technical substance of the present invention still fall within the protection scope of the technical solution of the present invention.
The patent is not limited to the best mode, any person can obtain other electrolytic capacitor-free control methods of improving the Sepic-LED driving circuit in various forms under the teaching of the patent, and all equivalent changes and modifications made according to the scope of the patent application are covered by the patent.
Claims (8)
1. An electroless capacitance control method for improving a Sepic-LED driving circuit is characterized in that: in the LED driving circuit, the ripple wave of the output capacitor is transferred to the intermediate capacitor by controlling the current of the intermediate capacitor C, so that the output capacitor has no electrolytic capacitor;
The LED driving circuit comprises an alternating current input power supply, a rectifier bridge, an intermediate capacitor C, an output capacitor C o and a load LED; two ends of the intermediate capacitor C are respectively connected with a first inductor L 1, a power MOS switch tube Q 1, a second inductor L 2 and a power MOS switch tube Q 2;
The AC-DC power factor correction peak current critical mode unit and the DC-DC output current valley value control continuous mode unit respectively control the current constant of the network-side PFC and the LED load and control the current valley value of the intermediate capacitor C by utilizing the power MOS switch tube Q 1 and the power MOS switch tube Q 2 according to the voltage and the current value obtained by sampling from the LED driving circuit;
The AC-DC power factor correction peak current critical mode unit obtains a current peak value reference signal of a current Is flowing through a MOS switch tube Q 1 through sampling an input voltage V r and an output current I LED and processing the current peak value reference signal by a multiplier, generates a reset signal by a comparator, simultaneously samples a current I L1 of a first inductor L 1, generates a zero current trigger signal by a zero-crossing comparator, sends the generated reset signal and zero current trigger signal to an R end and an S end of a trigger, and generates a PFM signal for controlling the MOS switch tube Q 1 to be opened and closed;
The DC-DC output current valley control continuous mode unit generates a second inductor L 2 current valley reference signal Ivy by sampling the current of the intermediate capacitor C, generates a set signal by a comparator, and sends the generated set signal and a reset signal generated by peak current control to the S terminal and the R terminal of the trigger, thereby controlling the on and off PWM signals of the MOS switch transistor Q 2.
2. The method for electrolytic capacitor less control of an improved Sepic-LED driver circuit of claim 1, wherein: the AC-DC power factor correction peak current critical mode unit and the DC-DC output current valley value control continuous mode unit are respectively used for inputting BCM peak current control and outputting CCM valley value current control;
The BCM peak current control Is characterized in that a current peak reference signal of a current Is flowing through a MOS switch tube Q 1 Is obtained through sampling an input voltage V r and an output current I LED through multiplier processing, when the current Is flowing through the MOS switch tube Q 1 reaches a peak reference, a reset signal Is generated and Is simultaneously sent to R ends of a Q 1 latch and a Q 2 latch, so that the MOS switch tube Q 1、Q2 Is simultaneously turned off, the turn-on time of the MOS switch tube Q 1、Q2 Is controlled, the current I L1 of a first inductor L 1 Is sampled to detect a zero current signal through a zero-crossing comparator, when the current I L1 of the first inductor L 1 Is reduced to zero, a set signal Is generated and Is sent to the S end of the Q 1 latch, the MOS switch tube Q 1 Is turned on, the turn-off time of the MOS switch tube Q 1 Is controlled, and a PFM signal for controlling the turn-on and turn-off of the MOS switch tube Q 1 Is generated;
The output CCM valley current control is performed by sampling the current of the intermediate capacitor C to generate a second inductor L 2 current valley reference signal Ivy, and when the second inductor L 2 current I L2 drops to the reference value Ivy, a generated set signal is generated and sent to the S end of the Q 2 latch, so that the MOS switch Q 2 is turned on, and the turn-off time of the MOS switch Q 2 is controlled, so that a PWM signal for controlling the turn-on and turn-off of the MOS switch Q 2 is generated.
3. The method for electrolytic capacitor less control of an improved Sepic-LED driver circuit of claim 1, wherein: the AC-DC power factor correction peak current critical mode unit includes: the input voltage sampling unit, the output current error amplifying unit, the multiplier unit, the I L1 current zero detection unit, the peak current detection unit and the Q 1 latch unit; the DC-DC output current valley control continuous mode unit includes: the device comprises a sampling intermediate capacitance current unit, an intermediate capacitance current error amplifying unit, a valley current detecting unit and a Q 2 latch unit;
The input voltage sampling unit and the output current error amplifying unit are respectively connected with two input ends of the multiplier unit, the output end of the multiplier unit is connected with the non-inverting input end of the comparator of the peak current detecting unit, and the inverting input end of the comparator of the peak current detecting unit collects the current of the branch where the power MOS switch tube Q 1 is located and outputs the current to the R end of the Q 1 latch; the I L1 current zero detection unit detects the current passing through the first inductor L 1 and outputs the current to the S end of the Q 1 latch; the Q 1 latch outputs a control signal to the power MOS switch tube Q 1;
The sampling intermediate capacitance current unit is connected with the comparator non-inverting input end of the valley current detection unit through the inter-capacitance current error amplification unit, and the comparator inverting input end of the valley current detection unit collects the current of the branch where the second inductor L 2 is located and outputs the current to the S end of the Q 2 latch; and the R end of the Q 2 latch is connected with the output end of the peak current detection unit and outputs a control signal to the power MOS switch tube Q 2.
4. The method for electrolytic capacitor less control of an improved Sepic-LED driver circuit of claim 1, wherein: the specific structure of the LED driving circuit is as follows: one end of the input alternating current source U in is connected with the anode of the first power diode D 1 and the cathode of the third power diode, and the other end of the input alternating current source U in is connected with the anode of the second power diode D 2 and the cathode of the fourth power diode D 4; One end of the first inductor L 1 is connected with the cathode of the first power diode D 1 and the cathode of the second power diode D 2; the other end of the first inductor L 1 is connected with the drain electrode of the power MOS switch tube Q 1 and one end of the intermediate capacitor C; The source electrode of the power MOS switch tube Q 1 is connected with the cathode of the third power diode D 3 and the cathode of the fourth power diode D 4; one end of the second inductor L 2 is connected with the anode of the fifth power diode D 5, and the other end of the second inductor L 2 is connected with the cathode of the sixth power diode and the source electrode of the power MOS switch tube Q 2; the drain electrode of the power MOS tube Q 2 is connected with the cathode of the seventh power diode D 7; the anode of the sixth power diode D 6 is connected with the anode of the seventh power diode D 7; One end of the output capacitor C o is connected with the anode of the LED and the cathode of the fifth power diode D 5, and the other end of the output capacitor C o is connected with the cathode of the LED and the anode of the seventh power diode D 7.
5. The method for electrolytic capacitor less control of an improved Sepic-LED driver circuit of claim 4, wherein: the first inductor L 1 and the second inductor L 2 are both high-frequency inductors.
6. The method for electrolytic capacitor less control of an improved Sepic-LED driver circuit of claim 4, wherein: the intermediate capacitor C and the output capacitor C o are both thin film capacitors.
7. The method for electrolytic capacitor less control of an improved Sepic-LED driver circuit of claim 4, wherein: the first power diode D 1, the second power diode D 2, the third power diode D 3, the fourth power diode D 4, the fifth power diode D 5, the sixth power diode D 6, and the seventh power diode D 7 are all fast recovery power diodes.
8. The method for electrolytic capacitor less control of an improved Sepic-LED driver circuit of claim 4, wherein: the power MOS switch tube Q 1、Q2 is a silicon-based power MOS tube or an IGBT or a wide bandgap semiconductor power MOS tube.
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