CN103996707B - Add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof - Google Patents
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 95
- 238000002360 preparation method Methods 0.000 title claims description 5
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 56
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 48
- 238000002161 passivation Methods 0.000 claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 7
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- 229910005883 NiSi Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 229910002601 GaN Inorganic materials 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
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- 229910052733 gallium Inorganic materials 0.000 claims description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 2
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 2
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- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
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Abstract
本发明公开了一种加栅场板增强型AlGaN/GaN HEMT器件结构及其制作方法,所述结构包括衬底、本征GaN层、AlN隔离层、本征AlGaN层、AlGaN掺杂层、p型GaN层、栅电极、源电极、漏电极、栅场板、绝缘层、钝化层以及用于调节二维电子气浓度的硅化物。所述源电极、漏电极以及绝缘层位于AlGaN掺杂层之上,所述栅电极位于p型GaN层之上,硅化物位于绝缘层之上。栅场板与栅电极电连接,所述的硅化物,对绝缘层和AlGaN层引入压应力,硅化物之间的AlGaN层受到张应力,通过使块间距小于块宽度,使得AlGaN层总体获得张应力,增大2DEG的浓度。
The invention discloses a grid field plate enhanced AlGaN/GaN HEMT device structure and a manufacturing method thereof. The structure includes a substrate, an intrinsic GaN layer, an AlN isolation layer, an intrinsic AlGaN layer, an AlGaN doped layer, a p Type GaN layer, gate electrode, source electrode, drain electrode, gate field plate, insulating layer, passivation layer and silicide used to adjust the concentration of two-dimensional electron gas. The source electrode, the drain electrode and the insulating layer are located on the AlGaN doped layer, the gate electrode is located on the p-type GaN layer, and the silicide is located on the insulating layer. The grid field plate is electrically connected to the gate electrode. The silicide introduces compressive stress to the insulating layer and the AlGaN layer, and the AlGaN layer between the silicides is subjected to tensile stress. By making the block spacing smaller than the block width, the overall AlGaN layer obtains tension. Stress increases the concentration of 2DEG.
Description
技术领域technical field
本发明属于微电子技术领域,涉及半导体器件制作,具体的说是一种加栅场板增强型AlGaN/GaNHEMT器件结构及制作方法,可用于制作低导通电阻、高频率、高击穿电压的增强型高电子迁移率晶体管。The invention belongs to the field of microelectronics technology, and relates to the manufacture of semiconductor devices, in particular to a grid field plate enhanced AlGaN/GaN HEMT device structure and manufacturing method, which can be used to manufacture low on-resistance, high frequency, high breakdown voltage Enhancement Mode High Electron Mobility Transistor.
背景技术Background technique
近年来以SiC和GaN为代表的第三带宽禁带隙半导体以其禁带宽度大、击穿电场高、热导率高、饱和电子速度大和异质结界面二维电子气浓度高等特性,使其受到广泛关注。在理论上,利用这些材料制作的高电子迁移率晶体管HEMT、发光二极管LED、激光二极管LD等器件比现有器件具有明显的优越特性,因此近些年来国内外研究者对其进行了广泛而深入的研究,并取得了令人瞩目的研究成果。In recent years, the third bandgap semiconductor represented by SiC and GaN has the characteristics of large bandgap, high breakdown electric field, high thermal conductivity, high saturated electron velocity and high concentration of two-dimensional electron gas at the heterojunction interface. It has received widespread attention. In theory, high electron mobility transistor HEMT, light emitting diode LED, laser diode LD and other devices made of these materials have obvious superior characteristics than existing devices, so in recent years, researchers at home and abroad have conducted extensive and in-depth research on them. research and achieved remarkable results.
AlGaN/GaN异质结高电子迁移率晶体管HEMT在高温器件及大功率微波器件方面已显示出了得天独厚的优势,追求器件高频率、高压、高功率吸引了众多的研究。近年来,制作更高频率高压AlGaN/GaNHEMT成为关注的又一研究热点。由于AlGaN/GaN异质结生长完成后,异质结界面就存在大量二维电子气2DEG,当界面处电阻率降低时,我们可以获得更高的器件频率特性。AlGaN/GaN异质结电子迁移率晶体管可以获得很高的频率,但往往要以牺牲耐高压特性为代价。目前提高的AlGaN/GaN异质结晶体管频率的方法如下:AlGaN/GaN heterojunction high electron mobility transistor HEMT has shown unique advantages in high-temperature devices and high-power microwave devices. The pursuit of high-frequency, high-voltage, and high-power devices has attracted a lot of research. In recent years, fabrication of higher frequency and high voltage AlGaN/GaN HEMTs has become another research focus. After the growth of the AlGaN/GaN heterojunction is completed, there will be a large amount of two-dimensional electron gas 2DEG at the interface of the heterojunction. When the resistivity at the interface is reduced, we can obtain higher device frequency characteristics. AlGaN/GaN heterojunction electron mobility transistors can achieve very high frequencies, but often at the expense of high-voltage withstand characteristics. The current method of increasing the frequency of AlGaN/GaN heterojunction transistors is as follows:
1.结合无电介质钝化(dielectric-freepassivation)与重生长欧姆接触来减小电阻率。参见YuanzhengYue,ZongyangHu,JiaGuo等InAlN/AlN/GaNHEMTsWithRegrownOhmicContactsandfTof370GH。EDL.Vol33.NO.7,P1118-P1120。该方法采用了30纳米栅长,并且结合无电介质钝化(dielectric-freepassivation)与重生长欧姆接触来减小源漏电阻率。频率可以达到370GHz。还可以通过减少沟道长度继续提高频率到500GHz。1. Combining dielectric-free passivation with regrown ohmic contacts to reduce resistivity. See Yuanzheng Yue, Zongyang Hu, Jia Guo et al. InAlN/AlN/GaNHEMTsWithRegrownOhmicContactsandf T of 370GH. EDL.Vol33.NO.7, P1118-P1120. The approach uses a 30nm gate length and combines dielectric-freepassivation with regrown ohmic contacts to reduce source-drain resistivity. The frequency can reach 370GHz. It is also possible to continue to increase the frequency to 500GHz by reducing the channel length.
2.重生长重掺杂源漏到近栅的二维电子气沟道。参见Shinohara,K.Regan,D.Corrion,A.Brown等self-aligned-gateGaN-HEMTswithheavily-dopedn+-GaNohmiccontactsto2DEG;IEDM,IEEE;2012。过去重生长n+GaN欧姆接触对减少沟道接触电阻成效显著,但是重掺杂源漏接触直接到接近栅电极下的二维电子气沟道可以获得更好的频率特性和电流特性。文中报道的方法使频率达到了fT/fmax=342/518GHz。同时击穿电压14V。2. Re-grow a two-dimensional electron gas channel from the heavily doped source-drain to the gate. See Shinohara, K. Regan, D. Corrion, A. Brown et al. self-aligned-gateGaN-HEMTswithheavily-dopedn + -GaNohmiccontactsto2DEG; IEDM, IEEE; 2012. In the past, the re-growth of n + GaN ohmic contact was effective in reducing the channel contact resistance, but the heavily doped source-drain contact directly to the two-dimensional electron gas channel close to the gate electrode can obtain better frequency characteristics and current characteristics. The method reported in the paper makes the frequency f T /fmax = 342/518 GHz. At the same time, the breakdown voltage is 14V.
发明内容Contents of the invention
本发明的目的在于针对以上高频率器件的不足,提供一种基于硅化物对沟道产生应力的方法,以同时提高增强型AlGaN/GaN高迁移率晶体管的频率特性耐压特性,增强工艺的可控性和重复性,满足GaN基电子器件对高频率、高电压的应用要求。The purpose of the present invention is to address the shortcomings of the above high-frequency devices, to provide a method based on silicide-induced stress on the channel, so as to simultaneously improve the frequency characteristics and withstand voltage characteristics of the enhanced AlGaN/GaN high-mobility transistor, and enhance the reliability of the process. Controllability and repeatability, meeting the application requirements of GaN-based electronic devices for high frequency and high voltage.
本发明是这样实现的:The present invention is achieved like this:
本发明的技术思路是:使用外延生长并刻蚀的方法在AlGaN之上生长绝缘层,通过刻蚀生成台阶状的一厚一薄绝缘层,再在薄绝缘层上生长多个块状硅化物,硅化物块间距小于块宽度,在厚绝缘层上也生长硅化物形成场板并连于栅电极。由于硅化物的热膨胀系数大于绝缘层与AlGaN的热膨胀系数。当外延生长冷却时,硅化物会对绝缘层以及AlGaN层引入压应力,与此同时,位于硅化物之间的AlGaN层将会受到张应力。当AlGaN层受到压应力的时候,位于AlGaN/GaN界面的2DEG浓度有所减小,而当AlGaN层受到张应力的时候,位于AlGaN/GaN界面的2DEG浓度有所增加。AlGaN层所受压应力(张应力)的大小与硅化物(硅化物间距)的长度有关,这种关系并非是一种线性关系,而是当作用距离减小时AlGaN层所受到的应力对极化电荷的影响迅速增加(如下图2所示),所以我们可以使硅化物的宽度、硅化物之间的间距不同来实现二维电子气浓度的调节,从整体上来看2DEG浓度的增加还是减少则取决于二者的大小关系,在此发明中,我们选择使二维电子气浓度增加来降低沟道电阻。所以张应力要大于压应力,于是硅化物宽度要大于硅化物间距。如图2所示,如果硅化物的宽度为1μm,硅化物间距为0.25μm,.那么硅化物间距(0.25μm)区域所经受的张力作用使极化电荷最终比硅化物区域(1μm)的极化电荷大两个数量级,所以整体上的作用表现为AlGaN层受到张应力即极化电荷浓度有所增加,从而栅源间与栅漏间2DEG的浓度也因为极化电荷的增加而呈现整体增加的结果。因此该区域的电阻有有所减小。参见IEICETRANS.ELECTON,VOL.E93-C,NO.8AUGUST2010.AnalysisofPassivation-Film-InducedStressEffectsonElectricalPropertiesinAlGaN/GaNHEMTs.通过选择使硅化物之间的间距小于硅化物的长度,使2DEG浓度的增长远大于2DEG浓度的减小的,从而使栅漏与栅源间的电阻有所减小,在不改变栅漏间距的情况下提高高迁移率晶体管的频率特性。在厚绝缘层上的场板由于介质较厚,对2DEG的影响可忽略,但是连于栅电极后可以起到场板的作用,可以提高本发明的耐压特性。The technical idea of the present invention is: use the method of epitaxial growth and etching to grow an insulating layer on AlGaN, form a stepped insulating layer with one thick and one thin insulating layer by etching, and then grow multiple massive silicides on the thin insulating layer , the silicide block spacing is smaller than the block width, and the silicide is also grown on the thick insulating layer to form a field plate and connect to the gate electrode. Because the thermal expansion coefficient of the silicide is greater than that of the insulating layer and AlGaN. When the epitaxial growth cools, the silicide will introduce compressive stress to the insulating layer and the AlGaN layer, and at the same time, the AlGaN layer located between the silicide will be subjected to tensile stress. When the AlGaN layer is subjected to compressive stress, the 2DEG concentration at the AlGaN/GaN interface decreases, and when the AlGaN layer is subjected to tensile stress, the 2DEG concentration at the AlGaN/GaN interface increases. The magnitude of the compressive stress (tensile stress) on the AlGaN layer is related to the length of the silicide (silicide spacing). This relationship is not a linear relationship, but the stress on the AlGaN layer versus the polarization when the action distance is reduced. The influence of charge increases rapidly (as shown in Figure 2 below), so we can make the width of the silicide and the spacing between the silicides different to realize the adjustment of the two-dimensional electron gas concentration. On the whole, the increase or decrease of the 2DEG concentration depends on Depending on the size relationship between the two, in this invention, we choose to increase the concentration of the two-dimensional electron gas to reduce the channel resistance. Therefore, the tensile stress is greater than the compressive stress, so the silicide width is greater than the silicide spacing. As shown in Figure 2, if the width of the silicide is 1 μm, and the silicide spacing is 0.25 μm, then the tension experienced by the silicide spacing (0.25 μm) region makes the polarized charge finally larger than the pole of the silicide region (1 μm). The polarized charge is two orders of magnitude larger, so the overall effect is that the AlGaN layer is subjected to tensile stress, that is, the polarized charge concentration increases, so the concentration of 2DEG between the gate source and the gate drain also increases due to the increase in the polarized charge. the result of. Therefore, the resistance of this region is reduced. See IEICETRANS.ELECTON, VOL.E93-C, NO.8AUGUST2010. Analysis of Passivation-Film-Induced Stress Effect on Electrical Properties in AlGaN/GaNHEMTs. By choosing to make the spacing between silicides smaller than the length of silicides, the increase in 2DEG concentration is much greater than the decrease in 2DEG concentration Therefore, the resistance between the gate-drain and the gate-source is reduced, and the frequency characteristic of the high-mobility transistor is improved without changing the distance between the gate and the drain. The field plate on the thick insulating layer has a negligible effect on the 2DEG due to its thick dielectric, but it can play the role of a field plate after being connected to the gate electrode, which can improve the withstand voltage characteristics of the present invention.
依据上述技术思路,一种加栅场板增强型AlGaN/GaNHEMT器件结构,所述结构包括衬底、本征GaN层、AlN隔离层、本征AlGaN层、AlGaN掺杂层.p型GaN层、栅电极、源电极、漏电极、栅场板、绝缘层、钝化层以及用于调节二维电子气浓度的硅化物;所述AlGaN掺杂层位于本征AlGaN层之上,p型GaN层位于AlGaN掺杂层之上,源漏电极以及绝缘层位于AlGaN掺杂层之上,栅电极位于p型GaN层之上,硅化物位于绝缘层之上;在衬底上外延生长有增强型AlGaN/GaN异质结材料,并在该异质结材料上形成有源电极和漏电极,然后淀积一层绝缘层,其中厚绝缘层位于栅电极与漏电极之间,紧挨栅电极,厚度为200nm-700nm;薄绝缘层分别位于厚绝缘层与漏电极之间和栅电极与源电极之间,厚度为5~10nm,在绝缘层上的栅漏区域以及栅源区域间,形成有硅化物,硅化物为块状,会对绝缘层和AlGaN层引入压应力,位于硅化物之间的AlGaN层会受到张应力,通过使块间距小于块宽度,使得AlGaN层总体获得张应力,从而使沟道中2DEG得到增强,所述的硅化物包括NiSi,TiSi2或Co2Si,将厚绝缘层上的硅化物与栅电极电连接形成栅场板;栅电极下方存在p-GaN外延层,形成增强型器件。最后淀积钝化层实现器件的钝化。According to the above technical idea, a gate field plate enhanced AlGaN/GaN HEMT device structure, the structure includes a substrate, an intrinsic GaN layer, an AlN isolation layer, an intrinsic AlGaN layer, an AlGaN doped layer, a p-type GaN layer, Gate electrode, source electrode, drain electrode, gate field plate, insulating layer, passivation layer and silicide for adjusting two-dimensional electron gas concentration; the AlGaN doped layer is located on the intrinsic AlGaN layer, and the p-type GaN layer Located on the AlGaN doped layer, the source and drain electrodes and the insulating layer are located on the AlGaN doped layer, the gate electrode is located on the p-type GaN layer, and the silicide is located on the insulating layer; an enhanced AlGaN is epitaxially grown on the substrate /GaN heterojunction material, and form the source electrode and the drain electrode on the heterojunction material, and then deposit a layer of insulating layer, wherein the thick insulating layer is located between the gate electrode and the drain electrode, close to the gate electrode, the thickness of 200nm-700nm; the thin insulating layer is respectively located between the thick insulating layer and the drain electrode and between the gate electrode and the source electrode, with a thickness of 5-10nm, and a silicide is formed between the gate-drain region and the gate-source region on the insulating layer The silicide is blocky, which will introduce compressive stress to the insulating layer and the AlGaN layer, and the AlGaN layer located between the silicides will be subjected to tensile stress. By making the block spacing smaller than the block width, the AlGaN layer will obtain tensile stress as a whole, so that 2DEG is enhanced in the channel, the silicide includes NiSi, TiSi 2 or Co 2 Si, the silicide on the thick insulating layer is electrically connected to the gate electrode to form a gate field plate; there is a p-GaN epitaxial layer under the gate electrode, forming Enhanced device. Finally, a passivation layer is deposited to passivate the device.
本发明中的衬底材料是蓝宝石、碳化硅、GaN或MgO,本征AlGaN层和AlGaN掺杂层中Al与Ga的组份能够调节,AlxGa1-xN中的x=0~1,其本征GaN层能够替换为AlGaN层,而该AlGaN中Al组份小于本征AlGaN层和AlGaN掺杂层中的Al组份,p型GaN材料能够替换为p型AlGaN材料或者p型InGaN材料。依据上述技术思路,利用金属硅化物提高增强型AlGaN/GaNHEMT器件性能的结构,包括如下过程:The substrate material in the present invention is sapphire, silicon carbide, GaN or MgO, the composition of Al and Ga in the intrinsic AlGaN layer and the AlGaN doped layer can be adjusted, x=0~1 in AlxGa1 - xN , the intrinsic GaN layer can be replaced by an AlGaN layer, and the Al composition in the AlGaN is smaller than the Al composition in the intrinsic AlGaN layer and the AlGaN doped layer, and the p-type GaN material can be replaced by a p-type AlGaN material or a p-type InGaN Material. According to the above technical idea, the structure of improving the performance of enhanced AlGaN/GaN HEMT devices by using metal silicide includes the following process:
(1)对外延生长的增强型p-GaN/AlGaN/GaN材料进行有机清洗,用流动的去离子水清洗并放入HCl∶H2O=1∶1体积比的溶液中进行腐蚀30-60s,最后用流动的去离子水清洗并用高纯氮气吹干;(1) The epitaxially grown enhanced p-GaN/AlGaN/GaN material is organically cleaned, cleaned with flowing deionized water, and etched in a solution with a volume ratio of HCl:H 2 O = 1:1 for 30-60s , and finally washed with flowing deionized water and dried with high-purity nitrogen;
(2)对清洗干净的p-GaN/AlGaN/GaN材料进行光刻和干法刻蚀,形成有源区台面;(2) Perform photolithography and dry etching on the cleaned p-GaN/AlGaN/GaN material to form active region mesas;
(3)对制备好台面的p-GaN/AlGaN/GaN材料进行光刻,形成p-GaN的刻蚀区域;(3) Perform photolithography on the p-GaN/AlGaN/GaN material prepared on the mesa to form an etching region of p-GaN;
(4)并将材料放入ICP干法刻蚀反应室中,工艺条件为:上电极功率为200W,下电极功率为20W,反应室压力为1.5Pa,Cl2的流量为10sccm,Ar气的流量为10sccm,刻蚀时间为10min,刻蚀掉栅电极区域外的p-GaN外延层;(4) and put the material into the ICP dry etching reaction chamber, the process conditions are: the power of the upper electrode is 200W, the power of the lower electrode is 20W, the pressure of the reaction chamber is 1.5Pa , the flow of Cl is 10sccm, and the flow of Ar gas The flow rate is 10sccm, the etching time is 10min, and the p-GaN epitaxial layer outside the gate electrode area is etched away;
(5)对完成刻蚀的p-GaN/AlGaN/GaN材料进行光刻,形成源漏欧姆接触区,放入电子束蒸发台中淀积欧姆接触金属Ti/Al/Ni/Au=20/120/45/50nm并进行剥离,最后在氮气环境中进行850℃、35s的快速热退火,形成欧姆接触;(5) Perform photolithography on the etched p-GaN/AlGaN/GaN material to form a source-drain ohmic contact area, and put it into an electron beam evaporation table to deposit ohmic contact metal Ti/Al/Ni/Au=20/120/ 45/50nm and peel off, and finally perform rapid thermal annealing at 850°C for 35s in a nitrogen environment to form an ohmic contact;
(6)将器件放入磁控溅射反应室中制备Al2O3薄膜,工艺条件为:Al靶的直流偏置电压为100V,Ar气流量为30sccm,O2流量为10sccm,反应室的压力为0.5Pa,淀积300nm厚的Al2O3薄膜;(6) Put the device into a magnetron sputtering reaction chamber to prepare Al 2 O 3 thin films, the process conditions are: the DC bias voltage of the Al target is 100V, the Ar gas flow is 30 sccm, the O flow is 10 sccm, the pressure of the reaction chamber 0.5Pa, deposit a 300nm thick Al 2 O 3 film;
(7)对完成淀积的器件进行光刻显影,形成Al2O3薄膜的湿法腐蚀区,将材料放入HF∶H2O=1∶10体积比的溶液中,腐蚀3-5min,将Al2O3腐蚀至5-10nm;(7) Perform photolithography and development on the deposited device to form a wet etching area of Al2O3 film, put the material into a solution with a volume ratio of HF : H2O =1:10, etch for 3-5min, Etch Al 2 O 3 to 5-10nm;
(8)然后将器件放入磁控溅射的反应室中同时溅射Ni和Si,工艺条件为:Ni靶的直流偏置电压为100V,Si靶的射频偏置电压为450V,载气Ar的流量为30sccm,共淀积100nm~150nm厚的混合金属薄膜;(8) Then put the device into the magnetron sputtering reaction chamber to sputter Ni and Si simultaneously. The process conditions are: the DC bias voltage of the Ni target is 100V, the RF bias voltage of the Si target is 450V, and the carrier gas Ar The flow rate is 30sccm, and a mixed metal film with a thickness of 100nm to 150nm is co-deposited;
(9)将淀积好薄膜的器件进行光刻,形成混合薄膜的刻蚀窗口区,并放入ICP干法刻蚀反应室中,工艺条件为:上电极功率为200W,下电极功率为20W,反应室压力为1.5Pa,CF4的流量为20sccm,Ar气的流量为10sccm,刻蚀时间为5min,经过干法刻蚀后在器件上留下来的硅化物为块状,并使得硅化物块之间的间距小于硅化物块宽度;(9) Perform photolithography on the device with the deposited film to form the etching window area of the mixed film, and put it into the ICP dry etching reaction chamber. The process conditions are: the power of the upper electrode is 200W, and the power of the lower electrode is 20W , the reaction chamber pressure is 1.5Pa, the flow rate of CF 4 is 20sccm, the flow rate of Ar gas is 10sccm, and the etching time is 5min. the spacing between the blocks is smaller than the silicide block width;
(10)将器件放入快速退火炉中,在氮气环境下进行450℃,30s的快速热退火,形成NiSi合金,硅化物会对绝缘层和AlGaN层引入压应力,位于硅化物之间的AlGaN层会受到张应力,通过使块间距小于块宽度,使得AlGaN层总体获得张应力,从而使沟道中2DEG得到增强;(10) Put the device into a rapid annealing furnace, and perform rapid thermal annealing at 450°C for 30s in a nitrogen atmosphere to form a NiSi alloy. The silicide will introduce compressive stress to the insulating layer and the AlGaN layer, and the AlGaN between the silicide The layer will be subjected to tensile stress. By making the block spacing smaller than the block width, the AlGaN layer will obtain tensile stress as a whole, thereby enhancing the 2DEG in the channel;
(11)对完成合金的器件进行光刻,形成栅电极以及栅场板区域,并将器件放入HF∶H2O=1∶1体积比的溶液中将栅电极区域的Al2O3完全腐蚀形成栅电极以及栅场板窗口,然后放入电子束蒸发台中淀积Ni/Au=20/200nm并进行剥离,完成栅电极以及栅场板的制备;(11) Perform photolithography on the completed alloy device to form the gate electrode and the gate field plate region, and put the device into a solution with a volume ratio of HF:H 2 O = 1:1 to complete the Al 2 O 3 in the gate electrode region Etch to form gate electrode and grid field plate window, then put Ni/Au=20/200nm into the electron beam evaporation station to deposit and lift off, and complete the preparation of gate electrode and grid field plate;
(12)将完成栅电极制备的器件放入PECVD反应室淀积SiN钝化膜,具体工艺条件为:SiH4的流量为40sccm,NH3的流量为10sccm,反应室压力为1~2Pa,射频功率为40W,淀积200nm~300nm厚的SiN钝化膜;(12) Put the device with the gate electrode prepared into the PECVD reaction chamber to deposit the SiN passivation film. The specific process conditions are: the flow rate of SiH 4 is 40 sccm, the flow rate of NH 3 is 10 sccm, the pressure of the reaction chamber is 1-2Pa, radio frequency With a power of 40W, deposit a SiN passivation film with a thickness of 200nm to 300nm;
(13)将器件再次进行清洗、光刻显影,形成SiN薄膜的刻蚀区,并放入ICP干法刻蚀反应室中,工艺条件为:上电极功率为200W,下电极功率为20W,反应室压力为1.5Pa,CF4的流量为20sccm,Ar气的流量为10sccm,刻蚀时间为10min,将源电极、漏电极和栅电极上面覆盖的SiN和Al2O3薄膜刻蚀掉;(13) The device is cleaned again, photolithographically developed, and the etching area of the SiN film is formed, and put into the ICP dry etching reaction chamber. The process conditions are: the power of the upper electrode is 200W, and the power of the lower electrode is 20W. The chamber pressure is 1.5 Pa, the flow rate of CF 4 is 20 sccm, the flow rate of Ar gas is 10 sccm, and the etching time is 10 min, and the SiN and Al 2 O 3 films covered on the source electrode, drain electrode and gate electrode are etched away;
(14)将器件进行清洗、光刻显影,并放入电子束蒸发台中淀积Ti/Au=20/200nm的加厚电极,完成整体器件的制备。(14) The device is cleaned, photolithographically developed, and placed in an electron beam evaporation station to deposit a thickened electrode with Ti/Au=20/200nm to complete the preparation of the overall device.
本发明具有如下优点:The present invention has the following advantages:
(1)本发明的器件采用淀积绝缘层与硅化物的方法,对AlGaN产生应力作用,调节沟道内电子气浓度和电场强度。提高器件频率特性。(1) The device of the present invention adopts the method of depositing an insulating layer and silicide to generate stress on AlGaN and adjust the electron gas concentration and electric field strength in the channel. Improve device frequency characteristics.
(2)本发明中所制备硅化物位于栅漏与栅源之间,提高频率特性的同时不需要减少栅漏距离,从而无需牺牲耐高压特性。(2) The silicide prepared in the present invention is located between the gate-drain and the gate-source, which improves the frequency characteristics without reducing the distance between the gate and the drain, thus without sacrificing the high-voltage resistance characteristics.
(3)本发明中由于可以在栅漏与栅源之间根据需要调节硅化物的大小以及间距,从而调节应力作用大小。栅源间与栅漏间电子气浓度以及频率特性可以根据需要调节。(3) In the present invention, the size and spacing of the silicide can be adjusted between the gate-drain and the gate-source as required, thereby adjusting the magnitude of the stress. The electron gas concentration between gate-source and gate-drain and frequency characteristics can be adjusted as required.
(4)本发明中栅场板的加入提高了器件的耐压特性。(4) The addition of the gate field plate in the present invention improves the withstand voltage characteristics of the device.
附图说明Description of drawings
通过参照附图更详细地描述本发明的示例性实施例,本发明的以上和其它方面及优点将变得更加易于清楚,在附图中:The above and other aspects and advantages of the invention will become more readily apparent by describing in more detail exemplary embodiments of the invention with reference to the accompanying drawings, in which:
图1是本发明器件的剖面结构示意图;Fig. 1 is the sectional structure schematic diagram of device of the present invention;
图2是物理原理说明图(极化电荷随硅化物宽度的变化);Figure 2 is an illustration of the physical principle (the change of polarization charge with the width of the silicide);
图3是本发明器件的制作工艺流程示意图。Fig. 3 is a schematic diagram of the manufacturing process flow of the device of the present invention.
具体实施方式detailed description
在下文中,现在将参照附图更充分地描述本发明,在附图中示出了各种实施例。然而,本发明可以以许多不同的形式来实施,且不应该解释为局限于在此阐述的实施例。相反,提供这些实施例使得本公开将是彻底和完全的,并将本发明的范围充分地传达给本领域技术人员。Hereinafter, the invention will now be described more fully with reference to the accompanying drawings, in which various embodiments are shown. However, this invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
在下文中,将参照附图更详细地描述本发明的示例性实施例。Hereinafter, exemplary embodiments of the present invention will be described in more detail with reference to the accompanying drawings.
参照图1,一种加栅场板增强型AlGaN/GaNHEMT器件结构,所述结构包括衬底、本征GaN层、AlN隔离层、本征AlGaN层、AlGaN掺杂层、p型GaN层、栅电极、源电极、漏电极、栅场板、绝缘层、钝化层以及用于调节二维电子气浓度的硅化物;所述AlGaN掺杂层位于本征AlGaN层之上,p型GaN层位于AlGaN掺杂层之上,源漏电极以及绝缘层位于AlGaN掺杂层之上,栅电极位于p型GaN层之上,硅化物位于绝缘层之上;在衬底上外延生长有增强型AlGaN/GaN异质结材料,并在该异质结材料上形成有源电极和漏电极,然后淀积一层绝缘层,其中厚绝缘层位于栅电极与漏电极之间,紧挨栅电极,厚度为200nm-700nm,薄绝缘层分别位于厚绝缘层与漏电极之间和栅电极与源电极之间,厚度为5~10nm,在绝缘层上的栅漏区域以及栅源区域间,形成有硅化物,硅化物会对绝缘层和AlGaN层引入压应力,位于硅化物之间的AlGaN层会受到张应力,块间距小于块宽度使得AlGaN层总体获得张应力,从而使沟道中2DEG得到增强,所述的硅化物包括NiSi,TiSi2或Co2Si,将厚绝缘层上的硅化物与栅电极电连接形成栅场板;栅电极下方存在p-GaN外延层,形成增强型器件。最后淀积钝化层实现器件的钝化。Referring to FIG. 1 , a gate field plate enhanced AlGaN/GaN HEMT device structure, the structure includes a substrate, an intrinsic GaN layer, an AlN isolation layer, an intrinsic AlGaN layer, an AlGaN doped layer, a p-type GaN layer, a gate electrode, source electrode, drain electrode, gate field plate, insulating layer, passivation layer, and silicide for adjusting the two-dimensional electron gas concentration; the AlGaN doped layer is located on the intrinsic AlGaN layer, and the p-type GaN layer is located on the On the AlGaN doped layer, the source and drain electrodes and the insulating layer are located on the AlGaN doped layer, the gate electrode is located on the p-type GaN layer, and the silicide is located on the insulating layer; an enhanced AlGaN/ GaN heterojunction material, and form the source electrode and the drain electrode on the heterojunction material, and then deposit a layer of insulating layer, wherein the thick insulating layer is located between the gate electrode and the drain electrode, close to the gate electrode, with a thickness of 200nm-700nm, the thin insulating layer is respectively located between the thick insulating layer and the drain electrode and between the gate electrode and the source electrode, with a thickness of 5-10nm, and silicide is formed between the gate-drain region and the gate-source region on the insulating layer , the silicide will introduce compressive stress to the insulating layer and the AlGaN layer, and the AlGaN layer located between the silicides will be subjected to tensile stress, and the block spacing is smaller than the block width so that the AlGaN layer generally obtains tensile stress, thereby enhancing the 2DEG in the channel. The silicide includes NiSi, TiSi 2 or Co 2 Si, and the silicide on the thick insulating layer is electrically connected to the gate electrode to form a gate field plate; there is a p-GaN epitaxial layer under the gate electrode to form an enhancement device. Finally, a passivation layer is deposited to passivate the device.
以上所述仅为本发明的实施例而已,并不用于限制本发明。本发明可以有各种合适的更改和变化。凡在本发明的精神和原则之内所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The above descriptions are only examples of the present invention, and are not intended to limit the present invention. Various suitable modifications and variations are possible in the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
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