CN103378150A - Semiconductor device and method for manufacturing same - Google Patents
Semiconductor device and method for manufacturing same Download PDFInfo
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- CN103378150A CN103378150A CN2012101211142A CN201210121114A CN103378150A CN 103378150 A CN103378150 A CN 103378150A CN 2012101211142 A CN2012101211142 A CN 2012101211142A CN 201210121114 A CN201210121114 A CN 201210121114A CN 103378150 A CN103378150 A CN 103378150A
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Abstract
The invention provides a semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device comprises a semiconductor substrate, a grid structure located on the semiconductor substrate, a first side wall and a second side wall, wherein the first side wall is located on the side wall of the grid structure, the height of the first side wall is lower than hat that of the grid structure, the second side wall is located on the side wall of the grid structure and is located on the first side wall, and the width of the bottom surface of the second side wall is larger than that of the top surface of the first side wall. Because the first side wall and the second side wall are sequentially formed on the side wall of the grid structure, the width of the bottom surface of the second side wall is larger than that of the top surface of the first side wall to form an eave-type structure, metal materials are deposited on the first side wall and the second wall at intervals in the follow-up metal silicification process, and accordingly the problem that a source region and a drain region in the grid structure and the semiconductor substrate are communicated because of diffusion of the metal materials is effectively avoided and the yield of semiconductor devices is improved.
Description
Technical field
The present invention relates to integrated circuit and make the field, relate in particular to a kind of semiconductor device and manufacture method thereof.
Background technology
Along with the integrated level of semiconductor device is more and more higher, the voltage and current of semiconductor device need of work constantly reduces, and the speed of transistor switch is also accelerated thereupon, the semiconductor technology each side is required significantly to improve thereupon.
Metal-oxide semiconductor (MOS) (CMOS) device comprises core devices layer and interconnection layer, in the core devices layer, form the structures such as grid, source electrode and drain electrode, by the metal throuth hole in the interconnection layer and metal interconnecting wires the structures such as grid, source electrode and drain electrode are electrically drawn.Along with constantly reducing of device size, the contact area of metal interconnecting wires and grid, source electrode and drain electrode is constantly dwindled, and the dead resistance of its contact position increases the impact of device thereupon.In order to reduce dead resistance, metal silicide technique (Silicide) is arisen at the historic moment, because metal silicide has high-melting-point, stability and low-resistivity, and then has improved drive current and the service speed of whole element, so the application on integrated circuit technology is more and more general.
Generally speaking, metal silicide is deposited on Semiconductor substrate and the grid via heat treated mode with metal material layer.Usually metal material layer can evaporation (evaporation) or the mode of sputter (sputtering) deposit, and these metal material layers are via boiler tube or quick thermal annealing process, and in the gas (nitrogen or argon gas) of based on very high purity, just by metal and silication interfacial reaction and form metal silicide, to improve the characteristic that is electrically connected of semiconductor device.
Yet, when metal material layer is deposited on the grid, along with the continuous attenuate of the width of grid curb wall, metal material layer diffusion effect along horizontal direction in grid curb wall is more obvious, very easily cause being communicated with of grid and source-drain area, form metal silicide bridge joint (Silicide Bridge) problem, and then cause the Problem of Failure of semiconductor device.
Summary of the invention
The purpose of this invention is to provide a kind of semiconductor device and manufacture method thereof that can prevent metal silicide bridge joint (Silicide Bridge) problem.
For addressing the above problem, the invention provides a kind of semiconductor device, comprising:
Semiconductor substrate;
Grid structure is positioned on the described Semiconductor substrate;
The first side wall is positioned on the sidewall of described grid structure, and the height of described the first side wall is lower than the height of described grid structure;
The second side wall, described the second side wall is positioned at the sidewall of grid structure, and is positioned on described the first side wall;
The bottom width of described the second side wall is greater than the end face width of described the first side wall.
Further, the material of described the first side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon, and the material of described the second side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon.
Further, the material of described the first side wall is silica, and the material of described the second side wall is silicon nitride.
Further, the difference in height of described the first side wall and described grid structure is 5nm～200nm.
Further, the height of described the second side wall is 5nm～200nm.
Further, the bottom width of described the second side wall is 5nm～50nm, and the end face width of described the first side wall is 4nm～40nm.
The present invention also provides a kind of manufacture method of semiconductor device, comprising:
Semiconductor substrate is provided, forms grid structure in described Semiconductor substrate;
Cover the first side wall film in described Semiconductor substrate, and described the first side wall film is carried out chemical mechanical milling tech and returns etching technics, make the height of described the first side wall film be lower than the height of described grid structure;
Cover the second side wall film at described the first side wall film and described grid structure;
Described the second side wall film of etching is to form the second side wall at described grid structure sidewall;
Take described the second side wall as mask, described the first side wall film of etching is to form the first side wall at described grid structure sidewall;
To described the first side wall technique of pulling back, make the bottom width of described the second side wall greater than the end face width of described the first side wall.
Further, after the step of technique that described the first side wall is pulled back, also comprise: carry out silication technique for metal.
Further, described silication technique for metal comprises: plated metal material on described Semiconductor substrate, and described metal material forms the interruption deposition at described the first side wall and described the second side wall; Carry out high-temperature annealing process.
Further, the material of described the first side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon, and the material of described the second side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon.
Further, the material of described the first side wall is silica, and the material of described the second side wall is silicon nitride.
Further, the difference in height of described the first side wall and described grid structure is 5nm～200nm.
Further, the height of described the second side wall is 5nm～200nm.
Further, after the step of technique that described the first side wall is pulled back, the bottom width of described the second side wall is 5nm～50nm, and the end face width of described the first side wall is 4nm～40nm.
Than prior art, semiconductor device of the present invention and manufacture method thereof, by on the sidewall of grid structure, forming successively the first side wall and the second side wall, wherein the second side wall is positioned on described the first side wall, and the bottom width of described the second side wall is greater than the end face width of described the first side wall, be eaves type structure, thereby in follow-up process of carrying out silication technique for metal, make metal material form the interval deposition at the first side wall and the second side wall, effectively avoid the diffusion of metal material to cause the problem of the source-drain area conducting in grid structure and the Semiconductor substrate, improve the yield of semiconductor device.
Description of drawings
Fig. 1 is the structural representation of semiconductor device in one embodiment of the invention.
Fig. 2 is the schematic flow sheet of method, semi-conductor device manufacturing method in one embodiment of the invention.
Fig. 3～Figure 10 is the structural representation of fabrication of semiconductor device in one embodiment of the invention.
Embodiment
For making content of the present invention more clear understandable, below in conjunction with Figure of description, content of the present invention is described further.Certainly the present invention is not limited to this specific embodiment, and the known general replacement of those skilled in the art also is encompassed in protection scope of the present invention.
Secondly, the present invention utilizes schematic diagram to carry out detailed statement, and when example of the present invention was described in detail in detail, for convenience of explanation, schematic diagram did not amplify according to general ratio is local, should be with this as limitation of the invention.
Fig. 1 is the structural representation of semiconductor device in one embodiment of the invention.As shown in Figure 1, the invention provides a kind of semiconductor device, comprising: Semiconductor substrate 100, grid structure, the first side wall 106 and the second side wall 108.
The material of described Semiconductor substrate 100 can be monocrystalline silicon, polysilicon, amorphous silicon or silicon Germanium compound etc., also is formed with active structure (among the figure indicate) in described Semiconductor substrate 100, such as the source-drain area of semiconductor device etc.; Described grid structure is positioned on the described Semiconductor substrate 100, and described grid structure comprises gate dielectric layer 102 and the grid conducting layer 104 that is positioned on the described gate dielectric layer 102; Described gate dielectric layer 102 materials can be oxide layer or low dielectric constant material layer, the thickness range of described gate dielectric layer 102 is 1nm～10nm, that better is 5nm, the material of described grid conducting layer 104 is polysilicon, the thickness range of described grid conducting layer 104 is 200nm～800nm, that better is 500nm, and described the first side wall 106 is positioned on the sidewall of described grid structure, and the height of described the first side wall 106 is lower than the height of described grid structure; Described the second side wall 108 is positioned on first side wall 106 of sidewall of described grid structure, and the bottom width of described the second side wall 108 is greater than the end face width of described the first side wall 106.The bottom width of described the second side wall 108 can be in follow-up process of carrying out silication technique for metal greater than the end face width of described the first side wall 106, and metal material forms discontinuous deposition at the first side wall 106.
The material of described the first side wall 106 can be a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon, and the material of described the second side wall 108 can be a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon.In preferred embodiment, because silicon nitride and silica have larger etching selection ratio, and the insulating properties of silica is better than the insulating properties of silicon nitride, so selective oxidation silicon is as the material of the first side wall 106, select silicon nitride as the material of described the second side wall 108, can in follow-up technique, control preferably the adjustment to the first side wall 106 and the second side wall 108 width, prevent that better the metal material of subsequent deposition from diffusing in the grid structure simultaneously.
As shown in Figure 1, in the present embodiment, the outer wall of described the first side wall 106 favours described Semiconductor substrate 100, and in other embodiments, described the first side wall 106 can form perpendicular to described Semiconductor substrate 100 or is the shape such as " L " font according to technological requirement.
Fig. 2 is the manufacturing process schematic diagram of semiconductor device in one embodiment of the invention, and as shown in Figure 2, the manufacture method of semiconductor device in one embodiment of the invention may further comprise the steps:
Step S01: Semiconductor substrate is provided, forms grid structure in described Semiconductor substrate;
Step S02: cover the first side wall film in described Semiconductor substrate, and described the first side wall film is carried out chemical mechanical milling tech and returns etching technics, make the height of described the first side wall film be lower than the height of described grid structure;
Step S03: cover the second side wall film at described the first side wall film and described grid structure;
Step S04: described the second side wall film of etching, to form the second side wall at described grid structure sidewall;
Step S06: take described the second side wall as mask, described the first side wall film of etching is to form the first side wall at described grid structure sidewall;
Step S06: to described the first side wall technique of pulling back, make the bottom width of described the second side wall greater than the end face width of described the first side wall.
Fig. 3～Figure 10 is the structural representation of fabrication of semiconductor device in one embodiment of the invention.Such as Fig. 2～Figure 10, below describe the manufacture method that the present invention goes back semiconductor device among the embodiment in detail:
As shown in Figure 3, in step S01, provide Semiconductor substrate 100, form grid structure in described Semiconductor substrate 100; Described grid structure comprises gate dielectric layer 102 and the grid conducting layer 104 that is positioned on the described gate dielectric layer 102; The material of described gate dielectric layer 102 is oxide layer or advanced low-k materials, the thickness range of described gate dielectric layer 102 materials is 1nm～5nm, the material of described grid conducting layer 104 is polysilicon, the thickness range of described grid conducting layer 104 is 200nm～800nm, the forming process of described grid structure comprises: at first at described Semiconductor substrate 100 deposition gate dielectric films (not indicating among the figure), then, at described gate dielectric film deposition grid conductive film (not indicating among the figure); Then, form the photoresist of patterning at described gate dielectric film, and take the photoresist of described patterning as mask, the described gate dielectric film of etching and described grid conductive film are removed the photoresist of described patterning, thereby form as shown in Figure 3 structure.
As shown in Figure 4, in step S01, cover the first side wall film 106a in described Semiconductor substrate 100, and described the first side wall film 106a carried out chemical mechanical milling tech and return etching technics, form the first side wall film 106a as shown in Figure 5, the material of described the first side wall film 106a can be a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon, better, the material of described the first side wall film 106a is silica, and it has good insulation characterisitic; The height of described first grid side wall film 106a is lower than the height of described grid structure, and difference in height is 5nm～200nm, and this difference in height is the follow-up height that is formed at the second grid side wall of grid structure sidewall.
As shown in Figure 6, then, in step S03, cover the second side wall film 108a at described the first side wall film 106a and described grid structure; The material of described the second side wall film 108a can be a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon, better, the material of described the second side wall film 108a is silicon nitride, and described silicon nitride and silica have larger etching selection ratio.
As shown in Figure 7, in step S04, described the second side wall film 108a of etching is to form the second side wall 108 at described grid structure sidewall; Form the second side wall 108 at described grid structure, the height of described the second side wall is 5nm～200nm.
Shown in Fig. 7 and 8, in step S05, take described the second side wall 108 as mask, described the first side wall film 106a of etching is to form the first side wall 106 at described grid structure sidewall; In preferred embodiment, the material of described the first side wall 106 is silica, and the material of described the second side wall 108 is silicon nitride, because silicon nitride and silica have larger etching selection ratio, so can reduce etching to the damage of the second side wall 108.
As shown in Figure 9, in step S06, to described the first side wall 106 technique (Pull-Back) of pulling back, the described process using wet etching of pulling back, in preferred embodiment, the material of described the first side wall 106 is silica, can adopt the hydrofluoric acid of dilution that described the first side wall 106 is returned etching technics, thereby make the bottom width of described the second side wall 108 greater than the end face width of described the first side wall 106, namely the first side wall 106 and the second side wall 108 form eaves shape structure, in preferred embodiment, the bottom width of described the second side wall 108 is 5nm～50nm, and the end face width of described the first side wall 106 is 4nm～40nm.Can make the first side wall 106 and the second side wall 108 form eaves structure by the technique of pulling back.
As shown in figure 10, thereafter, carry out silication technique for metal, specifically comprise: plated metal material 110 on the Semiconductor substrate 100 of on described the first side wall 106 and described the second side wall 108 both sides, carry out annealing process.The bottom width of described the second side wall 108 is greater than the end face width of described the first side wall 106, be eaves type structure, thereby in plated metal material process, the first side wall 106 below close the second side wall 108, because blocking of the second side wall 108, metal material can not be deposited on this zone, thereby make metal material form deposition discontinuous, that be interrupted at the first side wall 106 and the second side wall 108, thereby the diffusion of effectively avoiding metal material causes the problem of the source-drain area conducting in grid structure and the Semiconductor substrate, improves the yield of semiconductor device.
In sum, than prior art, semiconductor device of the present invention and manufacture method thereof, by on the sidewall of grid structure, forming successively the first side wall and the second side wall, wherein the second side wall is positioned on described the first side wall, and the bottom width of described the second side wall is greater than the end face width of described the first side wall, be eaves type structure, thereby in follow-up process of carrying out silication technique for metal, make metal material form the interval deposition at the first side wall and the second side wall, effectively avoid the diffusion of metal material to cause the problem of the source-drain area conducting in grid structure and the Semiconductor substrate, improve the yield of semiconductor device.
Although the present invention discloses as above with preferred embodiment; so it is not to limit the present invention; have in the technical field under any and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (14)
1. semiconductor device comprises:
Semiconductor substrate;
Grid structure is positioned on the described Semiconductor substrate;
The first side wall is positioned on the sidewall of described grid structure, and the height of described the first side wall is lower than the height of described grid structure;
The second side wall, described the second side wall is positioned at the sidewall of grid structure, and is positioned on described the first side wall, and the bottom width of described the second side wall is greater than the end face width of described the first side wall.
2. semiconductor device as claimed in claim 1, it is characterized in that, the material of described the first side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon, and the material of described the second side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon.
3. semiconductor device as claimed in claim 2 is characterized in that, the material of described the first side wall is silica, and the material of described the second side wall is silicon nitride.
4. such as the described semiconductor device of any one in the claims 1 to 3, it is characterized in that the difference in height of described the first side wall and described grid structure is 5nm～200nm.
5. such as the described semiconductor device of any one in the claims 1 to 3, it is characterized in that the height of described the second side wall is 5nm～200nm.
6. such as the described semiconductor device of any one in the claims 1 to 3, it is characterized in that the bottom width of described the second side wall is 5nm～50nm, the end face width of described the first side wall is 4nm～40nm.
7. the manufacture method of a semiconductor device comprises:
Semiconductor substrate is provided, forms grid structure in described Semiconductor substrate;
Cover the first side wall film in described Semiconductor substrate, and described the first side wall film is carried out chemical mechanical milling tech and returns etching technics, make the height of described the first side wall film be lower than the height of described grid structure;
Cover the second side wall film at described the first side wall film and described grid structure;
Described the second side wall film of etching is to form the second side wall at described grid structure sidewall;
Take described the second side wall as mask, described the first side wall film of etching is to form the first side wall at described grid structure sidewall;
To described the first side wall technique of pulling back, make the bottom width of described the second side wall greater than the end face width of described the first side wall.
8. the manufacture method of semiconductor device as claimed in claim 7 is characterized in that, after the step of technique that described the first side wall is pulled back, also comprises: carry out silication technique for metal.
9. the manufacture method of semiconductor device as claimed in claim 8 is characterized in that, described silication technique for metal comprises:
Plated metal material on described Semiconductor substrate, described metal material forms the interruption deposition at described the first side wall and described the second side wall;
Carry out high-temperature annealing process.
10. the manufacture method of semiconductor device as claimed in claim 7, it is characterized in that, the material of described the first side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon, and the material of described the second side wall is a kind of or its combination in silicon nitride, silica, silicon oxynitride, silicon nitride or the agraphitic carbon.
11. the manufacture method of semiconductor device as claimed in claim 10 is characterized in that, the material of described the first side wall is silica, and the material of described the second side wall is silicon nitride.
12. the manufacture method such as the described semiconductor device of any one in the claim 7 to 11 is characterized in that, the difference in height of described the first side wall and described grid structure is 5nm～200nm.
13. the manufacture method such as the described semiconductor device of any one in the claim 7 to 11 is characterized in that, the height of described the second side wall is 5nm～200nm.
14. the manufacture method such as the described semiconductor device of any one in the claim 7 to 11, it is characterized in that, after the step of technique that described the first side wall is pulled back, the bottom width of described the second side wall is 5nm～50nm, and the end face width of described the first side wall is 4nm～40nm.
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