CN103280965A - Power factor correction control circuit capable of reducing EMI - Google Patents
Power factor correction control circuit capable of reducing EMI Download PDFInfo
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Abstract
The invention discloses a power factor correction control circuit capable of reducing EMI. The control circuit comprises an inductive current threshold value, the peak value of the inductive current is controlled to change along with the input voltage when the inductive current is smaller than the inductive current threshold value, and the inductive current is restrained to the inductive current threshold value when the inductive current reaches the inductive current threshold value. Therefore, the maximum peak of the inductive current is reduced in the above manner, and the inductive ripple current is reduced. The power factor is guaranteed, at the same time, the EMI of the circuit is reduced, the circuit filter task is conducted simply and easily, and the power factor correction control circuit is suitable for sites of medium power and small power. The peak current stress of the circuit is low, a switch tube and other elements wear little, and the power utilization rate is improved further. The power factor correction control circuit capable of reducing the EMI meets the requirements on power supply harmonics of high-efficient factors and IEC61000-3-2, and is low in cost and small in size.
Description
The application is that application number is 201110289647.7, and the applying date is on 09 14th, 2011, and denomination of invention is divided an application for " power factor correction control circuit of a kind of EMI of reduction ".
Technical field
The present invention relates to field of power supplies, in particular, relate to the power factor correction control circuit of a kind of EMI of reduction.
Background technology
In the AC/DC application of power, in order to realize High Power Factor, generally design power factor correcting (Power Factor Correction is called for short PFC) function in circuit is the critical conduction mode power factor correcting circuit than what use always at present.On implementation, existing critical conduction mode has 2 kinds of solutions: a kind of is peak-current mode, and another kind is voltage mode.Before a kind of scheme adopts is the variation that the peak value of modulation electric inducing current is followed input voltage signal, realize the input current sineization, reach the purpose with the input voltage homophase; What a kind of scheme in back adopted is to make ON time keep constant at whole line period, and the control input current is followed input voltage and is sinusoidal variations.
In the prior art, no matter take above-mentioned which kind of scheme, its input current waveform that obtains all follows input voltage waveform in full accord, is illustrated in figure 1 as the oscillogram of electric current and voltage of the circuit of power factor correction of prior art.As can be seen from Figure 1 its weak point is that the peak value of inductive current is all higher, will make that like this inductance ripple current is bigger, cause electromagnetic interference (the Electro Magnetic Interference in the circuit, abbreviation EMI) filtering needs to strengthen, and has increased the complexity of input electromagnetic interface filter circuit.And higher peak electricity fails to be convened for lack of a quorum and makes that the conduction loss of semiconductor device is bigger.Therefore, in middle low power applications occasion, if obtain optimum performance, certainly will cause cost height, volume big, be not easy to promote the use of.
Summary of the invention
In view of this, the object of the present invention is to provide the power factor correction control circuit of a kind of EMI of reduction, reduce the ripple current of circuit by the peak-peak of restriction inductive current, thereby EMI circuit design cost and weight have been reduced, it not only can satisfy the requirement of High Power Factor and the supply harmonic of IEC61000-3-2, and cost is low, and volume is little, the cost performance height.
A kind of power factor correction control circuit that reduces EMI of the present invention, be applied to an A.C.-D.C. converter, the AC-input voltage of described A.C.-D.C. converter is via a rectification circuit, obtain a half-sinusoid input voltage, described power factor correction control circuit is controlled the state of the power switch pipe in the described A.C.-D.C. converter, and then regulate the inductive current of described A.C.-D.C. converter, it is characterized in that described power factor correction control circuit comprises an inductive current threshold value; When described inductive current during less than described inductive current threshold value, control the peak value of described inductive current and follow described half-sinusoid input voltage; When described inductive current reached described inductive current threshold value, then the peak-limitation with inductive current was described inductive current threshold value.
According to the power factor correction control circuit of one embodiment of the invention, it comprises amplitude limiter circuit, first multiplier and first comparator; Described amplitude limiter circuit is set with a upper voltage limit, and described amplitude limiter circuit receives described half-sinusoid input voltage, and when described half-sinusoid input voltage during less than described upper voltage limit value, the output voltage of described amplitude limiter circuit is followed described half-sinusoid input voltage;
When described half-sinusoid input voltage during greater than described upper voltage limit value, the output voltage of described amplitude limiter circuit is limited in described upper voltage limit; Described first multiplier receives the output voltage of described amplitude limiter circuit and characterizes the voltage feedback error signal of the output voltage of described A.C.-D.C. converter, produces first reference signal, and the upper limit magnitude of described first reference signal is described inductive current threshold value;
The inverting input of described first comparator receives described first reference signal, in-phase input end receives the inductive drop signal that characterizes described inductive current, when the inductive drop signal arrives first reference signal, produce a reset signal in order to control the shutoff of power switch pipe.
Power factor correction control circuit according to another embodiment of the present invention, it comprises a constant ON time control circuit, second comparator, the 3rd comparator and first or the door, described constant ON time control circuit is a fixed value in order to the ON time of controlling power switch pipe, it comprises a constant-current source, first electric capacity and first switching tube, described constant-current source provides charging current in order to give first electric capacity, first electric capacity is in parallel with first switching tube, shutoff by controlling first switching tube and conducting produce first ramp voltage signal to control the action that discharges and recharges of first electric capacity, to make the electric capacity two ends of winning;
The described second comparator in-phase input end receives described first ramp voltage signal, its inverting input receives the voltage feedback error signal of the output voltage that characterizes described A.C.-D.C. converter, when first ramp voltage rises to described voltage feedback error signal, produce first comparison signal;
Described the 3rd comparator in-phase input end receives the inductive drop signal that characterizes described inductive current, and its inverting input receives second reference signal, when described inductive drop signal arrives described second reference signal, produces second comparison signal;
Described first or door receive described first comparison signal and described second comparison signal, produce a reset signal in order to control the shutoff of power switch pipe.
Preferably, preestablish a voltage threshold, described inductive current threshold value is directly proportional with described voltage threshold, and its proportionality coefficient is the ratio of the numerical value of ON time and described inductance, and described inductive current threshold value is as described second reference signal.
Preferably, when inductive current did not reach described inductive current threshold value, described control circuit is according to the shutoff of described first comparison signal control power switch pipe, and was constant with the ON time of control power switch pipe; When inductive current arrived described inductive current threshold value, when namely described inductive drop signal arrived second reference signal, described control circuit was according to the shutoff of described second comparison signal control power switch pipe, with the peak value of restriction inductive current.
Power factor correction control circuit according to another embodiment of the present invention, it comprises peak signal modulation circuit, second multiplier and the 4th comparator, described peak signal modulation circuit receives input voltage signal and a serial signal, produce a peak value reference signal, wherein, described serial signal includes a data-signal and a clock signal;
Described second multiplier receives described peak value reference signal and characterizes the voltage feedback error signal of the output voltage of described A.C.-D.C. converter, produces the 3rd reference signal, and the upper limit magnitude of described the 3rd reference signal is described inductive current threshold value;
Described the 4th comparator inverting input receives described the 3rd reference signal, its in-phase input end receives the inductive drop signal that characterizes described inductive current, when the inductive drop signal arrives described the 3rd reference signal, produce a reset signal in order to control the shutoff of power switch pipe.
Further, described peak signal modulation circuit comprises digital communication circuit, analog to digital converter, the 3rd multiplier and digital to analog converter, and described digital communication circuit receives described serial signal, obtains a digital reference voltage signal, and transfers to the 3rd multiplier;
Described analog to digital converter receives input voltage signal, and is converted into the digital signal corresponding with analog input voltage signal;
Described the 3rd multiplier receives described reference voltage signal and described digital input voltage signal, produces a digital peak reference signal; Described digital to analog converter receives described digital peak reference signal, and is converted into and digital peak reference signal corresponding simulating signal.
Preferably, described serial signal arranges by outside programming, so that the peak value reference signal that digital reference voltage signal therefrom and digital input voltage obtain after multiplying each other and input voltage homophase.
Further, control circuit of the present invention also comprises zero current detection circuit and rest-set flip-flop,
Described zero current detection circuit when detecting inductive current arrival null value, is exported a zero cross signal in order to detect inductive current;
The reset terminal of described rest-set flip-flop receives the described reset signal that produces in above-mentioned three kinds of control circuits, and its set termination is received described zero cross signal, produces switching signal with shutoff and the conducting of control power switch pipe.
Beneficial effect of the present invention:
According to technical scheme of the present invention, peak inrush current reduces greatly than the scheme of prior art in the pfc circuit, and its input current and input voltage still keep homophase, when guaranteeing circuit power factor, alleviated the filtering burden of EMI, made EMI filtering simple.
According to technical scheme of the present invention, because the input current top flat after the modulation, when input current was maximum, the switching frequency of power switch pipe also more originally improved, and had further reduced the electromagnetic interface filter volume, had reduced realization cost and weight.
Because the circuit peak inrush current is lower than traditional scheme, therefore under same power output, the conduction loss of its switch and circuit element is littler, has improved utilization ratio.
Description of drawings
Figure 1 shows that the voltage and current waveform of the circuit of power factor correction of prior art;
Figure 2 shows that the circuit diagram of first embodiment of the power factor correction control circuit of reduction of the present invention EMI;
Figure 3 shows that the voltage and current waveform of circuit shown in Figure 2;
Figure 4 shows that the circuit diagram of second embodiment of the power factor correction control circuit of reduction of the present invention EMI;
Figure 5 shows that the working waveform figure of circuit shown in Figure 4;
Figure 6 shows that the circuit diagram of the 3rd embodiment of the power factor correction control circuit of reduction of the present invention EMI;
Figure 7 shows that the main oscillogram of circuit shown in Figure 6.
Embodiment
Below in conjunction with accompanying drawing several preferred embodiments of the present invention is described in detail, but the present invention is not restricted to these embodiment.The present invention is contained any in substituting of making of marrow of the present invention and scope, modification, equivalent method and scheme.Understand for the public is had completely the present invention, in the following preferred embodiment of the present invention, describe concrete details in detail, and do not have the description of these details also can understand the present invention fully for a person skilled in the art.
Power factor correction control circuit is mainly used in the A.C.-D.C. converter, the AC-input voltage of A.C.-D.C. converter is via a rectification circuit, obtain a half-sinusoid input voltage, power factor correction control circuit is used for controlling the state of the power switch pipe in the described A.C.-D.C. converter, and then regulate the inductive current of described A.C.-D.C. converter, with the modulation input current waveform, making it follow the input sinusoidal voltage changes, just as described in the background art, the effect that existing control scheme realizes all is that adjusting input current and input voltage waveform are in full accord, can there be bigger inductive current ripple in this control mode, and makes the EMI filtering of the circuit heavy complexity that becomes.Therefore for addressing the above problem, the inventor proposes a kind of new control scheme, and control circuit purpose of the present invention is to modulate the waveform of input current, the peak-peak of restriction input current, make itself and input voltage still keep homophase, but the amplitude of its waveform reduce greatly.It not only can satisfy the middle low power occasion to the requirement of power factor, and can obtain minimum ripple current, thereby also makes the EMI of circuit reach minimum.The present invention is according to the relation of input current average value in the known technology and inductive current, be input current average value be inductive current peak half, by the modulation electric inducing current, and the peak value size of restriction inductive current, to realize the purpose of modulation input current waveform, the detailed process of modulation electric inducing current is: control circuit includes an inductive current threshold value, and when inductive current during less than described inductive current threshold value, the peak value of controlling described inductive current is followed described half-sinusoid input voltage and changed; When inductive current reached described inductive current threshold value, then the peak-limitation with inductive current was described inductive current threshold value.
The inventor has proposed three kinds of solutions according to the development of prior art, corresponding three embodiment of the present invention, and below each embodiment of the power factor correction control circuit of reduction EMI of the present invention is adopted in detailed description.
With reference to figure 2, be depicted as the circuit diagram of first embodiment of the power factor correction control circuit of reduction of the present invention EMI.In this embodiment, the control scheme of critical conduction mode adopts the peak current control technology, and the control circuit 21 of present embodiment comprises amplitude limiter circuit 201, first multiplier 202, first comparator 203, zero current detection circuit 204 and rest-set flip-flop 205.
Described amplitude limiter circuit 201 is provided with a upper voltage limit value V in advance
1, described upper voltage limit value V
1Be lower than the peak value of the input voltage waveform after the sampling.The AC sinusoidal voltage of input obtains V after the rectifier bridge rectification
IN, V
INBy being transferred to amplitude limiter circuit 201 behind the resistance sampling, the voltage signal of 201 pairs of receptions of amplitude limiter circuit is cut the top and is handled, and the part that makes amplitude in the voltage waveform be higher than the upper voltage limit value is reduced to the higher limit V of setting
1, obtain the voltage signal V of a top flat
IN1, be specially: when input voltage is lower than described upper voltage limit value, the amplitude limiter circuit output voltage signal will be followed the variation of input voltage; When input voltage meets or exceeds described upper voltage limit value, output voltage will be limited in no longer becoming with input voltage, like this on the clip level (being the upper voltage limit value), the output voltage signal amplitude namely is restricted at output, thereby obtains the voltage signal V of a top flat
IN1The amplitude limiter circuit of present embodiment is a voltage stabilizing didoe, those skilled in the art as can be known, amplitude limiter circuit also can be realized by any other suitable circuit.
Seen from the above description, the voltage signal V of amplitude limiter circuit 201 outputs
IN1With input voltage signal V
INStill keep homophase, with the voltage signal V of amplitude limiter circuit 201 outputs
IN1As an input signal of first multiplier 202, first multiplier, 202 another inputs receive the voltage feedback error signal V of the output voltage that characterizes described A.C.-D.C. converter
Comp, produce first reference signal.Under stable state, the voltage feedback error signal V of output voltage
CompTo keep constant in half power frequency period, first reference signal of multiplier output will be followed voltage signal V like this
IN1Variation, the upper limit magnitude of described first reference signal is described inductive current threshold value.The inverting input of first current comparator 203 receives described first reference signal, current sampling signal on its in-phase input end received power switching tube Q, namely characterize the inductive drop signal of described inductive current, when the inductive drop signal arrived first reference signal, first comparator 203 produced a reset signal.Rest-set flip-flop 205 reset terminals receive above-mentioned reset signal, produce a switching signal with the shutoff of control power switch pipe Q, make inductive current begin to descend.When zero current detection circuit 204 detects inductive current and drops to zero, produce a zero cross signal, rest-set flip-flop 205 set terminations are received above-mentioned zero cross signal, produce a switching signal with the conducting of control power switch pipe Q, and inductive current begins to rise.
With reference to figure 3, be depicted as the voltage and current waveform of circuit shown in Figure 2, as can be seen from Figure 3, will follow voltage signal V by the inductive current that this mode is modulated
IN1Variation because voltage signal V
IN1Waveforms amplitude is limited, thereby the peak-peak of inductive current also will be limited in certain value, the peak envelope line of the inductive current that obtains so also will for one with the envelope of input voltage homophase and top flat.The average current input waveform that obtains as shown in Figure 3, thereby realized the purpose of restriction input current amplitude, reduced the input current ripple, reduced circuit EMI.
Upper voltage limit value V in the present embodiment
1By the User Defined setting, in general, if V
1What arrange is lower, and the inductive current threshold value that obtains also can be lower, and the power factor of circuit can reduce, but the inductance ripple current also can reduce, and is beneficial to the design of circuit EMI; As V
1Higher (being lower than the peak value of input voltage) that arranges, the inductive current threshold value also can be higher, and the power factor of circuit is higher, but the inductance ripple current also can increase, and the design of circuit EMI need strengthen, and the user can arrange appropriate V according to the needs of side circuit
1Value makes circuit both satisfy the power factor requirement, and can reach minimum EMI.
With reference to figure 4, be the circuit diagram of second embodiment of the power factor correction control circuit of reduction of the present invention EMI.In this embodiment, the control scheme of critical conduction mode adopts the voltage control technology, the control circuit 21 of present embodiment comprises constant ON time control circuit 401, second comparator 402, the 3rd comparator 403 and first or door 404, zero current detection circuit 405 and rest-set flip-flop 406, wherein constant ON time control circuit 404 comprises the first constant-current source 404-1, the first electric capacity 404-2 and the first switching tube 404-3, first constant-current source provides charging current I in order to give first electric capacity
S, first electric capacity is in parallel with first switching tube, and the shutoff by controlling first switching tube and conducting produce the first ramp voltage signal V to control the action that discharges and recharges of first electric capacity, to make the electric capacity two ends of winning
RampSecond comparator, 402 in-phase input ends receive the described first ramp voltage signal V
Ramp, its inverting input receives the voltage feedback error signal V of the output voltage that characterizes described A.C.-D.C. converter
Comp, when first ramp voltage rises to described voltage feedback error signal, produce first comparison signal; The 3rd comparator 403 in-phase input ends receive the inductive drop signal that characterizes described inductive current, and its inverting input receives second reference signal, when the inductive drop signal arrives second reference signal, produces second comparison signal.
A predefined voltage threshold V
Inth, described inductive current threshold value I
LimWith described voltage threshold V
InthBe directly proportional, its proportionality coefficient is ON time T
OnWith the ratio of the numerical value L of inductance, its expression formula is:
With described inductive current threshold value I
LimAs second reference signal.
First or door 404 receive described first comparison signal and described second comparison signals, produce a reset signal in order to control the shutoff of power switch pipe, be the main oscillogram of circuit shown in Figure 4 with reference to figure 5, its concrete control procedure is: when inductive current does not reach the inductive current threshold value, the reset signal that described control circuit produces according to described first comparison signal is controlled the shutoff of power switch pipe, and is constant with the ON time maintenance of control power switch pipe; When inductive current arrives the inductive current threshold value, be that described inductive drop signal is when arriving second reference signal, the reset signal that described control circuit produces according to described second comparison signal is controlled the shutoff of power switch pipe, with the peak value size of restriction inductive current.
The one output Q end of rest-set flip-flop is connected to power switch pipe Q, its another output
Be connected to the first switching tube 404-3.When rest-set flip-flop set termination is received described reset signal, its Q end output low level switching signal, switch-off power switching tube Q, inductive current begin to descend;
End output high level switching signal, the conducting first switching tube 404-3 discharges to the first electric capacity 404-2.When the zero current detection electric circuit inspection drops to null value to inductive current, produce the set end that a zero cross signal transfers to rest-set flip-flop, rest-set flip-flop Q end output this moment high level switching signal, conducting power switch pipe Q, inductive current begin to rise;
End output low level switching signal is turn-offed the first switching tube 404-3, and the first electric capacity 404-2 is charged.
Present embodiment does not need input voltage is carried out sensing, comes the peak value size of inductive current is limited by the inductive current threshold value, and from above-mentioned elaboration as can be known, the peak value of inductive current just is reduced for described inductive current threshold value greater than the part of inductive current threshold value.Fig. 3 corresponding among its corresponding voltage and current waveform and the embodiment 1 is identical, therefore also can reach technique effect similarly to Example 1.Voltage threshold V in the present embodiment
InthBy the User Defined setting, the user can require to arrange suitable V according to side circuit
Inth, circuit PF can be met the demands, and the EMI minimum.
With reference to figure 6, be depicted as the circuit diagram of the 3rd embodiment of the power factor correction control circuit of reduction of the present invention EMI.The control scheme of the critical conduction mode of present embodiment also adopts the peak current control technology, and as different from Example 1, the modulation benchmark of present embodiment inductive current peak adopts the Digital Implementation mode.The control circuit 21 of present embodiment comprises peak signal modulation circuit 601, second multiplier 602, the 4th comparator 603, zero current detection circuit 604 and rest-set flip-flop 605.
Described peak signal modulation circuit 601 comprises digital communication circuit 601-1, analog to digital converter 601-2, the 3rd multiplier 601-3, digital to analog converter 601-4, the concrete course of work is: a serial signal is set, described serial signal includes a data-signal and a clock signal, digital communication circuit 601-1 receives described serial signal, obtains a reference voltage signal V
REF, and transferring to the 3rd multiplier 601-3, described analog to digital converter 601-2 receives input voltage signal V
IN, and being converted into the digital signal corresponding with analog voltage signal, described the 3rd multiplier 601-3 receives described reference voltage signal V
REFWith described digital voltage signal V
IN, produce a digital peak reference signal; Digital to analog converter 601-4 receives described digital peak reference signal, and is converted into and digital peak reference signal corresponding simulating signal V
PREF
Be the main oscillogram of circuit shown in Figure 6 with reference to figure 7, described serial signal arranges V among the digital reference voltage signal corresponding simulating signal waveform that obtains such as Fig. 7 by outside programming
REFShown in, the peak value reference signal V that obtains after digital reference voltage signal and digital input voltage multiply each other
PREFBe defined V among concrete waveform such as Fig. 7 with input voltage homophase and amplitude
PREFShown in.
Then, second multiplier 602 receives described peak value reference signal V
PREFVoltage feedback error signal V with the output voltage that characterizes described A.C.-D.C. converter
Comp, produce the 3rd reference signal, in like manner, under stable state, the voltage feedback error signal of output voltage will keep constant in half power frequency period, and the output signal of such second multiplier 602 will be followed peak value reference signal V
PREFVariation, the upper limit magnitude of the 3rd reference signal is described inductive current threshold value.The 4th comparator 603 inverting inputs receive described the 3rd reference signal, and its in-phase input end receives the inductive drop signal that characterizes described inductive current, when the inductive drop signal arrives described the 3rd reference signal, produce a reset signal.
Afterwards, rest-set flip-flop 605 reset terminals receive described reset signal, produce switching signal control power switch pipe Q and turn-off, and inductive current begins to descend.When zero current detection circuit 604 detects inductive current and drops to zero, produce a zero cross signal, rest-set flip-flop 605 set terminations are received described zero cross signal, produce the conducting of switching signal control power switch pipe, and inductive current begins to rise.
The peak value reference signal adopts digital control approach to realize that its control strategy is more flexible in the present embodiment, can obtain the peak value reference signal to the requirement of Harmonics of Input according to user side.Same, inductive current amplitude in the present embodiment also is limited in described inductive current threshold value, the voltage and current waveform that its peak envelope line and embodiment 1 are corresponding is identical, therefore, oscillogram shown in Figure 3 equally also is applicable to present embodiment, technical scheme in the present embodiment equally also can reach and reduce the input current ripple, alleviates the technique effect of EMI filtering.
Each above-mentioned control circuit of the present invention is realized simple, only needs less components and parts can reach best technique effect, realizes that cost is low, effective.In addition, according to each control scheme of foregoing description as can be known, the less and top flat of peak envelope wire spoke value of the inductive current after being limited, so the current stress of circuit can reduce greatly, thereby the components and parts conduction loss of circuit also can correspondingly reduce, and has further improved the utilization ratio of circuit.
As indicated above according to embodiments of the invention, these embodiment do not have all details of detailed descriptionthe, do not limit this invention yet and only are described specific embodiment.Obviously, according to above description, can make many modifications and variations.These embodiment are chosen and specifically described to this specification, is in order to explain principle of the present invention and practical application better, thereby the technical field technical staff can utilize the present invention and the modification on basis of the present invention to use well under making.The present invention only is subjected to the restriction of claims and four corner and equivalent.
Claims (6)
1. power factor correction control circuit that reduces EMI, be applied to an A.C.-D.C. converter, the AC-input voltage of described A.C.-D.C. converter is via a rectification circuit, obtain a half-sinusoid input voltage, described power factor correction control circuit is controlled the state of the power switch pipe in the described A.C.-D.C. converter, and then regulate the inductive current of described A.C.-D.C. converter, it is characterized in that
Described power factor correction control circuit comprises amplitude limiter circuit, first multiplier and first comparator;
Described amplitude limiter circuit receives described half-sinusoid input voltage, and when described half-sinusoid input voltage during less than a upper voltage limit, the output voltage of described amplitude limiter circuit is followed described half-sinusoid input voltage; When described half-sinusoid input voltage during greater than described upper voltage limit, the output voltage of described amplitude limiter circuit is limited in described upper voltage limit;
Described first multiplier receives the output voltage of described amplitude limiter circuit and characterizes the voltage feedback error signal of the output voltage of described A.C.-D.C. converter, produces first reference signal, and the upper limit magnitude of described first reference signal characterizes the inductive current threshold value;
The inverting input of described first comparator receives described first reference signal, in-phase input end receives the inductive drop signal that characterizes described inductive current, when described inductive drop signal arrives first reference signal, produce a reset signal in order to control the shutoff of described power switch pipe;
When described inductive current during less than described inductive current threshold value, control the peak value of described inductive current and follow described half-sinusoid input voltage; When described inductive current reaches described inductive current threshold value, be described inductive current threshold value with the peak-limitation of described inductive current.
2. the power factor correction control circuit of reduction EMI according to claim 1 is characterized in that described amplitude limiter circuit comprises a voltage stabilizing didoe.
3. the power factor correction control circuit of reduction EMI according to claim 1 is characterized in that described amplitude limiter circuit comprises the peak signal modulation circuit; Described peak signal modulation circuit receives described half-sinusoid input voltage and a serial signal, produces a peak value reference signal, and wherein, described serial signal comprises a data-signal and a clock signal.
4. the power factor correction control circuit of reduction EMI according to claim 3 is characterized in that described peak signal modulation circuit comprises digital communication circuit, analog to digital converter, the 3rd multiplier and digital to analog converter;
Described digital communication circuit receives described serial signal, obtains a reference voltage signal, and transfers to described the 3rd multiplier;
Described analog to digital converter receives described half-sinusoid input voltage, and is converted into the digital signal corresponding with described half-sinusoid input voltage;
Described the 3rd multiplier receives described reference voltage signal and described digital signal, produces a digital peak reference signal;
Described digital to analog converter receives described digital peak reference signal, and is converted into and described digital peak reference signal corresponding simulating signal, as described peak value reference signal.
5. the power factor correction control circuit of reduction EMI according to claim 4 is characterized in that, described serial signal arranges by outside programming, so that described peak value reference signal and described half-sinusoid input voltage homophase.
6. the power factor correction control circuit of reduction EMI according to claim 1 is characterized in that described power factor correction control circuit also comprises zero current detection circuit and rest-set flip-flop,
Described zero current detection circuit is in order to detecting described inductive current, when detecting described inductive current and arrive null value, exports a zero cross signal;
The reset terminal of described rest-set flip-flop receives described reset signal, and the set termination is received described zero cross signal, produces shutoff and the conducting of switching signal to control described power switch pipe.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310237888.6A CN103280965B (en) | 2011-09-14 | 2011-09-14 | Power factor correction control circuit capable of reducing EMI |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310237888.6A CN103280965B (en) | 2011-09-14 | 2011-09-14 | Power factor correction control circuit capable of reducing EMI |
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Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103023299A (en) * | 2011-09-26 | 2013-04-03 | 南京博兰得电子科技有限公司 | Control method of power factor conversion device |
| CN103560662A (en) * | 2013-10-31 | 2014-02-05 | 广州金升阳科技有限公司 | PFC control method and control device |
| CN106208668A (en) * | 2016-09-07 | 2016-12-07 | 广州金升阳科技有限公司 | Pfc circuit, PFC control circuit and Switching Power Supply |
| CN106300953A (en) * | 2015-05-15 | 2017-01-04 | 三垦电气株式会社 | Power factor correcting method, circuit of power factor correction and Switching Power Supply |
| JP2017112641A (en) * | 2015-12-14 | 2017-06-22 | 新日本無線株式会社 | Power factor improvement circuit and power factor improvement method |
| CN106899202A (en) * | 2015-12-18 | 2017-06-27 | 亚荣源科技（深圳）有限公司 | AC-DC converter and its power factor correction circuit |
| CN110650576A (en) * | 2019-10-30 | 2020-01-03 | 威海东兴电子有限公司 | Voltage automatic following sliding frequency power factor correction circuit |
| CN111464026A (en) * | 2020-05-22 | 2020-07-28 | 矽力杰半导体技术(杭州)有限公司 | Control circuit and switching converter using same |
| WO2021057851A1 (en) * | 2019-09-24 | 2021-04-01 | 上海晶丰明源半导体股份有限公司 | Control circuit with high power factor and ac/dc conversion circuit |
| CN113015286A (en) * | 2021-02-25 | 2021-06-22 | 深圳欧创芯半导体有限公司 | PWM dimming method and device |
| US11716011B2 (en) | 2020-12-07 | 2023-08-01 | Silergy Semiconductor Technology (Hangzhou) Ltd | Communication control circuit for power supply chip |
| US11764677B2 (en) | 2020-10-27 | 2023-09-19 | Silergy Semiconductor Technology (Hangzhou) Ltd | Control circuit, switching converter and integrated circuit |
| CN116846200A (en) * | 2023-08-30 | 2023-10-03 | 苏州锴威特半导体股份有限公司 | Control chip and PFC converter |
| US12191773B2 (en) | 2021-07-29 | 2025-01-07 | Silergy Semiconductor Technology (Hangzhou) Ltd | Control circuit for a resonant converter having at least two output signals |
| US12362671B2 (en) | 2021-11-15 | 2025-07-15 | Silergy Semiconductor Technology (Hangzhou) Ltd | Switching power supply circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103023299A (en) * | 2011-09-26 | 2013-04-03 | 南京博兰得电子科技有限公司 | Control method of power factor conversion device |
| CN103023299B (en) * | 2011-09-26 | 2015-05-20 | 南京博兰得电子科技有限公司 | Control method of power factor conversion device |
| CN103560662A (en) * | 2013-10-31 | 2014-02-05 | 广州金升阳科技有限公司 | PFC control method and control device |
| CN103560662B (en) * | 2013-10-31 | 2016-04-06 | 广州金升阳科技有限公司 | A kind of PFC control method and control device |
| CN106300953A (en) * | 2015-05-15 | 2017-01-04 | 三垦电气株式会社 | Power factor correcting method, circuit of power factor correction and Switching Power Supply |
| CN106300953B (en) * | 2015-05-15 | 2019-02-22 | 三垦电气株式会社 | Power factor correcting method, circuit of power factor correction and Switching Power Supply |
| JP2017112641A (en) * | 2015-12-14 | 2017-06-22 | 新日本無線株式会社 | Power factor improvement circuit and power factor improvement method |
| CN106899202A (en) * | 2015-12-18 | 2017-06-27 | 亚荣源科技（深圳）有限公司 | AC-DC converter and its power factor correction circuit |
| CN106208668A (en) * | 2016-09-07 | 2016-12-07 | 广州金升阳科技有限公司 | Pfc circuit, PFC control circuit and Switching Power Supply |
| CN106208668B (en) * | 2016-09-07 | 2019-07-19 | 广州金升阳科技有限公司 | Pfc circuit, PFC control circuit and Switching Power Supply |
| WO2021057851A1 (en) * | 2019-09-24 | 2021-04-01 | 上海晶丰明源半导体股份有限公司 | Control circuit with high power factor and ac/dc conversion circuit |
| US12021449B2 (en) | 2019-09-24 | 2024-06-25 | Shanghai Bright Power Semiconductor Co., Ltd. | Control circuit with high power factor and AC/DC converter |
| CN110650576A (en) * | 2019-10-30 | 2020-01-03 | 威海东兴电子有限公司 | Voltage automatic following sliding frequency power factor correction circuit |
| CN111464026A (en) * | 2020-05-22 | 2020-07-28 | 矽力杰半导体技术(杭州)有限公司 | Control circuit and switching converter using same |
| CN111464026B (en) * | 2020-05-22 | 2022-01-07 | 矽力杰半导体技术(杭州)有限公司 | Control circuit and switching converter using same |
| US11695328B2 (en) | 2020-05-22 | 2023-07-04 | Silergy Semiconductor Technology (Hangzhou) Ltd | Control circuit and switching converter |
| US11764677B2 (en) | 2020-10-27 | 2023-09-19 | Silergy Semiconductor Technology (Hangzhou) Ltd | Control circuit, switching converter and integrated circuit |
| US11716011B2 (en) | 2020-12-07 | 2023-08-01 | Silergy Semiconductor Technology (Hangzhou) Ltd | Communication control circuit for power supply chip |
| CN113015286B (en) * | 2021-02-25 | 2022-11-11 | 深圳欧创芯半导体有限公司 | PWM dimming method and device |
| CN113015286A (en) * | 2021-02-25 | 2021-06-22 | 深圳欧创芯半导体有限公司 | PWM dimming method and device |
| US12191773B2 (en) | 2021-07-29 | 2025-01-07 | Silergy Semiconductor Technology (Hangzhou) Ltd | Control circuit for a resonant converter having at least two output signals |
| US12362671B2 (en) | 2021-11-15 | 2025-07-15 | Silergy Semiconductor Technology (Hangzhou) Ltd | Switching power supply circuit |
| CN116846200A (en) * | 2023-08-30 | 2023-10-03 | 苏州锴威特半导体股份有限公司 | Control chip and PFC converter |
| CN116846200B (en) * | 2023-08-30 | 2023-11-10 | 苏州锴威特半导体股份有限公司 | Control chip and PFC converter |
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Address after: 310051 No. 6 Lianhui Street, Xixing Street, Binjiang District, Hangzhou City, Zhejiang Province Patentee after: Silergy Semiconductor Technology (Hangzhou ) Co., Ltd. Address before: 310012 Wensanlu Road, Hangzhou Province, No. 90 East Software Park, science and technology building A1501 Patentee before: Silergy Semiconductor Technology (Hangzhou ) Co., Ltd. |