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CN103247599B - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN103247599B
CN103247599B CN201210397451.4A CN201210397451A CN103247599B CN 103247599 B CN103247599 B CN 103247599B CN 201210397451 A CN201210397451 A CN 201210397451A CN 103247599 B CN103247599 B CN 103247599B
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China
Prior art keywords
insulation material
layer
material layer
semiconductor element
metallic film
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CN201210397451.4A
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CN103247599A (zh
Inventor
泽地茂典
山方修武
井上广司
板仓悟
近井智哉
堀将彦
胜又章夫
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Rely On Technology Japan Co
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J Devices Corp
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Abstract

本发明涉及半导体器件及其制造方法。一种半导体器件，包括：半导体元件；支撑基板；用于密封半导体元件及其周边的绝缘材料层；在绝缘材料层中提供的金属薄膜布线层，其一部分暴露在外表面上；以及在绝缘材料层中提供并电连接到金属薄膜布线层的金属过孔，其中提供多个半导体元件，并且各半导体元件通过绝缘材料层叠以便每个半导体元件的电路表面面向金属薄膜布线层，以及每个半导体元件的电极衬垫被暴露而没有被层叠在其上的半导体元件隐藏，并电连接到金属薄膜布线层。可以更小和更薄的尺寸制造半导体器件，而且通过使得多个半导体芯片成为垂直层叠结构可以减少制造步骤的数目。

Description

半导体器件及其制造方法
技术领域
本发明涉及半导体器件及其制造方法。更具体地，本发明涉及具有其中垂直层叠多个半导体芯片的结构的多芯片封装型半导体器件及其制造方法。
背景技术
根据最近对高性能并且轻便、超薄以及更小电子设备的要求，发展了电子部件的高密度集成和甚高密度安装，并且在前述电子设备中使用的半导体器件的尺寸减小同样比以往任何时候发展都快。
作为制造如LSI单元或者IC模块的半导体器件的方法，如图10中所示，存在一种制造通过如下方式获得的叠层MCP（多芯片封装）的方法：首先使在电性能测试中被检测为无缺陷的多个半导体元件2的电路表面面向相同方向并且以各半导体元件的电极衬垫（未示出）被暴露而没有被其它半导体元件隐藏的方式在支撑基板43上层叠这样的半导体元件2，通过线接合46电连接半导体元件的电极衬垫和支撑基板43，其后，用密封树脂55密封产品，形成焊料球56作为外部连接端子，并且单独切割半导体元件以完成半导体器件（例如，参考日本专利申请No.2002-33442）。
然而，对于如上所述获得的常规半导体器件，因为使用线接合用于连接，所以半导体元件仅有一侧或者两侧可以与支撑基板电连接，所以存在仅两个半导体元件可以同时操作的限制。
另外，存在减薄层叠多个半导体元件的封装的要求，而且为了满足此要求，减少每个半导体元件的厚度并且安装这样的薄半导体元件并且减少如线接合的连接构件的高度是必须的。
然而，连接到半导体元件的线接合的连接需要在安装的半导体元件上经过，而如果连接构件的高度很低，其将与半导体元件连接引起短路。
因此，为了防止除半导体元件的电极以外的部分与线接合接触，如图11所示，在半导体元件2的电极形成部分或者侧面或者背面的一部分上形成作为保护树脂层的绝缘材料层34以防止短路（例如，参考日本专利申请No.2009-49118）.
当同时操作多于两个半导体元件时，需要层叠半导体元件以便直接连接要操作的两个半导体元件以用于与两个半导体元件的同时操作。因此，半导体器件的尺寸变大，并且源于层叠结构的差的热辐射，在半导体元件中的结的温度升高，因此导致不可能进行前述同时操作的问题。
最近的趋势，要求半导体封装尺寸下降和可安装的半导体元件数量增加。为了满足这些要求，下列方面被提议并且发展；即，具有POP（层叠封装）结构的半导体器件，其中另一个半导体封装或者电路板层叠在半导体封装上（日本专利发明No.2008-218505）以及具有TSV（硅通孔）结构的半导体器件（日本专利发明No.2010-278334）。
现在基于图8解释常规POP结构半导体器件。POP（层叠封装）是一种封装模式其中多个不同LSI被作为独立封装组装，被测试并且随后层叠封装。
通过层叠在半导体封装41上的另一个半导体封装42配置半导体器件40。在下半导体封装41的基板43上安装半导体元件44，并且在半导体元件44的周边处形成电极衬垫（未示出）和基板上的电极衬垫45通过线46电连接。用密封构件47密封半导体元件44的整个表面。另外，半导体封装41和半导体封装42通过在半导体封装42的下表面上形成的外部连接端子48（焊料球）基于回流互相电连接。
POP的优点是作为层叠多个上述封装的结果安装区域可以在安装器件上增加，并且因为每个封装可以独立测试，可以减少成品率损耗。然而，用POP，因为独立封装是独立组装并且完成的封装被层叠，所以难以基于半导体元件的尺寸的减小（缩小）减少组装成本，并且存在叠层模块的组装成本很昂贵的问题。
现在参考图9解释常规TSV结构半导体器件。如图9所示，半导体器件50具有一种结构，其中多个半导体元件51具有彼此相同的功能和结构并且使用相同制造掩模分别制备以及通过树脂层53层叠在插入基板52上。每个半导体元件51都是使用硅基板的半导体元件并且都通过垂直于硅基板的多个贯穿电极（TSV：硅通孔）54电连接到上和下邻接半导体元件并且用密封树脂55密封。同时，插入基板52是由树脂制造的电路板并且在其背面形成多个外部连接端子（焊料球）56。
对于常规TSV（硅通孔）叠层模块结构，因为向每个独立的半导体元件提供通孔所以存在半导体元件损坏的可能性，并且其还需要增加几个在通孔中形成过孔电极的复杂并且成本高的晶片工艺。因此，这导致整个垂直叠层模块的成本的明显增加。另外，对于常规结构，层叠并且安装不同尺寸的芯片很困难并且源于如在存储器件中的在相同芯片的层叠之后所必须的“用于每个层的不同重布线层的增加”，与普通存储器件模块相比制造成本增加明显，并且存在不能通过大规模制造减少成本的问题。
发明内容
本发明的一个目标是提供一种半导体器件及其制造方法，其可以获得更小并且更薄的半导体器件并且通过使得多个半导体芯片成为垂直层叠结构明显减少了制造步骤的数目。
为了获得前述目标，本发明的发明人通过发现前述目标可以通过下述配置实现而完成了本发明；即，通过采用作为单元结构部件的结构，该结构包括半导体元件，用于密封所述半导体元件及其周边的绝缘材料层，在所述绝缘材料层中提供的金属薄膜布线层，金属薄膜布线层的一部分暴露在外表面上；以及在所述绝缘材料层中提供并电连接到所述金属薄膜布线层的金属过孔，其中提供多个所述半导体元件，并且各半导体元件通过绝缘材料层叠以便每个半导体元件的电路表面面向所述金属薄膜布线层，以及其中每个半导体元件的电极衬垫被暴露而没有被层叠在其上的所述半导体元件隐藏，并电连接到所述金属薄膜布线层。
换句话说，本发明如下所述：
（1）一种半导体器件，包括；
半导体元件；
支撑基板；
绝缘材料层，用于密封所述半导体元件及其周边；
金属薄膜布线层，被提供在所述绝缘材料层中，所述金属薄膜布线层的一部分在外表面上暴露；以及
金属过孔，被提供在所述绝缘材料层中并电连接到所述金属薄膜布线层，其中
提供多个所述半导体元件，并且各半导体元件通过绝缘材料层叠以便每个半导体元件的电路表面面向所述金属薄膜布线层，以及
每个半导体元件的电极衬垫被暴露而没有被层叠在其上的所述半导体元件隐藏，并电连接到所述金属薄膜布线层。
（2）一种半导体器件，包括多个层叠在支撑基板上的单元结构部件，每个单元结构部件包括：
半导体元件；
绝缘材料层，用于密封所述半导体元件及其周边；
金属薄膜布线层，被提供在所述绝缘材料层中，所述金属薄膜布线层的一部分在外表面上暴露；以及
金属过孔，被提供在所述绝缘材料层中并电连接到所述金属薄膜布线层，其中
提供多个所述半导体元件，并且各半导体元件被层叠为每个半导体元件的电路表面面向所述金属薄膜布线层，以及
每个半导体元件的电极衬垫被暴露而没有被层叠在其上的所述半导体元件隐藏，并电连接到所述金属薄膜布线层。
其中各所述单元结构部件通过所述金属过孔电连接。
（3）根据上述（1）或（2）的半导体器件，其中由各自不同的绝缘材料构成的多个绝缘材料层形成所述绝缘材料层。
（4）根据上述（1）到（3）的任意一个的半导体器件，其中由光敏绝缘树脂层和非光敏绝缘树脂层形成所述绝缘材料层。
（5）根据上述（1）到（4）的任意一个的半导体器件，其中所述支撑基板由金属材料构成，以及所述支撑基板连接到GND。
（6）根据上述（1）到（4）的任意一个的半导体器件，其中所述支撑基板由有机材料构成或者由有机材料和金属导体构成。
（7）根据上述（6）的半导体器件，其中其它半导体封装或者电子部件通过所述支撑基板层叠，并且所述半导体器件通过向所述支撑基板提供的通孔而电连接到所述其它半导体封装或者电子部件。
（8）一种制造根据上述（1）的半导体器件的方法，包括如下步骤：
在支撑基板上层叠并固定多个半导体元件以便所述半导体元件的电路表面面向同一方向，并且每个半导体元件的电极衬垫被暴露而没有被其它半导体元件隐藏；
形成第一绝缘材料层以密封所述半导体元件及其周边；
在所述第一绝缘材料层中形成用于形成金属过孔的开口和用于电连接所述电极衬垫的开口；
在所述第一绝缘材料层表面上形成金属薄膜种子层；
在所述开口中填充导电材料，并且在所述金属薄膜种子层上的预定区域形成金属薄膜布线层；
去除在所述第一绝缘材料层表面上的除了形成所述金属薄膜布线层的区域之外的所述金属薄膜种子层；以及
在其上具有所述金属薄膜布线层的所述第一绝缘材料层上形成第二绝缘材料层。
（9）一种制造根据上述（2）的半导体器件的方法，包括如下步骤：
在支撑基板上层叠并固定多个半导体元件以便所述半导体元件的电路表面面向同一方向，并且每个半导体元件的电极衬垫被暴露而没有被其它半导体元件隐藏；
形成第一绝缘材料层以密封所述半导体元件及其周边；
在所述第一绝缘材料层中形成用于形成金属过孔的开口和用于电连接所述电极衬垫的开口；
在所述第一绝缘材料层表面上形成金属薄膜种子层；
在所述开口中填充导电材料，并且在所述金属薄膜种子层上的预定区域形成金属薄膜布线层；
去除在所述第一绝缘材料层表面上的除了形成所述金属薄膜布线层的区域之外的所述金属薄膜种子层；以及
在其上形成有所述金属薄膜布线层的所述第一绝缘材料层上形成第二绝缘材料层，从而将半导体元件层叠体制造为单元结构部件；以及
通过重复前述步骤序列，在所述第二绝缘材料层上安装多个所述单元结构部件，
其中各所述单元结构部件通过所述金属过孔电连接。
本发明的半导体器件产生如下效果。
在多芯片封装的制造方法中可以减少布线层形成步骤的数量。能够实现与通过再布线技术层叠的半导体元件的电连接。金属支撑基板和有机支撑基本两者都可以用作支撑基板。
附图说明
图1示出了根据本发明的半导体器件的实施例1。
图2A和2B的每一个都示出了层叠半导体元件时的层叠实例。
图3A到3O示出了制造实施例1的半导体器件的方法步骤。
图4示出了本发明的半导体器件的实施例2。
图5示出了本发明的半导体器件的实施例3。
图6示出了作为参考实例的半导体器件的实例的截面图。
图7A到7N示出了在图6中示出的半导体器件的制造方法的步骤。
图8示出了常规POP结构半导体器件的结构图。
图9示出了常规TSV结构半导体器件的结构图。
图10示出了作为常规LSI单元或者IC模块的半导体器件的结构图。
图11示出了常规半导体元件中用于防止短路的结构图
具体实施方式
当完成本发明时，本发明的发明人检测了成为本发明的原型的半导体器件及其制造方法。通过与原型半导体器件及其制造方法的比较本发明的特征将更明显，此原型半导体器件（下文指“半导体器件D”）下文中作为参考实例并且首先说明。
图6示出了半导体器件D的结构图。通过层叠多个单元结构部件构成此半导体器件D，其中每个单元结构部件都配置有半导体元件2、用于密封半导体元件2及其周边的绝缘材料层4、在绝缘材料层4中提供的金属薄膜布线层6以及在绝缘材料层4中提供并且与金属薄膜布线层6电连接的过孔9，其中示出的结构配置有层叠的八个半导体元件。
现在参考图7A到7N解释此半导体器件D的制造方法。图7A到7N分别示出了半导体器件D的制造方法的步骤（a）到（c）、（e）、（g）到（j）、（l）、（n）、（p）到（s），并且下面解释各步骤。
（a）在支撑基板上安装半导体元件的步骤
在电性能测试中被确定为无缺陷的半导体元件2被通过粘合剂固定在支撑基板1上，半导体元件2的电路表面面向上。
（b）绝缘材料层形成步骤
在固定在支撑基板上的半导体元件2的周围施加绝缘树脂以形成绝缘材料层4（绝缘材料层a）。
（c）在绝缘材料层中形成开口的步骤
在电极衬垫3上的绝缘材料层中形成开口5用于使半导体元件2的电极衬垫从绝缘材料层4暴露。
（d）金属薄膜种子层形成步骤（未示出）
通过气相沉积方法（溅射）、无电镀或者类似的方法在具有开口5的绝缘材料层4的整个上表面上形成金属薄膜种子层（底层）。
（e）金属薄膜布线层形成步骤
为了在其上形成种子层的绝缘材料层4的预定区域上形成金属薄膜布线层，形成抗镀剂并且通过电解镀敷在绝缘材料层4的通过构图去除抗镀剂的区域上形成导电金属薄膜布线层。用导电金属填充开口5。
（f）金属薄膜种子层去除步骤（未示出）
在形成金属薄膜布线层6之后，通过蚀刻去除没有形成布线层的区域的抗镀剂和在抗镀剂下的种子层（底层）。
（g）绝缘材料层形成步骤
在其上具有形成的金属薄膜布线层6的绝缘材料层4的表面上形成绝缘材料层7（绝缘材料层b）。
（h）在绝缘材料层上安装半导体元件的步骤
在电性能测试中被检测为无缺陷的半导体元件2被通过粘合剂固定在绝缘材料层7上（绝缘材料层b），其中半导体元件2的电路表面面向上以便在绝缘材料层7上安装半导体元件2。
（i）绝缘材料层形成步骤
在绝缘材料层7上固定的半导体元件2的周围提供绝缘树脂以形成绝缘材料层4（绝缘材料层a），从而树脂密封半导体元件2。
（j）在绝缘材料层中形成开口的步骤
在绝缘材料层4上形成用于形成过孔的开口8和用于暴露半导体元件2的电极衬垫的开口5。
（k）金属薄膜种子层形成步骤（未示出）
通过气相沉积方法（溅射）、无电镀或者类似的方法在具有开口5和开口8的绝缘材料层4的整个上表面上形成金属薄膜种子层（底层）。
（l）金属薄膜布线层形成步骤
为了具有在其上形成的种子层的绝缘材料层4的预定区域上形成金属薄膜布线层，形成抗镀剂并且通过电解镀敷在绝缘材料层4的通过构图去除抗镀剂的区域上形成金属薄膜布线层。用导电金属填充开口5和开口8。
（m）金属薄膜种子层去除步骤（未示出）
在形成金属薄膜布线层6之后，通过蚀刻去除没有形成布线层的区域的抗镀剂和在抗镀剂之下的种子层（底层）。
（n）绝缘材料层形成步骤
在具有在其上形成的金属薄膜布线层6的绝缘材料层4的表面上形成绝缘材料层7（绝缘材料层b）。
（o）重复步骤
重复六次前述步骤（h）到（n）。从而可能获得图6中示出的结构，其中层叠了8个半导体元件
（p）抗蚀剂层形成步骤
为了保护布线，在金属薄膜布线层的表面上形成如阻焊剂的布线保护膜（抗蚀剂层）10。当阻焊剂是液态形式时用辊涂机提供阻焊剂并且当阻焊剂具有薄膜形状时用层积或者接合提供阻焊剂。
（q）布线保护膜（抗蚀剂层）开口步骤
为了将半导体器件与半导体封装或者电子部件电连接，在布线保护膜中形成用于向对应于过孔9的预定位置提供外部金属电极的抗蚀剂开口11。
（r）端子镀敷步骤
在抗蚀剂开口11上形成用于提供外部金属电极的端子镀层12或者有机保护膜。
（s）外部金属电极形成步骤
在端子镀层上形成由导电金属制造的外部金属电极（在示出的实例中的焊料球13）。作为导电材料，可以使用如焊料球、导电浆糊、焊膏等等。
如上述获得的半导体器件（多芯片封装）被分成独立的片段，从而完成半导体器件。
前述制造方法具有一个问题，其中需要为每个半导体元件形成一个金属薄膜布线层，从而增加了步骤数量。
因此，作为将多个半导体元件电连接到一个金属薄膜布线层的结构的结果，本发明使得半导体器件的制造步骤简化并且缩小了半导体器件的尺寸。
下面参考实施例解释该半导体器件。
实施例1
图1示出了本发明的实施例1的半导体器件A的结构图。
如图所示，此半导体器件A包括半导体元件2a，2b，用于密封半导体元件2a，2b及其周边的绝缘材料层4、在绝缘材料层4中提供并且其中其一部分暴露于外表面上的金属薄膜布线层6以及在绝缘材料层中提供并且与金属薄膜布线层电连接的金属过孔9。标号1表示金属支撑基板。
另外，两个半导体元件2a，2b是层叠的并且向绝缘材料层4提供，并且这样的结构为向两个半导体元件提供一个金属薄膜布线层6。
通过绝缘材料层叠两个半导体元件2a，2b，半导体元件2a，2b的电路表面面向金属薄膜布线层6并且暴露各半导体元件2a，2b的电极衬垫以便下半导体的衬垫不被层叠在其上的半导体元件隐藏并电连接到金属薄膜布线层。
当两个半导体元件2a，2b层叠时，为了使得下半导体元件的电极衬垫暴露而不被上半导体元件隐藏，例如，如图2A中所示，存在一种方法将相同尺寸的半导体芯片的方向相反并且层叠半导体元件以便暴露下半导体元件的电极衬垫，或者，如图2B中所示，使用不同尺寸的半导体元件并且层叠半导体元件以便暴露下半导体元件的电极衬垫。
现在参考分别示出了下述步骤（A）到（C）、（E）、（G）到（K）、（M）、（O）、（Q）到（T）的图3A到3O详细解释实施例1的半导体器件A的制造步骤。
（A）在金属支撑基板上安装半导体元件的步骤
在电性能测试中被检测为无缺陷的第一半导体元件2a被通过粘合剂固定在支撑基板1上，第一半导体元件的电路表面面向上。另外，通过粘合剂将第二半导体元件2b固定在第一半导体元件上，其中第二半导体元件的电路表面面向上以便暴露第一半导体元件的电极衬垫。参考标号14是管芯附着。
（B）绝缘材料层形成步骤
在固定在金属支撑基板1上的半导体元件2a和2b的周围提供绝缘树脂以形成绝缘材料层4（绝缘材料层a）。热固树脂用作绝缘树脂但是还可以使用光敏树脂。
热固树脂可以用作半导体元件周围的绝缘材料层并且光敏树脂层可以用作其上面的层。因此，可以期望通过热固树脂层的半导体元件的密封可靠性增强效果以及通过光敏树脂层的构图特性增强效果。
（C）在绝缘材料层中形成开口的步骤
在电极衬垫3上的绝缘材料层中形成开口5用于导致半导体元件2a和2b的电极衬垫从绝缘材料层4暴露，并且在绝缘材料层4中还形成用于形成过孔的开口8。
可以通过激光束加工形成开口5,8。另外，还可以通过微孔钻形成开口5,8或者当由光敏树脂制造绝缘材料层时，还可以通过曝光和显影形成开口5,8。另外，可以使用多个处理方式的组合。
（D）金属薄膜种子层形成步骤（未示出）
通过气相沉积方法（溅射）、无电度等等在具有开口5，8的绝缘材料层4的整个上表面上形成金属薄膜种子层（底层）。
（E）过孔填充和金属薄膜布线层形成步骤
为了在其上形成有种子层的绝缘材料层4的上表面上形成布线层，形成抗镀剂并且通过电解镀敷在绝缘材料层4的通过构图去除抗镀剂的区域上形成导电金属薄膜布线层并且用导电金属填充开口5，8。通过填充有导电材料的开口8形成过孔9。
（F）金属薄膜种子层去除步骤（未示出）
在形成金属薄膜布线层6之后，通过蚀刻去除没有形成布线层的区域的抗镀剂并且通过蚀刻去除在抗镀剂下的种子层（底层）。
（G）绝缘材料层形成步骤
在其上形成有金属薄膜布线层6的绝缘材料层4的表面上形成绝缘材料层7（绝缘材料层b）。
（H）在绝缘材料层中形成开口的步骤
在绝缘材料层7中形成位于过孔9之上的开口8，用于确保过孔9的电连接。
（I）在绝缘材料层上安装半导体元件的步骤
通过粘合剂将半导体元件2a和2b固定在绝缘材料层7上（绝缘材料层b），其中半导体元件的电路表面面向上以便在绝缘材料层7上安装半导体元件2a和2b。
（J）绝缘材料层形成步骤
在绝缘材料层7上固定的半导体元件2a和2b的周围提供绝缘树脂以形成绝缘材料层4（绝缘材料层a），从而树脂密封半导体元件2a和2b。关于绝缘树脂的详细描述如在前述步骤（B）中所述。
（K）在绝缘材料层中形成开口的步骤
对于绝缘材料层7，在绝缘材料层4中形成用于形成过孔的开口8和用于暴露半导体元件2a和2b的电极衬垫的开口5。处理方法如前述步骤（C）中所述
（L）金属薄膜种子层形成步骤（未示出）
通过气相沉积方法（溅射）、无电度等等在其中形成有开口5和开口8的绝缘材料层4的整个上表面上形成金属薄膜种子层（底层）。
（M）金属薄膜布线层形成步骤
为了在其上形成有种子层的绝缘材料层4的上表面上形成布线层，形成抗镀剂并且通过电解镀敷在绝缘材料层4的通过构图去除抗镀剂的区域上形成金属薄膜布线层6。另外，用导电金属填充开口8，从而形成过孔9并且用导电金属填充开口5。
（N）种子层去除步骤（未示出）
在形成金属薄膜布线层6之后，通过蚀刻去除没有形成布线层的区域的抗镀剂和该区域处的在抗镀剂之下的种子层（底层）。
（O）绝缘材料层形成步骤
在其上形成有金属薄膜布线层6的绝缘材料层4的表面上形成绝缘材料层7（绝缘材料层b）。
（P）重复步骤
重复两次前述步骤（H）到（O）。从而可能获得图1中示出的结构，其中层叠了8个半导体元件。
（Q）布线保护膜（抗蚀剂层）形成步骤
为了保护布线，在金属薄膜布线层的表面上形成如阻焊剂的布线保护膜（抗蚀剂层）10。当阻焊剂是液态形式时用辊涂机（roll coater）提供阻焊剂并且当阻焊剂具有薄膜形状时用层积或者接合提供阻焊剂。
（R）抗蚀剂层开口步骤
为了将半导体器件与半导体封装或者电子部件电连接，形成用于向对应于过孔9的预定位置提供外部金属电极的抗蚀剂开口11。
（S）端子镀敷步骤
在抗蚀剂开口11上形成用于提供外部金属电极的端子镀层12或者有机保护膜。
（T）外部金属电极形成步骤
在端子镀层上形成由导电材料制造的外部金属电极13（在示出的实例中的焊料球13）。作为导电材料，可以使用如焊料球、导电浆糊、焊膏等等。
通常，在大面积支撑基板的垂直方向和水平方向上同时形成多个半导体器件。这样，在形成外部电极13之后，获得的多芯片封装被分成独立的片段，从而完成半导体器件。
虽然图1中示出的半导体A是层叠了八个半导体元件的结构，作为重复步骤（H）到（O）的结果，可以制造一种半导体器件其中层叠了多于八个的半导体元件。在上述半导体器件A的情况下，在每个层叠体中使用的半导体元件作为单元结构部件都用相同的参考标号2a，2b表示以为了简化，这不总是意味着在所有单元结构部件中都使用相同的半导体。在各单元结构部件中可以使用不同的半导体元件。
实施例2
实施例2的半导体器件B使用有机支撑基板1’替代实施例1的半导体器件A中的金属支撑基板，如图4所示。
虽然金属支撑基板就散热性能有优势并且能够连接到GND，但是存在可加工性能差和难以打孔的缺点并且很难提供绝缘性。因此，很难在金属支撑基板上安装其它半导体封装或者电子部件。
同时，由如玻璃增强环氧树脂的有机化合物材料制造的有机支撑基板与金属支撑基板相比就如打孔的可加工性而言是有利的，并且具有绝缘性能。因此，如图4所示，作为开通孔并提供电连接部分的结果，在半导体器件上安装如半导体封装或者电容器的钝化部件是可能的。
实施例3
对于图5中示出的实施例3的半导体器件C，向焊料球13安装侧提供在实施例2中使用的有机支撑基板1’。
如在使用线用于布线的情况中，此结构能够获得面向上结构（半导体元件电路表面面向安装面），并且容易获得与实施例2中相同的端子设置。
另外，还存在一个优点，即，下侧与主板是匹配的，因为其为有机支撑基板。
标号说明：
1,1’：支撑基板
2,2a，2b：半导体元件
3：电极衬垫
4：绝缘材料层
5：开口
6：金属薄膜布线层
7：绝缘材料层
8：开口
9：过孔
10：抗蚀剂层
11：抗蚀剂开口
12：端子镀层或者有机保护膜13：焊料球
14：管芯附着
40,50：半导体器件
34：绝缘材料层
36：过孔部分
37：焊料球
38：焊料树脂层
41,42：半导体封装
43：支撑基板
45：电极衬垫
46：线
47：密封构件
48：外部连接端子
50：半导体器件
51：半导体元件
52：插入基板
53：树脂层
54：TSV（硅通孔）
55：密封树脂
56：外部连接端子（焊料球）

Claims (9)

1.一种半导体器件，包括：
半导体元件；
支撑基板；
第一绝缘材料层，用于密封所述半导体元件及其周边；
金属薄膜布线层，形成在所述第一绝缘材料层的上表面；
第二绝缘材料层，形成在第一绝缘材料层的形成有所述金属薄膜布线层的表面上；以及
金属过孔，形成为在所述第一绝缘材料层中从所述支撑基板连结到所述金属薄膜布线层，并电连接到所述金属薄膜布线层，其中
提供多个所述半导体元件，并且各半导体元件通过绝缘材料层叠以便每个半导体元件的电路表面面向所述金属薄膜布线层，
所述金属薄膜布线层的一部分通过在第二绝缘材料层中形成位于所述金属过孔之上的开口而暴露于外表面，以确保所述金属过孔与外部电连接，
每个半导体元件的电极衬垫被暴露而没有被层叠在其上的所述半导体元件隐藏，并通过在电极衬垫上的第一绝缘材料层中形成、且由导电材料填充的开口而电连接到所述金属薄膜布线层。
2.一种半导体器件，包括多个层叠在支撑基板上的单元结构部件，每个单元结构部件包括：
半导体元件；
第一绝缘材料层，用于密封所述半导体元件及其周边；
金属薄膜布线层，形成在所述第一绝缘材料层的上表面；
第二绝缘材料层，形成在第一绝缘材料层的形成有所述金属薄膜布线层的表面上；以及
金属过孔，形成为在所述第一绝缘材料层中从所述支撑基板连结到所述金属薄膜布线层，并电连接到所述金属薄膜布线层，其中
提供多个所述半导体元件，并且各半导体元件通过绝缘材料层叠为每个半导体元件的电路表面面向所述金属薄膜布线层，
所述金属薄膜布线层的一部分通过在第二绝缘材料层中形成位于所述金属过孔之上的开口而暴露于外表面，以确保所述金属过孔与外部电连接，
每个半导体元件的电极衬垫被暴露而没有被层叠在其上的所述半导体元件隐藏，并通过在电极衬垫上的第一绝缘材料层中形成、且由导电材料填充的开口而电连接到所述金属薄膜布线层，
其中各所述单元结构部件通过所述金属过孔电连接。
3.根据权利要求1或2的半导体器件，其中由各自不同的绝缘材料构成的多个绝缘材料层形成所述第一绝缘材料层。
4.根据权利要求3的半导体器件，其中由光敏绝缘树脂层和热固绝缘树脂层形成所述第一绝缘材料层。
5.根据权利要求1或2的半导体器件，其中所述支撑基板由金属材料构成，以及所述支撑基板连接到GND。
6.根据权利要求1或2的半导体器件，其中所述支撑基板由有机材料构成或者由有机材料和金属导体构成。
7.根据权利要求6的半导体器件，其中其它半导体封装或者电子部件通过所述支撑基板层叠，并且所述半导体器件通过向所述支撑基板提供的通孔而电连接到所述其它半导体封装或者电子部件。
8.一种制造根据权利要求1的半导体器件的方法，包括如下步骤：
在支撑基板上层叠并固定多个半导体元件以便所述半导体元件的电路表面面向同一方向，并且每个半导体元件的电极衬垫被暴露而没有被其它半导体元件隐藏；
形成第一绝缘材料层以密封所述半导体元件及其周边；
在所述第一绝缘材料层中形成用于形成金属过孔的开口和用于电连接所述电极衬垫的开口；
在所述第一绝缘材料层表面上形成金属薄膜种子层；
在所述开口中填充导电材料，并且在所述金属薄膜种子层上的预定区域形成金属薄膜布线层；
去除在所述第一绝缘材料层表面上的除了形成所述金属薄膜布线层的区域之外的所述金属薄膜种子层；以及
在其上具有所述金属薄膜布线层的所述第一绝缘材料层上形成第二绝缘材料层，在第二绝缘材料层中形成位于金属过孔之上的用于确保金属过孔的电连接的开口。
9.一种制造根据权利要求2的半导体器件的方法，包括如下步骤：
在支撑基板上层叠并固定多个半导体元件以便所述半导体元件的电路表面面向同一方向，并且每个半导体元件的电极衬垫被暴露而没有被其它半导体元件隐藏；
形成第一绝缘材料层以密封所述半导体元件及其周边；
在所述第一绝缘材料层中形成用于形成金属过孔的开口和用于电连接所述电极衬垫的开口；
在所述第一绝缘材料层表面上形成金属薄膜种子层；
在所述开口中填充导电材料，并且在所述金属薄膜种子层上的预定区域形成金属薄膜布线层；
去除在所述第一绝缘材料层表面上的除了形成所述金属薄膜布线层的区域之外的所述金属薄膜种子层；以及
在其上形成有所述金属薄膜布线层的所述第一绝缘材料层上形成第二绝缘材料层，在第二绝缘材料层中形成位于金属过孔之上的用于确保金属过孔的电连接的开口，从而将半导体元件层叠体制造为单元结构部件；以及
通过重复前述步骤序列，在所述第二绝缘材料层上安装多个所述单元结构部件，
其中各所述单元结构部件通过所述金属过孔电连接。
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