CN103035506B

CN103035506B - The lithographic method of RFLDMOS spacer medium layer depth groove

Info

Publication number: CN103035506B
Application number: CN201210281659.XA
Authority: CN
Inventors: 吴智勇; 肖胜安
Original assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2012-08-09
Filing date: 2012-08-09
Publication date: 2015-10-14
Anticipated expiration: 2032-08-09
Also published as: CN103035506A

Abstract

The invention discloses a kind of lithographic method of RFLDMOS spacer medium layer depth groove, comprise step: 1) etch photoetching alignment mark district; 2) growing silicon oxide-silicon nitride stack; 3) monocrystalline silicon returns to carve and forms shallow trench; 4) silicon oxide deposition; 5) by the hard mask dry etch process of silica to silicon nitride high selectivity, in monocrystalline silicon shallow trench, deep trench figure is formed; 6) by the dry etch process of monocrystalline silicon to silica and silicon nitride high selectivity, deep trench is formed in Hou Changyang district.The present invention is by forming ONO lamination in silicon chip edge beveled region and photoetching alignment mark district, in the hard mask etching process of deep trench, use oxide-film to the technique of nitride film high selectivity simultaneously, at deep plough groove etched middle use monocrystalline silicon to the technique of deielectric-coating high selectivity, after effectively prevent deep trench dry etching there is silicon tip thorn defect in silicon chip edge beveled region and photoetching alignment mark district.

Description

The lithographic method of RFLDMOS spacer medium layer depth groove

Technical field

The present invention relates to semiconductor integrated circuit and manufacture field, particularly relate to a kind of lithographic method of RFLDMOS spacer medium layer depth groove.

Background technology

In RFLDMOS(radio frequency horizontal proliferation type burning field effect transistor) in spacer medium layer process, thick field oxygen technique combines monocrystalline silicon and returns quarter and deep plough groove etched technique, employ oxide-film-this film layer structure of nitride film-oxide-film, cause in deep trench hard mask dry etching process, in silicon chip edge inclined-plane place and photoetching alignment mark, there is deielectric-coating to remain, thus after dark silicon trench dry etching, a large amount of silicon tip thorns is there is in silicon chip edge inclined-plane and photoetching alignment mark, as Fig. 1, shown in 2, after follow-up wet-cleaned, the surfacial pattern of silicon chip will be formed a large amount of silicon grain defects, these defects cause technique to produce in a large number.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of lithographic method of RFLDMOS spacer medium layer depth groove, it can avoid deep plough groove etched after, in silicon chip edge inclined-plane and photoetching alignment mark, occur that silicon tip stings.

For solving the problems of the technologies described above, the lithographic method of RFLDMOS spacer medium layer depth groove of the present invention, comprises the following steps:

1) in the scribe line of silicon chip, zero layer photoetching alignment mark district is etched;

2) silicon dioxide film and silicon nitride film is grown successively;

3) monocrystalline silicon returns quarter, and the deep trench in Hou Changyang district forms monocrystalline silicon shallow trench;

4) the hard mask of deposit silicon dioxide;

5) by the hard mask dry etch process of silicon dioxide to silicon nitride high selectivity, in monocrystalline silicon shallow trench, deep trench figure is formed;

6) by the dry etch process of monocrystalline silicon to silicon dioxide and silicon nitride high selectivity, deep trench is formed in Hou Changyang district.

The present invention by forming oxide-film-nitride film-oxide-film lamination in silicon chip edge beveled region and photoetching alignment mark, and in the hard mask etching process of deep trench, use oxide-film to the technique of nitride film high selectivity, in deep trench dry etching, use monocrystalline silicon to the technique of the deielectric-coating such as oxide-film, nitride film high selectivity, effectively prevent silicon chip edge beveled region and photoetching alignment mark region in deep trench dry etching process and occur the defect that silicon tip stings, thus contribute to realizing RFLDMOS spacer medium layer process volume production.

Accompanying drawing explanation

Fig. 1 is the silicon tip thorn of silicon chip edge beveled region.

Fig. 2 is the silicon tip thorn in photoetching alignment mark.

Fig. 3 is the etch process flow schematic diagram of the RFLDMOS spacer medium layer depth groove of the embodiment of the present invention.

In figure, description of reference numerals is as follows:

1:P type silicon substrate

2:P type extension

3,6: silicon dioxide film

4: silicon nitride film

5: monocrystalline silicon shallow trench

7: photoresist

8: deep trench

9: photoetching alignment mark district

10: Hou Changyang district

11: silicon chip edge beveled region

Embodiment

Understand more specifically for having technology contents of the present invention, feature and effect, now in conjunction with illustrated execution mode, details are as follows:

The lithographic method of the RFLDMOS spacer medium layer depth groove of the present embodiment, comprises the steps:

Step 1, by photoetching, etch and to remove photoresist etc. technique, forms zero layer photoetching alignment mark district 9, in the scribe line of silicon chip as shown in Fig. 3 (a).The degree of depth in this photoetching alignment mark district 9 is

Step 2, successively deposit silicon dioxide film 3, silicon nitride film 4, form the lamination of oxide-film-nitride film.

Silicon dioxide film 3 is used as the resilient coating of thermal expansion, and thickness is silicon nitride film 4 is not only used as the mask layer of field oxygen, and simultaneously also using as the barrier layer of follow-up hard mask etching and deep plough groove etched mask layer, this layer of silicon nitride film 4 can gradually lose in subsequent technique, and therefore thickness preferably exists above.

Step 3, in silicon chip edge beveled region 11, photoetching alignment mark district 9 and part Hou Changyang district 10 be coated with photoresist, and return quarter by photoetching and monocrystalline silicon, deep trench 8 in Hou Changyang district 10 forms monocrystalline silicon shallow trench 5, as shown in Figure 3 (b).

Monocrystalline silicon shallow trench 5 comes out in chemical mechanical milling tech for preventing the cavity of subsequent fields oxygen, affects subsequent technique.The degree of depth of this monocrystalline silicon shallow trench 5 preferably exists deeply can cause technology difficulty to photoetching and thermal oxidation technology again.

Step 4, deposit silicon dioxide film 6, as the hard mask of subsequent deep trench dry etching, as shown in Figure 3 (c).

As long as the thickness of silicon dioxide film 6 enough stops deep plough groove etched, in the present embodiment, thickness preferably exists above.After completing the deposit of this step, form oxide-film-nitride film-oxide-film three-decker in silicon chip edge beveled region 11 and photoetching alignment mark district 9.

Step 5, by photoetching and silicon oxide film to the hard mask dry etch process of silicon nitride film high selectivity, forms deep trench figure, as shown in Fig. 3 (d) in monocrystalline silicon shallow trench 5.Etching condition is: 30 ~ 60 person of outstanding talent's holder intermediate gas pressure, power 300 ~ 500 watts, etching gas is mainly with C ₄f ₆or C ₄f ₈be main, can assist and mix Ar, O ₂deng gas, suitably to increase etch rate.

This etching technics can reach the high Selection radio (generally can accomplish 25:1 or higher) of silicon oxide film to silicon nitride film, can not quarter be spent due to hard mask dry etching at device region deep trench 8 top and occur uneven, almost there is no loss at the nitride film in silicon chip edge beveled region 11 and photoetching alignment mark district 9, thus provide enough barrier layers to subsequent deep trench is groove etched.

Step 6, with the etching technics of monocrystalline silicon to deielectric-coating (silicon oxide film and silicon nitride film) high selectivity, forms 3 ~ 4 μm of dark deep trench 8, as shown in Fig. 3 (e) in Hou Changyang district 10.Etching condition is: 30 ~ 50 person of outstanding talent's holder intermediate gas pressure, upper electrode power 900 ~ 1500 watts, lower electrode power 50 ~ 90 watts, etching gas is with SF ₆and O ₂be main, suitably add CHF ₃increase the etching selection ratio (generally between 20:1 to 25:1) to deielectric-coating.

This deep trench 8 forms thick field oxygen layer after subsequent thermal oxidation.Owing to there being enough silicon oxide hardmask, therefore the silicon nitride film of bottom can fully stop that subsequent chemical mechanical grinds.And in silicon chip edge beveled region 11 and photoetching alignment mark district 9, due to the hard mask etching technique of step 5 complete after leave enough nitride film ( above), therefore, it is possible to stop the etching of deep trench, after deep plough groove etched completing, silicon tip thorn can not be produced.

Claims

The lithographic method of 1.RFLDMOS spacer medium layer depth groove, is characterized in that, comprise the following steps:

1) in the scribe line of silicon chip, zero layer photoetching alignment mark district is etched;

2) silicon dioxide film and silicon nitride film is grown successively;

3) monocrystalline silicon returns quarter, and the deep trench in Hou Changyang district forms monocrystalline silicon shallow trench;

4) the hard mask of deposit silicon dioxide;

5) by the hard mask dry etch process of silicon dioxide to silicon nitride high selectivity, in monocrystalline silicon shallow trench, deep trench figure is formed;

6) by the dry etch process of monocrystalline silicon to silicon dioxide and silicon nitride high selectivity, deep trench is formed in Hou Changyang district.
2. method according to claim 1, is characterized in that, the degree of depth in described photoetching alignment mark district is
3. method according to claim 1, is characterized in that, step 2), the thickness of described silicon dioxide film is 100 ~ the thickness of silicon nitride film is above.
4. method according to claim 1, is characterized in that, step 3), the degree of depth of described monocrystalline silicon shallow trench is 4 ~
5. method according to claim 1, is characterized in that, step 4), the thickness of the hard mask of described silicon dioxide is above.
6. method according to claim 1, is characterized in that, step 5), etching condition is: air pressure 30 ~ 60 millitorr, and power 300 ~ 500 watts, etching gas comprises C ₄f ₆or C ₄f ₈.
7. method according to claim 6, is characterized in that, step 5), containing assist gas Ar or O in etching gas ₂.
8. the method according to claim 1 or 7, is characterized in that, step 5), the Selection radio of silicon dioxide to silicon nitride is more than 25:1.
9. method according to claim 1, is characterized in that, step 6), etching condition is: air pressure 30 ~ 50 person of outstanding talent holder, upper electrode power 900 ~ 1500 watts, lower electrode power 50 ~ 90 watts, etching gas comprises SF ₆and O ₂.
10. the method according to claim 1 or 9, is characterized in that, step 6), the etching selection ratio of monocrystalline silicon to silicon dioxide and silicon nitride is 20:1 ~ 25:1.