CN102982647A - Wiring method for designing control chip of smoke-sensing alarm device - Google Patents
Wiring method for designing control chip of smoke-sensing alarm device Download PDFInfo
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- CN102982647A CN102982647A CN2012105181131A CN201210518113A CN102982647A CN 102982647 A CN102982647 A CN 102982647A CN 2012105181131 A CN2012105181131 A CN 2012105181131A CN 201210518113 A CN201210518113 A CN 201210518113A CN 102982647 A CN102982647 A CN 102982647A
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- chip
- pin
- smoke
- pressure
- alarm device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- Fire-Detection Mechanisms (AREA)
- Fire Alarms (AREA)
Abstract
The invention discloses a wiring method for designing a control chip of a smoke-sensing alarm device. The control chip of the smoke-sensing alarm device mainly comprises a digital core (CORE), an erasable programmable read only memory (EPROM), a simulating low voltage part and a simulating high voltage part. The wiring method comprises the steps of integrating the digital core (CORE), the memory (EPROM) and the simulating low voltage part on a relatively large chip of a low-voltage platemaking tape; integrating the simulating high voltage part on a relatively small chip of a high-voltage platemaking tape; and laminating the relatively small chip on the relatively large chip for packaging, wherein the relatively small chip and the relatively large chip have respective independent substrates and are directly equipped with insulating glue. The wiring method is low in cost, high in efficiency and free of interference; on the premise that the size of a low-voltage chip on the lower layer is not increased, area as large as possible is provided for a high-voltage chip on the upper layer so as to improve the reliability of the high-voltage chip and SOP16 packaging becomes possible; and the stability is higher.
Description
Technical field
The present invention relates to a kind of method for designing of SIC (semiconductor integrated circuit), relate in particular to a kind of method for designing of control chip of smoke-sensitive alarm device.
Background technology
The smoke-sensitive alarm device is a kind of electronic equipment with sensor and audible alarm.Sensor is the parts that carry IO interface, so the major control chip of smoke-sensitive alarm device is used for carrying out the data processing and reports to the police driving, main module comprises processor, storer, amplifier, comparer, various driving circuit, control circuit etc.
Above circuit generally all is designed to the form of integrated circuit, in the prior art, two large classes are arranged, the one, the form of multi-chip, general formation such as Fig. 1, comprise that amplifier chip, AD chip, digital control chip and high pressure loudspeaker drive chip, the smoke detection signal that this processing of circuit smoke detector transmits.Finally according to setting, drive loudspeaker and report to the police.Obviously, under the form of this multi-chip, structure is relatively complicated, needs comparatively complicated peripheral circuit to cooperate in the practical application, realizes that cost is higher, so do not meet the circuit design requirement of current high integration.
The second is the form of one chip commonly, and its structure comprises digital core CORE, storer EPROM, simulation low-pressure section and simulated high-pressure part as shown in Figure 2.All are module integrated in chip piece.The design cost of this form is higher, the wiring difficulty is large, and the shared substrate of high-low pressure, and high-pressure section produces memory stores data easily and disturbs during work, affects the reliability of whole circuit.
Summary of the invention
Purpose of the present invention is invented a kind of circuit arrangement that adopts the induction alarm system of dual chip for the weak point of the described multi-chip of background technology and single-chip circuit, is a kind of wiring method.
Smoke-sensitive alarm device of the present invention is to have comprised audible alarm and LED electronic equipment that show, that be used for the smoke sensing warning, so need to possess corresponding data-handling capacity and corresponding driving circuit.Driving circuit mainly comprises digital core (CORE), storer (EPROM), simulation low-pressure section and simulated high-pressure part, wherein, the simulation low-pressure section comprises integrating amplifier, smog comparer, low pressure detection comparator, reference circuit, oscillator, photoelectricity storehouse driving circuit; Simulated high-pressure partly comprises: protection control module, drive circuit of loudspeaker, LED control module, IO driving circuit, IRCAP circuit boost.
Circuit arrangement method of the present invention is: with digital core (CORE), storer (EPROM) and simulation low-pressure section be integrated in low pressure process plate-making flow than on the large chip; Simulated high-pressure is partially integrated on the less chip of high-pressure process plate-making flow; Less chip laminate is encapsulating than large chip, possesses separately individual substrate, and insulating gel is set between the two.
Preferably: the packing forms of employing is the SOP16 packaging body, than large chip on the lower floor slide glass island and and the slide glass island between conducting resinl is set; Less chip laminate is on than large chip.
Further preferred: in four limits than large chip, arrange wherein on two adjacent limits the Pin pin not to be set, will less chip near an above-mentioned side setting without the Pin pin, with the distance on described limit without the Pin pin be the safe distance of 5mil.
Method of the present invention has at first overcome the defective of multi-chip scheme and single chip solution, is that a kind of cost is low, efficient is high and does not have noisy scheme.Because high and low pressure separately and the significant reduce disturbance of individual substrate and insulating gel; Dual chip is this to be felt in this circuit of cigarette device between multi-chip and the direct compromise selection of single-chip, and the simplification aspect of cost and peripheral circuit is optimal selection.
Secondly, by removing the Pin pin on two limits of low pressure chip, the less high pressure chip on upper strata is offset to one jiao, can reduce the chip safe distance to the restriction of overall dimensions, under the prerequisite that does not increase lower floor's low pressure chip size, the larger area high pressure chip to the upper strata is provided as much as possible, improve the reliability of high pressure chip, make SOP16 be encapsulated into possibility, and stability is higher.Owing to be laminate packaging, so the low pressure chip size of lower floor has determined package dimension, less size can further reduce the cost of whole product naturally.
Description of drawings
Fig. 1, existing multi-chip structural map.
Fig. 2, existing single chip architecture schematic diagram.
Fig. 3, the modular structure figure of dual chip of the present invention.
Fig. 4, SOP16 packaging and routing figure of the present invention.
Fig. 5, the dual chip laminate packaging routing figure of prior art.
Embodiment
Such as Fig. 3; smoke-sensitive alarm device of the present invention comprises digital core (CORE) 1, storer (EPROM) 2, integrating amplifier 3, smog comparer 4, low pressure detection comparator 5, reference circuit 6, oscillator 7, photoelectricity storehouse driving circuit 8, boosts and protect control module 9, drive circuit of loudspeaker 10, LED control module 11, IO driving circuit 12, IRCAP circuit 13(to refer to that outside photoelectricity storehouse provides the circuit module of electric current).
Concrete manufacture method is:
With integrating amplifier 3, smog comparer 4, low pressure detection comparator 5, reference circuit 6, oscillator 7, photoelectricity storehouse driving circuit 8 as the simulation low-pressure section, and digital core (CORE) 1, storer (EPROM) 2 be integrated in low pressure process plate-making flow than (for explanation and understand conveniently, the below is referred to as low pressure chip 20) on the large chip 20; To boost protection control module 9, drive circuit of loudspeaker 10, LED control module 11, IO driving circuit 12, IRCAP circuit 13 as the simulated high-pressure part, be integrated on the less chip of high-pressure process plate-making flow 30(hereinafter to be referred as high pressure chip 30).
2. decide internal mutual line between the high and low pressure chip by the function of simulated high-pressure module, connect two chips by described internal interconnect, its principle is to adopt minimum internal interconnect to come the module of control simulation high-pressure section, and assurance function and performance are constant simultaneously: the many interconnection line KA controls that the protection control module 9 of boosting is come by low-pressure section; Drive circuit of loudspeaker 10 is controlled by KB; LED control module 11 is controlled by KC; IO driving circuit 12 is controlled by KD; IRCAP circuit 13 is controlled by KE.
3. in upper stack package, inner routing connects the Pin pin to low pressure chip 20 at lower, high pressure chip 30.Two chips arrange independently substrate separately, with the insulating gel insulation, between the low pressure chip of lower floor and the slide glass island conducting resinl are set, and the low pressure chip edge is the safe distance of 10mil to slide glass island Edge Distance.
The SOP16 encapsulation that present embodiment adopts (a kind of have the outer bilateral pin flat package of drawing Pin of 16 encapsulation), size is about 10.30 * 7.50mm, with low cost, stable performance.
The downside of low pressure chip 20 and left side do not arrange the Pin pin, and high pressure chip 30 arranges near the lower left corner, and the downside of high pressure chip 30, left side are 5mil apart from the distance of low pressure chip 20 corresponding lateral edges, are the safe distances of chip design; The upside of high pressure chip 30, right side surpass 15mil apart from corresponding edge distance on the low pressure chip 20, because this is the both sides that the Pin pin is arranged, so the safe distance requirement is higher.
16 routings that draw the Pin pin outward that concrete high and low pressure chip internal Pin pin is connected with SOP16 connect as shown in Figure 4:
Be provided with 7 outside Pin pin on the low pressure chip 20,11 outside Pin pin are arranged on the high pressure chip.
The routing of low pressure chip 20:
The L1 pin is played 1 line to encapsulation the 1st pin (being labeled as p1 among the figure, lower same);
The L2 pin is played 1 line to encapsulation the 2nd pin;
The L3 pin is played 1 line to encapsulation the 3rd pin;
The L4 pin is played 1 line to encapsulation the 4th pin;
The L5 pin is played 1 line to encapsulation the 5th pin;
The L6 pin is played 1 line to encapsulation the 6th pin;
The L7 pin is played 1 line to encapsulation the 7th pin;
The outside Pin pin routing explanation of high pressure chip 30:
The S1 pin is played 1 line to encapsulation the 1st pin;
The S3 pin is played 1 line to encapsulation the 3rd pin;
The S8 pin is played 1 line to encapsulation the 8th pin;
The S9 pin is played 1 line to encapsulation the 9th pin;
The S10 pin is played 1 line to encapsulation the 10th pin;
The S11 pin is played 1 line to encapsulation the 11st pin;
The S12 pin is played 1 line to encapsulation the 12nd pin;
The S14 pin is played 1 line to encapsulation the 14th pin;
The S13 pin is played 1 line to encapsulation the 13rd pin;
The S15 pin is played 1 line to encapsulation the 15th pin;
The S16 pin is played 1 line to encapsulation the 16th pin;
Two chip internal Pin pin are interconnected:
The SA pin routing KA of high pressure chip is to the LA pin of low pressure chip;
The SB pin routing KB of high compressing tablet is to the LB pin of low pressure chip;
The SC pin routing KC of high compressing tablet is to the LC pin of low pressure chip;
The SD pin routing KD of high compressing tablet is to the LD pin of low pressure chip;
The SE pin routing KE of high compressing tablet is to the LE pin of low pressure chip.
As a comparison, suppose to adopt prior art to realize smoke-sensitive alarm of the present invention system, levels chip internal composition module is constant, interconnector is constant.Prior art routing figure such as Fig. 5: in the SOP16 of the dual chip encapsulation, the upper strata chip is arranged on centre position rather than as one jiao of deflection of the present invention.There is the Pin pin on four limits of lower floor's chip.
Concrete, the outside Pin pin routing of lower floor's chip:
The L1 pin is played 1 line to encapsulation the 1st pin (being labeled as p1 among the figure, lower same);
The L2 pin is played 1 line to encapsulation the 2nd pin;
The L3 pin is played 1 line to encapsulation the 3rd pin;
The L4 pin is played 1 line to encapsulation the 4th pin;
The L6 pin is played 1 line to encapsulation the 6th pin;
The L7 pin is played 1 line to encapsulation the 7th pin;
The L5 pin is played 1 line to encapsulation the 13rd pin;
The outside Pin pin routing explanation of upper strata chip:
The S1 pin is played 1 line to encapsulation the 1st pin;
The S3 pin is played 1 line to encapsulation the 3rd pin;
The S13 pin is played 1 line to encapsulation the 5th pin;
The S8 pin is played 1 line to encapsulation the 8th pin;
The S9 pin is played 1 line to encapsulation the 9th pin;
The S10 pin is played 1 line to encapsulation the 10th pin;
The S11 pin is played 1 line to encapsulation the 11st pin;
The S12 pin is played 1 line to encapsulation the 12nd pin;
The S14 pin is played 1 line to encapsulation the 14th pin;
The S15 pin is played 1 line to encapsulation the 15th pin;
The S16 pin is played 1 line to encapsulation the 16th pin.
As seen, because there is the Pin pin on four limits of lower floor's chip, so the upper strata chip all needs identical 15mil safe distance apart from four limits of lower floor's chip, in the situation of lower floor's chip and slide glass island size constancy, the area of upper strata chip is obviously less than area of the present invention, owing to be high-pressure modular in the chip of upper strata of the present invention, so larger area can provide more reliable and more stable serviceability.
To sum up, the present invention exceeds prior art one compared to prior art and raises on cost, design difficulty, reliable and stable performance, possess significant progress and outstanding substantive distinguishing features, be this product of smoke-sensitive alarm device control chip manufacture and design the higher design proposal of middle balance.
Claims (3)
1. the wiring method of the control chip of smoke-sensitive alarm device design, the control chip of described smoke-sensitive alarm device mainly comprises digital core (CORE), storer (EPROM), simulation low-pressure section and simulated high-pressure part, wherein, the simulation low-pressure section comprises integrating amplifier, smog comparer, low pressure detection comparator, reference circuit, oscillator, photoelectricity storehouse driving circuit; Simulated high-pressure partly comprises: protection control module, drive circuit of loudspeaker, LED control module, IO driving circuit, IRCAP circuit boost;
It is characterized in that: the wiring method of realizing above-mentioned parts is, with digital core (CORE), storer (EPROM) and simulation low-pressure section be integrated in low pressure process plate-making flow than on the large chip; Simulated high-pressure is partially integrated on the less chip of high-pressure process plate-making flow; Less chip laminate is encapsulating than large chip, possesses separately individual substrate, and insulating gel is set between the two.
2. the wiring method of the control chip of smoke-sensitive alarm device according to claim 1 design, it is characterized in that: the packing forms of employing is the SOP16 packaging body, is positioned on the lower floor slide glass island than large chip, and between the slide glass island conducting resinl is set; Less chip laminate is on than large chip.
3. the wiring method of the control chip of smoke-sensitive alarm device according to claim 1 and 2 design, it is characterized in that: in four limits than large chip, arrange wherein on two adjacent limits the Pin pin not to be set, will less chip near an above-mentioned side setting without the Pin pin, with the distance on described limit without the Pin pin be the safe distance of 5mil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210518113.1A CN102982647B (en) | 2012-12-06 | 2012-12-06 | A kind of wiring method of control chip design of smoke-sensitive alarm device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210518113.1A CN102982647B (en) | 2012-12-06 | 2012-12-06 | A kind of wiring method of control chip design of smoke-sensitive alarm device |
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| CN102982647A true CN102982647A (en) | 2013-03-20 |
| CN102982647B CN102982647B (en) | 2016-03-30 |
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Citations (7)
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| US20060233012A1 (en) * | 2005-03-30 | 2006-10-19 | Elpida Memory, Inc. | Semiconductor storage device having a plurality of stacked memory chips |
| US20080042249A1 (en) * | 2006-08-16 | 2008-02-21 | Tessera, Inc. | Microelectronic package |
| CN101504923A (en) * | 2007-06-06 | 2009-08-12 | 株式会社瑞萨科技 | Semiconductor device, its manufacturing method and its testing method |
| CN101740413A (en) * | 2009-12-15 | 2010-06-16 | 天水七四九电子有限公司 | Ceramic small outline package (CSOP) method |
| CN101763707A (en) * | 2009-11-17 | 2010-06-30 | 无锡华润矽科微电子有限公司 | Digital smoke-sensing alarm and alarm method thereof |
| US20110300672A1 (en) * | 2008-05-29 | 2011-12-08 | Renesas Electronics Corporation | Semiconductor device, and manufacturing method therefor |
-
2012
- 2012-12-06 CN CN201210518113.1A patent/CN102982647B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US20060138647A1 (en) * | 2004-12-23 | 2006-06-29 | Tessera, Inc. | Microelectronic package having stacked semiconductor devices and a process for its fabrication |
| US20060233012A1 (en) * | 2005-03-30 | 2006-10-19 | Elpida Memory, Inc. | Semiconductor storage device having a plurality of stacked memory chips |
| US20080042249A1 (en) * | 2006-08-16 | 2008-02-21 | Tessera, Inc. | Microelectronic package |
| CN101504923A (en) * | 2007-06-06 | 2009-08-12 | 株式会社瑞萨科技 | Semiconductor device, its manufacturing method and its testing method |
| US20110300672A1 (en) * | 2008-05-29 | 2011-12-08 | Renesas Electronics Corporation | Semiconductor device, and manufacturing method therefor |
| CN101763707A (en) * | 2009-11-17 | 2010-06-30 | 无锡华润矽科微电子有限公司 | Digital smoke-sensing alarm and alarm method thereof |
| CN101740413A (en) * | 2009-12-15 | 2010-06-16 | 天水七四九电子有限公司 | Ceramic small outline package (CSOP) method |
Non-Patent Citations (1)
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| 王艳等: "双层芯片叠层封装的EDA仿真设计", 《电子与封装》, vol. 7, no. 11, 30 November 2007 (2007-11-30), pages 5 - 17 * |
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| CN102982647B (en) | 2016-03-30 |
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Address after: 214135 -6, Linghu Avenue, Wuxi Taihu international science and Technology Park, Wuxi, Jiangsu, China, 180 Patentee after: China Resources micro integrated circuit (Wuxi) Co., Ltd Address before: No.180-22, Linghu Avenue, Taihu International Science and Technology Park, Wuxi, Jiangsu 214135 Patentee before: WUXI CHINA RESOURCES SEMICO Co.,Ltd. |
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