CN102955309A - Array substrate, display panel as well as display device and driving method thereof - Google Patents
Array substrate, display panel as well as display device and driving method thereof Download PDFInfo
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Abstract
The invention relates to the technical field of display, and discloses an array substrate, a display panel as well as a display device and a driving method thereof. The array substrate comprises a grid line, a data line, pixel electrodes and pixel switches; a source electrode of each pixel switch is connected with one pixel electrode; two columns of pixel electrodes which are located on the both sides of the same data line and are adjacent to the data line are connected with the data line through the drain electrodes of the pixel switches; each row of pixel electrode is connected with the grid line through the grid electrodes of the pixel switches; as for two adjacent pixel electrodes in the same row, one is connected with the pixel switch started by grid positive voltage, and the other one is connected with the pixel switch started by grid negative voltage; and as for two adjacent pixel electrodes in the same column, one is connected with the pixel switch started by the grid positive voltage, and the other one is connected with the pixel switch started by the grid negative voltage. According to the invention, a column inversion driving circuit with low cost is used, so that a point inversion display effect can be realized, and the quality of a display picture can be improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel, a display device and a driving method thereof.
Background
An array substrate of display devices such as a TFT-LCD (thin film field effect transistor-liquid crystal display), an OLED (organic light emitting diode) display device, electronic paper and the like adopts a row-column matrix driving mode, specifically, a row-column matrix is formed by intersecting N rows of grid lines and M columns of data lines, TFTs (thin film field effect transistors) are arranged at each intersection, and each pixel electrode in the row-column matrix is controlled through the TFTs.
On the premise that the resolution is not changed, in order to reduce the cost of the product, the number of data lines can be reduced. To achieve this, the prior art proposes a Dual Gate-based array substrate structure as shown in fig. 1, and the specific implementation manner is as follows:
assume that the resolution of the display panel is N × M, i.e. there are N × M pixel electrodes. The array substrate comprises N rows of grid lines (G)1~GN) M rows data line (D)1~DM) And N x 2M single gate TFTs. Wherein, 2 TFTs are arranged at the crossing of one row of grid lines and one row of data lines, and one TFT is a TFT (TFT) which is opened by positive voltage of a grid electrode+Express), the other TFT is a TFT whose gate is turned on at a negative voltage (using TFT)-Representation).
The working principle is as follows: in the scanning period of a grid line, the first half frame signal of the grid line is a positive turn-on voltage and is used as a TFT (thin film transistor) which is turned on by positive voltage of a grid electrode connected with the grid line+Enable signal of so as to AND TFT+The connected data line outputs a data driving signal to the TFT+A corresponding pixel electrode 10; the latter half frame signal of the grid line is negative turn-on voltage and is used as the TFT of negative turn-on of the grid connected with the negative turn-on voltage-Enable signal of so as to AND TFT-The connected data line outputs data driving signal to the TFT-Corresponding pixel electrodes 10.
In order to prevent the dc blocking effect and reduce the dc residue, a positive polarity inversion driving method and a negative polarity inversion driving method are generally adopted for driving the pixel electrodes of the display device, and the common inversion driving methods include: frame inversion, row inversion, column inversion, and dot inversion.
In the display device having the Dual Gate structure, the display effect achieved by the dot inversion driving method is better than that achieved by other driving methods, but the driving circuit for realizing the dot inversion driving method is expensive to realize. At present, no solution for realizing high-quality display effect by adopting a low-cost inversion driving circuit exists in a display device with a Dual Gate structure.
Disclosure of Invention
The invention aims to provide an array substrate, a display panel, a display device and a driving method thereof, which are used for solving the problem that the cost and the display effect of an inversion driving circuit of a Dual Gate structure display device in the prior art cannot be considered at the same time.
The purpose of the invention is realized by the following technical scheme:
an array substrate comprises a grid line, a data line, a pixel electrode and a pixel switch:
the source electrode of each pixel switch is connected with one pixel electrode, two columns of pixel electrodes which are positioned at two sides of the same data line and adjacent to the data line are connected with the data line through the drain electrodes of the pixel switches, and each row of pixel electrodes is connected with one grid line through the grid electrode of the pixel switches;
one of the two adjacent pixel electrodes in the same row is connected with the pixel switch with the positive-voltage-started grid electrode, and the other one of the two adjacent pixel electrodes is connected with the pixel switch with the negative-voltage-started grid electrode;
and one of the two adjacent pixel electrodes in the same column is connected with the pixel switch with the positive voltage on the grid, and the other one of the two adjacent pixel electrodes is connected with the pixel switch with the negative voltage on the grid.
A display panel comprises the array substrate.
A display device comprises the display panel and a column inversion driving circuit for driving the array substrate with the Dual Gate structure;
the grid line driving end of the column inversion driving circuit is connected with the grid line of the array substrate, and the data line driving end of the column inversion driving circuit is connected with the data line of the array substrate.
A driving method of the above display device, the scanning period being divided into a first period and a second period within a scanning period of one gate line, the method comprising:
in a first period of the scanning period, a grid line driving end of the column inversion driving circuit outputs a positive starting voltage to one grid line of the array substrate, and a data line driving end of the column inversion driving circuit outputs a positive voltage data signal to a data line of the array substrate;
in a second period of the scanning period, the gate line driving end of the column inversion driving circuit outputs a negative-going turn-on voltage to the gate line, and the data line driving end of the column inversion driving circuit outputs a negative-going data signal to the data line of the array substrate.
In the display device comprising the array substrate with the Dual Gate structure, the implementation cost of a column inversion driving circuit is low, and in order to realize a driving mode of dot inversion by using the column inversion driving circuit, on the basis of the traditional Dual Gate structure, the invention provides the array substrate, and pixel switches which are alternately distributed and are opened by negative pressure of a grid electrode and pixel switches which are opened by positive pressure of the grid electrode are adopted to control the opening/closing of a pixel electrode. Therefore, the array substrate, the display panel, the display device and the driving method thereof provided by the invention utilize the low-cost column inversion driving circuit to realize the dot inversion display effect and improve the quality of the display picture.
Drawings
FIG. 1 is a schematic structural diagram of a Dual Gate array substrate of the prior art;
fig. 2 is a schematic structural diagram of a first array substrate according to an embodiment of the invention;
fig. 3 is a schematic structural diagram of a second array substrate according to an embodiment of the invention;
FIG. 4 is a schematic structural diagram of a third array substrate according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present invention;
FIG. 6 is a timing diagram of driving signals for driving the display device shown in FIG. 5;
fig. 7 is a schematic diagram illustrating a dot inversion effect of the display device shown in fig. 6 according to an embodiment of the invention.
Detailed Description
In order to achieve a dot inversion display effect by using a column inversion driving method and achieve low cost and high display quality, an embodiment of the present invention provides a new array substrate structure based on a conventional Dual Gate structure, including: the pixel structure comprises a grid line, a data line, a pixel electrode and a pixel switch.
Taking the array substrate shown in fig. 2 as an example, the array substrate comprises a gate line (G)1、G2、G3) And a data line (D)1、D2、D3) Pixel electrode (P)11~P36) And pixel switches (201 and 202), wherein the source electrode of each pixel switch is connected with one pixel electrode, two columns of pixel electrodes which are positioned at two sides of the same data line and adjacent to the data line are connected with the data line through the drain electrode of the pixel switch, and the pixel electrode of each row is connected with one grid line through the grid electrode of the pixel switch.
In the array substrate, the pixel switch is usually disposed at the intersection of the gate line and the data line, as shown in fig. 2.
For two adjacent pixel electrodes in the same row (as shown by a dashed line box 203 in fig. 2), one of the two pixel electrodes is connected to the pixel switch that is turned on by positive gate voltage (the pixel switch that is turned on by positive gate voltage is assumed to be 202, and the following is the same), and the other pixel electrode is connected to the pixel switch that is turned on by negative gate voltage (the pixel switch that is turned on by negative gate voltage is assumed to be 201, and the following is the same).
For two adjacent pixel electrodes in the same column (as shown by a dashed box 204 in fig. 2), one of the two adjacent pixel electrodes is connected to the pixel switch 202 which is turned on by positive gate voltage, and the other is connected to the pixel switch 201 which is turned on by negative gate voltage.
It should be noted that the array substrate structure shown in fig. 2 is only an example of the array substrate structure provided by the embodiment of the present invention, and is not intended to limit the scope of the present invention. Specifically, the number of the gate lines and the number of the data lines on the array substrate are not limited to 3, and the connection relationship between the gate lines, the data lines and the pixel electrodes is not limited to that shown in fig. 2.
For example, as shown in fig. 2, a gate line connected to each row of pixel electrodes is located below the row of pixel electrodes. However, in addition to the connection relationship shown in fig. 2, the gate line and the pixel electrode may be connected to each row of pixel electrodes, and the gate line connected to each row of pixel electrodes may be located above the row of pixel electrodes as shown in fig. 3. As shown in fig. 4, the gate line connected to the odd-numbered row of pixel electrodes is located below the row of pixel electrodes; the grid line connected with the even-numbered pixel electrodes is positioned above the row of pixel electrodes; or the grid line connected with the odd-numbered row of pixel electrodes is positioned above the row of pixel electrodes; the grid line connected with the even-numbered pixel electrodes is positioned below the row of pixel electrodes. Or any connection that satisfies the above-mentioned written description. It should be noted that, the above "upper" and "lower" specifically mean that, if the array substrate has n rows of pixel electrodes, the gate line connected to the n-1 th row of pixel electrodes is located below the row of pixel electrodes, that is, the gate line is located between the n-1 th row of pixel electrodes and the n-th row of pixel electrodes; the fact that the grid line connected with the pixel electrode of the (n-1) th row is positioned above the pixel electrode of the row means that the grid line is positioned between the pixel electrode of the (n-1) th row and the pixel electrode of the (n-2) th row.
The pixel switch in the embodiments of the present invention may be a pixel switch with a multi-gate structure, or a pixel switch with a single-gate structure.
The pixel switch in the embodiments of the present invention may be any semiconductor switch structure capable of controlling the on/off of the corresponding pixel electrode. Preferably, it may be a TFT.
Correspondingly, the TFT which is opened by positive grid voltage is an N-channel TFT, and the TFT which is opened by negative grid voltage is a P-channel TFT.
The embodiment of the invention also provides a display panel which comprises the array substrate in any embodiment.
The embodiment of the invention also provides a display device, which comprises the display panel and a column inversion driving circuit used for driving the Dual Gate structure array substrate. The grid line driving end of the column inversion driving circuit is connected with the grid line of the array substrate, and the data line driving end of the column inversion driving circuit is connected with the data line of the array substrate.
As shown in fig. 5, the array substrate structure of the display device is the same as that shown in fig. 2, and the gate line driving terminal 206 of the column inversion driving circuit 205 and the gate line (G) of the array substrate are shown as an example1、G2、G3) A data line driving terminal 207 of the column inversion driving circuit 205 is connected to a data line (D) of the array substrate1、D2、D3) And (4) connecting.
The gate line driving terminal 206 of the column inversion driving circuit 205 is used for driving the gate lines (G) of the array substrate row by row1、G2、G3) Outputting the turn-on voltage, the data line driving terminal 207 of the column inversion driving circuit 205 is used for driving the data line (D) of the array substrate1、D2、D3) A positive voltage or a negative voltage is output as a data signal. Specifically, when the gate line driving terminal 206 faces the gate line (G) of the array substrate1、G2、G3) When outputting the forward start voltage, the data line driving terminal 207 faces the data line (D) of the array substrate1、D2、D3) Outputting positive voltage as data signal when the gate line driving terminal 206 faces the gate line (G) of the array substrate1、G2、G3) When outputting negative-going turn-on voltage, the data line driving terminal 207 faces the data line (D) of the array substrate1、D2、D3) A negative voltage is output as a data signal.
In the embodiment of the present invention, the specific implementation structure of the column inversion driving circuit 205 can be implemented by a column inversion driving circuit of an existing display device that drives a Dual Gate structure, and the specific circuit structure thereof is not described in detail in the present invention.
The embodiment of the invention also provides a driving method of the display device. In a scan period of one gate line, the scan period is divided into a first period and a second period, the method including:
in a first period of the scanning period, a grid line driving end of the column inversion driving circuit outputs a positive starting voltage to one grid line of the array substrate, and a data line driving end of the column inversion driving circuit outputs a positive voltage data signal to a data line of the array substrate;
in a second period of the scanning period, the gate line driving end of the column inversion driving circuit outputs a negative-going turn-on voltage to the gate line, and the data line driving end of the column inversion driving circuit outputs a negative-going data signal to the data line of the array substrate.
Preferably, the timing of the first period precedes the timing of the second period; alternatively, the timing of the second period precedes the first period.
In the display device shown in fig. 5, the timing of the driving signal output from the column inversion driving circuit 205 is as shown in fig. 6.
In a period from T1 to T6 of a frame:
in the period T1, the gate line driving terminal 206 faces the gate line G1Outputs a forward start-up voltage to drive line output 207 toA D signal (data signal) output from the data line is a positive voltage, and a gate line G1The pixel switch 202, which is turned on by the positive gate voltage, is turned on, and the pixel electrodes (such as the pixel electrodes P11, P13, P15) connected thereto store a positive voltage;
in the period T2, the gate line driving terminal 206 faces the gate line G1Outputs a negative-going turn-on voltage, drives the D signal outputted from the line output terminal 207 to the data line to be a negative voltage, and connects with the gate line G1The pixel switch 201 with the connected negative gate voltage turned on is turned on, and the pixel electrodes (such as the pixel electrodes P12, P14 and P16) connected with the pixel switch store negative voltage;
in the period T3, the gate line driving terminal 206 faces the gate line G2Outputs a positive voltage, drives the D signal outputted from the line output terminal 207 to the data line to a positive voltage, and connects with the gate line G2The pixel switch 202, which is turned on by the positive gate voltage, is turned on, and the pixel electrodes (such as the pixel electrodes P22, P24, P26) connected thereto store a positive voltage;
in the period T4, the gate line driving terminal 206 faces the gate line G2Outputs a negative-going turn-on voltage, drives the D signal outputted from the line output terminal 207 to the data line to be a negative voltage, and connects with the gate line G2The pixel switch 201 with the connected negative gate voltage turned on is turned on, and the pixel electrodes (such as the pixel electrodes P21, P23 and P25) connected with the pixel switch store negative voltage;
in the period T5, the gate line driving terminal 206 faces the gate line G3Outputs a positive voltage, drives the D signal outputted from the line output terminal 207 to the data line to a positive voltage, and connects with the gate line G3The pixel switch 202, which is turned on by the positive gate voltage, is turned on, and the pixel electrodes (such as the pixel electrodes P31, P33, P35) connected thereto store a positive voltage;
in the period T6, the gate line driving terminal 206 faces the gate line G3Outputs a negative-going turn-on voltage, drives the D signal outputted from the line output terminal 207 to the data line to be a negative voltage, and connects with the gate line G3The pixel switch 201, which is connected to the gate negative voltage, is turned on, and the pixel electrodes (e.g., the pixel electrodes P32, P34, P36) connected thereto store a negative voltage.
According to the characteristics of the column inversion driving method, in the period from T7 to T12 of the scanning period of the next frame:
in the period T7, the gate line driving terminal 206 faces the gate line G1Outputs a forward start voltage, outputs a negative voltage to the data line from the driving line output terminal 207, and connects with the gate line G1The pixel switch 202, which is turned on by the positive gate voltage, is turned on, and the pixel electrodes (such as the pixel electrodes P11, P13, P15) connected to the pixel switch store negative voltage;
in the period T8, the gate line driving terminal 206 faces the gate line G1Outputs a negative-going turn-on voltage, drives the D signal outputted from the line output terminal 207 to the data line to a positive voltage, and connects with the gate line G1The pixel switch 201 with the connected negative gate voltage turned on is turned on, and the pixel electrodes (such as the pixel electrodes P12, P14 and P16) connected with the pixel switch store positive voltage;
in the period T9, the gate line driving terminal 206 faces the gate line G2Outputs a positive turn-on voltage, drives the D signal outputted from the line output terminal 207 to the data line to a negative voltage, and connects with the gate line G2The pixel switch 202, which is turned on by the positive gate voltage, is turned on, and the pixel electrodes (such as the pixel electrodes P22, P24, P26) connected to the pixel switch store negative voltage;
in the period T10, the gate line driving terminal 206 faces the gate line G2Outputs a negative-going turn-on voltage, drives the D signal outputted from the line output terminal 207 to the data line to a positive voltage, and connects with the gate line G2The pixel switch 201 with the connected negative gate voltage turned on is turned on, and the pixel electrodes (such as the pixel electrodes P21, P23 and P25) connected with the pixel switch store positive voltage;
in the period T11, the gate line driving terminal 206 faces the gate line G3Outputs a positive turn-on voltage, drives the D signal outputted from the line output terminal 207 to the data line to a negative voltage, and connects with the gate line G3The pixel switch 202, which is turned on by the positive gate voltage, is turned on, and the pixel electrodes (such as the pixel electrodes P31, P33, P35) connected to the pixel switch store negative voltage;
in the period T12, the gate line driving terminal 206 faces the gate line G3Output negative turn-on voltage, drive the output end of the line207 a positive voltage to the data line, and a gate line G3The pixel switch 201, which is turned on by the connected gate negative voltage, is turned on, and the pixel electrodes (e.g., the pixel electrodes P32, P34, P36) connected thereto store a positive voltage.
The pixel electrode inversion effect between the two frame scan periods is shown in fig. 7. Therefore, the display device provided by the embodiment of the invention realizes the display effect of dot inversion by a column inversion driving mode.
The display device provided by the embodiment of the invention can be a liquid crystal display, a liquid crystal television, an OLED television panel, an OLED display, a plasma display, electronic paper and other display devices.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. The array substrate comprises a grid line, a data line, a pixel electrode and a pixel switch, and is characterized in that:
the source electrode of each pixel switch is connected with one pixel electrode, two columns of pixel electrodes which are positioned at two sides of the same data line and adjacent to the data line are connected with the data line through the drain electrodes of the pixel switches, and each row of pixel electrodes is connected with one grid line through the grid electrode of the pixel switches;
one of the two adjacent pixel electrodes in the same row is connected with the pixel switch with the positive-voltage-started grid electrode, and the other one of the two adjacent pixel electrodes is connected with the pixel switch with the negative-voltage-started grid electrode;
and one of the two adjacent pixel electrodes in the same column is connected with the pixel switch with the positive voltage on the grid, and the other one of the two adjacent pixel electrodes is connected with the pixel switch with the negative voltage on the grid.
2. The array substrate of claim 1, wherein the gate line connected to each row of pixel electrodes is located below the row of pixel electrodes;
or,
the grid line connected with each row of pixel electrodes is positioned above the row of pixel electrodes.
3. The array substrate of claim 1, wherein the gate lines connected to the odd rows of pixel electrodes are located below the rows of pixel electrodes; the grid line connected with the even-numbered row of pixel electrodes is positioned above the row of pixel electrodes;
or,
the grid line connected with the odd-numbered row of pixel electrodes is positioned above the row of pixel electrodes; the grid line connected with the even-numbered row of pixel electrodes is positioned below the row of pixel electrodes.
4. The array substrate of any one of claims 1 to 3, wherein the pixel switch is a Thin Film Transistor (TFT).
5. The array substrate of any one of claims 1 to 3, wherein the pixel switch is a multi-gate pixel switch or a single-gate pixel switch.
6. A display panel comprising the array substrate according to any one of claims 1 to 5.
7. A display device comprising the display panel according to claim 6, and a column inversion driving circuit for driving the Dual Gate structure array substrate;
the grid line driving end of the column inversion driving circuit is connected with the grid line of the array substrate, and the data line driving end of the column inversion driving circuit is connected with the data line of the array substrate.
8. A driving method of a display device according to claim 7, wherein the scanning period is divided into a first period and a second period in a scanning period of one gate line, the method comprising:
in a first period of the scanning period, a grid line driving end of the column inversion driving circuit outputs a positive starting voltage to one grid line of the array substrate, and a data line driving end of the column inversion driving circuit outputs a positive voltage data signal to a data line of the array substrate;
in a second period of the scanning period, the gate line driving end of the column inversion driving circuit outputs a negative-going turn-on voltage to the gate line, and the data line driving end of the column inversion driving circuit outputs a negative-going data signal to the data line of the array substrate.
9. The method of claim 8, further comprising: the timing of the first period precedes the timing of the second period; alternatively, the timing of the second period precedes the first period.
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CN105047161A (en) * | 2015-08-26 | 2015-11-11 | 京东方科技集团股份有限公司 | Pixel unit driving device and method, and display apparatus |
US10380959B2 (en) | 2015-08-26 | 2019-08-13 | Boe Technology Group Co., Ltd. | Pixel unit driving circuit, driving method and display apparatus for pixel unit using alternately switching elements having inverted polarities |
CN106019743A (en) * | 2016-06-15 | 2016-10-12 | 京东方科技集团股份有限公司 | Array substrate, method for driving array substrate, and relevant devices |
CN106019743B (en) * | 2016-06-15 | 2023-08-22 | 京东方科技集团股份有限公司 | Array substrate, driving method thereof and related device |
CN107045239A (en) * | 2017-04-05 | 2017-08-15 | 合肥京东方光电科技有限公司 | Array base palte and preparation method thereof, display panel and display device |
WO2018184377A1 (en) * | 2017-04-05 | 2018-10-11 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof, display panel and driving method thereof, and display device |
CN106991956A (en) * | 2017-06-05 | 2017-07-28 | 京东方科技集团股份有限公司 | A kind of image element circuit and its driving method and its preparation method, display device |
US11081047B2 (en) | 2017-06-05 | 2021-08-03 | Boe Technology Group Co., Ltd. | Pixel structure, driving method therefor and preparation method therefor, and display apparatus |
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