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CN102946309B - Hyperchaotic circuit - Google Patents

Hyperchaotic circuit Download PDF

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Publication number
CN102946309B
CN102946309B CN201210467958.2A CN201210467958A CN102946309B CN 102946309 B CN102946309 B CN 102946309B CN 201210467958 A CN201210467958 A CN 201210467958A CN 102946309 B CN102946309 B CN 102946309B
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resistance
operational amplifier
output
inverting input
connect
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CN102946309A (en
Inventor
何怡刚
吴先明
罗旗舞
于文新
郑剑
尹柏强
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Hefei University of Technology
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Hefei University of Technology
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Abstract

The invention provides a hyperchaotic circuit which is composed of two analog multipliers, ten operational amplifiers, a resistor and a capacitor. According to the hyperchaotic circuit, a linear controller is introduced on the basis of a three-dimensional chaotic system, so that a new four-dimensional chaotic system is realized and is applicable to chaos theory of universities, laboratory teaching and demonstration, science popularization demonstration and the like, and can be used for displaying various waveforms, phase diagrams and evolution curves of a hyperchaotic system.

Description

A kind of hyperchaotic circuit
Technical field
The invention belongs to nonlinear circuit, especially relate to a kind of four dimensional chaos circuit, in order to distinguish over three-dimensional chaotic circuit, four dimensional chaos circuit is also referred to as hyperchaotic circuit.
Background technology
Three-dimensional self-governing chaos system only has a positive Lapunov index, and their bandwidth relative narrower, in communication engineering, easy filtered system is disposed, and makes it lose the meaning of application.And hyperchaos has two and plural Lyapunov index, compared with three-dimensional chaos, it has more complicated dynamic behavior, has better using value in the field such as information processing and communication engineering.
Application number is 200710072479.X, and publication number is the patent of invention " ultra-chaos pseudo random sequence generator " of CN101145901A is a kind of method of hyperchaos pseudorandom sequence generation, is propose a kind of algorithm.Application number is 200910103368.X, to be the patent of invention " hyperchaos signal generating method and hyperchaos signal generating system " of CN101510862A be publication number by introducing a sinusoidal signal to nonlinear circuit and then produce hyperchaos signal, which increases the complexity of circuit.
Summary of the invention
The technical problem to be solved in the present invention is, overcomes the above-mentioned defect that prior art exists, and provides a kind of hyperchaotic circuit being applicable to university's chaos science, experimental teaching and demonstration, scientific popularization.
The technical solution adopted for the present invention to solve the technical problems is:
A kind of hyperchaotic circuit, is made up of two analog multipliers, ten operational amplifiers and resistance and electric capacity, wherein the second operational amplifier U 2inverting input and the 4th resistance R 4connect, the second operational amplifier U 2in-phase input end ground connection, the second operational amplifier U 2the first electric capacity C is connected between inverting input with output 1, the second operational amplifier U 2output is X output; 5th operational amplifier U 5inverting input and the tenth resistance R 10connect, the 5th operational amplifier U 5in-phase input end ground connection, the 5th operational amplifier U 5the second electric capacity C is connected between inverting input with output 2, the 5th operational amplifier U 5output is Y output; 7th operational amplifier U 7inverting input and the 14 resistance R 14connect, the 7th operational amplifier U 7in-phase input end ground connection, the 7th operational amplifier U 7the 3rd electric capacity C is connected between inverting input with output 3, the 7th operational amplifier U 7output is Z output; Tenth operational amplifier U 10inverting input is connected with the 19 resistance, the tenth operational amplifier U 10the 4th electric capacity C is connected between inverting input with output 3, the tenth operational amplifier U 10output is U output; 3rd operational amplifier U 3inverting input and the 5th resistance R 5connect, the 3rd operational amplifier U 3in-phase input end ground connection, the 3rd operational amplifier U 3the 6th resistance R is connected between inverting input with output 6, the 3rd operational amplifier U 3output is NOTX output; 8th operational amplifier U 8inverting input and the 15 resistance R 15connect, the 8th operational amplifier U 8in-phase input end ground connection, the 8th operational amplifier U 8the 16 resistance R is connected between inverting input with output 16, the 8th operational amplifier U 8output is NOTZ output; First operational amplifier U 1inverting input and the first resistance R 1, the second resistance R 2connect, the first resistance R 1the other end is connected with Y output again, the second resistance R 2the other end is connected with NOTX output again, the first operational amplifier U 1in-phase input end ground connection, the first operational amplifier U 1the 3rd resistance R is connected between inverting input with output 3, the first operational amplifier U 1output and the 4th resistance R 4connect; Four-operational amplifier U 4inverting input and the 7th resistance R 7, the 8th resistance R 8, the 20 resistance R 20connect, the 7th resistance R 7the other end is connected with X output again, the 20 resistance R 20the other end is connected with U output again, four-operational amplifier U 4in-phase input end ground connection, four-operational amplifier U 4the 9th resistance R is connected between inverting input with output 9, four-operational amplifier U 4output and the tenth resistance R 10connect; 6th operational amplifier U 6inverting input and the 11 resistance R 11, the 12 resistance R 12connect, the 11 resistance R 11the other end is connected with NOTZ output again, the 6th operational amplifier U 6in-phase input end ground connection, the 6th operational amplifier U 6the 13 resistance R is connected between inverting input with output 13, the 6th operational amplifier U 6output and the 14 resistance R 14connect; 9th operational amplifier U 9inverting input and the 17 resistance R 17connect, the 17 resistance R 17the other end is connected with NOTX output again, the 9th operational amplifier U 9in-phase input end ground connection, the 9th operational amplifier U 9the 18 resistance R is connected between inverting input with output 18, the 9th operational amplifier U 9output and the 19 resistance R 19connect; First analog multiplier A 1two inputs are connected with NOTX output, Z output respectively, the first analog multiplier A 1output and the 8th resistance R 8connect; Second analog multiplier A 2two inputs are connected with X output, Y output respectively, the second analog multiplier A 2output and the 12 resistance R 12connect.
Described 17 resistance R 17available potentiometer replaces, and changes the 17 resistance R 17resistance can observe the various curves that this hyperchaos develops.
Beneficial effect of the present invention is: the oscillogram of each output of observable X, Y, Z, U, also observable X-Y, X-Z, X-U, Y-Z, Y-U, Z-U phasor in ordinary oscilloscope.The present invention introduces a linear controller on the basis of three-dimensional chaotic system, achieves a kind of new four dimensional chaos system, is applicable to university's chaos science, experimental teaching and demonstration, scientific popularization with experimental demonstration etc.; The various waveform of hyperchaotic system, phasor can be shown and develop curve.
Accompanying drawing explanation
Fig. 1 is hyperchaotic circuit schematic diagram of the present invention;
Fig. 2 is the X output oscillogram of hyperchaotic circuit of the present invention;
Fig. 3 is the Y output oscillogram of hyperchaotic circuit of the present invention;
Fig. 4 is the Z output oscillogram of hyperchaotic circuit of the present invention;
Fig. 5 is the U output oscillogram of hyperchaotic circuit of the present invention;
Fig. 6 is that the X-Y of hyperchaotic circuit of the present invention exports phasor;
Fig. 7 is that the X-Z of hyperchaotic circuit of the present invention exports phasor;
Fig. 8 is that the X-U of hyperchaotic circuit of the present invention exports phasor;
Fig. 9 is that the Y-Z of hyperchaotic circuit of the present invention exports phasor;
Figure 10 is that the Y-U of hyperchaotic circuit of the present invention exports phasor;
Figure 11 is that the Z-U of hyperchaotic circuit of the present invention exports phasor.
Embodiment
Below in conjunction with drawings and Examples, the invention will be further described.
Embodiment 1:
With reference to Fig. 1, the present embodiment is made up of two analog multipliers, ten operational amplifiers and resistance and electric capacity, wherein the second operational amplifier U 2inverting input and the 4th resistance R 4connect, the second operational amplifier U 2in-phase input end ground connection, the second operational amplifier U 2the first electric capacity C is connected between inverting input with output 1, the second operational amplifier U 2output is X output; 5th operational amplifier U 5inverting input and the tenth resistance R 10connect, the 5th operational amplifier U 5in-phase input end ground connection, the 5th operational amplifier U 5the second electric capacity C is connected between inverting input with output 2, the 5th operational amplifier U 5output is Y output; 7th operational amplifier U 7inverting input and the 14 resistance R 14connect, the 7th operational amplifier U 7in-phase input end ground connection, the 7th operational amplifier U 7the 3rd electric capacity C is connected between inverting input with output 3, the 7th operational amplifier U 7output is Z output; Tenth operational amplifier U 10inverting input is connected with the 19 resistance, the tenth operational amplifier U 10the 4th electric capacity C is connected between inverting input with output 4, the tenth operational amplifier U 10output is U output; 3rd operational amplifier U 3inverting input and the 5th resistance R 5connect, the 3rd operational amplifier U 3in-phase input end ground connection, the 3rd operational amplifier U 3the 6th resistance R is connected between inverting input with output 6, the 3rd operational amplifier U 3output is NOTX output; 8th operational amplifier U 8inverting input and the 15 resistance R 15connect, the 8th operational amplifier U 8in-phase input end ground connection, the 8th operational amplifier U 8the 16 resistance R is connected between inverting input with output 16, the 8th operational amplifier U 8output is NOTZ output; First operational amplifier U 1inverting input and the first resistance R 1, the second resistance R 2connect, the first resistance R 1the other end is connected with Y output again, the second resistance R 2the other end is connected with NOT X output again, the first operational amplifier U 1in-phase input end ground connection, the first operational amplifier U 1the 3rd resistance R is connected between inverting input with output 3, the first operational amplifier U 1output and the 4th resistance R 4connect; Four-operational amplifier U 4inverting input and the 7th resistance R 7, the 8th resistance R 8, the 20 resistance R 20connect, the 7th resistance R 7the other end is connected with X output again, the 20 resistance R 20the other end is connected with U output again, four-operational amplifier U 4in-phase input end ground connection, four-operational amplifier U 4the 9th resistance R is connected between inverting input with output 9, four-operational amplifier U 4output and the tenth resistance R 10connect; 6th operational amplifier U 6inverting input and the 11 resistance R 11, the 12 resistance R 12connect, the 11 resistance R 11the other end is connected with NOTZ output again, the 6th operational amplifier U 6in-phase input end ground connection, the 6th operational amplifier U 6the 13 resistance R is connected between inverting input with output 13, the 6th operational amplifier U 6output and the 14 resistance R 14connect; 9th operational amplifier U 9inverting input and the 17 resistance R 17connect, the 17 resistance R 17the other end is connected with NOTX output again, the 9th operational amplifier U 9in-phase input end ground connection, the 9th operational amplifier U 9the 18 resistance R is connected between inverting input with output 18, the 9th operational amplifier U 9output and the 19 resistance R 19connect; First analog multiplier A 1with the second analog multiplier A 2model all select AD633, its pin 1 and 3 as two inputs, the equal ground connection of pin 2,4 and 6, the first analog multiplier A 1two inputs are connected with NOTX output, Z output respectively, the first analog multiplier (A 1) output and the 8th resistance R 8connect; Second analog multiplier A 2two inputs are connected with X output, Y output respectively, the second analog multiplier A 2output and the 12 resistance R 12connect.
According to Fig. 1, make a hyperchaos one side PCB hardware circuit.New hyperchaos one side PCB hardware circuit Making programme: (1) is carried out circuit board wiring to Fig. 1 and is printed on photographic film; (2) on photosensitive single sided board, photographic film is exposed; (3) photographic plate after exposure is developed; (4) to the rotten copper of the photographic plate after development; (5) component pins hole is bored; (6) element is welded and fixed.Operational amplifier uses μ A741, and analog multiplier uses AD633, wherein the positive supply V of analog multiplier AD633, operational amplifier μ A741 dD, negative supply V eE, GND wiring time have partial line at top layer, adopt wire jumper connect.
As electric capacity C 1=C 2=C 3=C 4=10nF, resistance R 4=R 8=R 10=R 12=R 14=R 18=R 19=10K Ω, R 3=R 9=R 13=18K Ω, R 7=20K Ω, R 1=R 2=R 5=R 6=R 15=R 16=30K Ω, R 11=R 20=180K Ω, R 17=100K Ω, operational amplifier uses μ A741, and during analog multiplier use AD633, the oscillogram that circuit exports is shown in Fig. 2, Fig. 3, Fig. 4, Fig. 5, the phasor that circuit exports is shown in Fig. 6, Fig. 7, Fig. 8, Fig. 9, Figure 10, Figure 11, and embodiment 1 circuit fully achieves validity of the present invention.
Embodiment 2:
The difference of the present embodiment and embodiment 1 is: described 17 resistance R 17replace with potentiometer, change the 17 resistance R 17resistance can observe the various curves that this hyperchaos develops.

Claims (2)

1. oneplant hyperchaotic circuit, it is characterized in that, be made up of two analog multipliers, ten operational amplifiers and resistance and electric capacity, wherein the second operational amplifier U 2inverting input and the 4th resistance R 4connect, the second operational amplifier U 2in-phase input end ground connection, the second operational amplifier U 2the first electric capacity C is connected between inverting input with output 1, the second operational amplifier U 2output is X output; 5th operational amplifier U 5inverting input and the tenth resistance R 10connect, the 5th operational amplifier U 5in-phase input end ground connection, the 5th operational amplifier U 5the second electric capacity C is connected between inverting input with output 2, the 5th operational amplifier U 5output is Y output; 7th operational amplifier U 7inverting input and the 14 resistance R 14connect, the 7th operational amplifier U 7in-phase input end ground connection, the 7th operational amplifier U 7the 3rd electric capacity C is connected between inverting input with output 3, the 7th operational amplifier U 7output is Z output; Tenth operational amplifier U 10inverting input is connected with the 19 resistance, the tenth operational amplifier U 10the 4th electric capacity C is connected between inverting input with output 3, the tenth operational amplifier U 10output is U output; 3rd operational amplifier U 3inverting input and the 5th resistance R 5connect, the 3rd operational amplifier U 3in-phase input end ground connection, the 3rd operational amplifier U 3the 6th resistance R is connected between inverting input with output 6, the 3rd operational amplifier U 3output is NOTX output; 8th operational amplifier U 8inverting input and the 15 resistance R 15connect, the 8th operational amplifier U 8in-phase input end ground connection, the 8th operational amplifier U 8the 16 resistance R is connected between inverting input with output 16, the 8th operational amplifier U 8output is NOTZ output; First operational amplifier U 1inverting input and the first resistance R 1, the second resistance R 2connect, the first resistance R 1with the second resistance R 2parallel connection, the first resistance R 1the other end is connected with Y output again, the second resistance R 2the other end is connected with NOTX output again, the first operational amplifier U 1in-phase input end ground connection, the first operational amplifier U 1the 3rd resistance R is connected between inverting input with output 3, the first operational amplifier U 1output and the 4th resistance R 4connect; Four-operational amplifier U 4inverting input and the 7th resistance R 7, the 8th resistance R 8, the 20 resistance R 20connect, the 7th resistance R 7the other end is connected with X output again, the 20 resistance R 20the other end is connected with U output again, four-operational amplifier U 4in-phase input end ground connection, four-operational amplifier U 4the 9th resistance R is connected between inverting input with output 9, four-operational amplifier U 4output and the tenth resistance R 10connect; 6th operational amplifier U 6inverting input and the 11 resistance R 11, the 12 resistance R 12connect, the 11 resistance R 11with the 12 resistance R 12parallel connection, the 11 resistance R 11the other end is connected with NOTZ output again, the 6th operational amplifier U 6in-phase input end ground connection, the 6th operational amplifier U 6the 13 resistance R is connected between inverting input with output 13, the 6th operational amplifier U 6output and the 14 resistance R 14connect; 9th operational amplifier U 9inverting input and the 17 resistance R 17connect, the 17 resistance R 17the other end is connected with NOTX output again, the 9th operational amplifier U 9in-phase input end ground connection, the 9th operational amplifier U 9the 18 resistance R is connected between inverting input with output 18, the 9th operational amplifier U 9output and the 19 resistance R 19connect; First analog multiplier A 1two inputs are connected with NOTX output, Z output respectively, the first analog multiplier A 1output and the 8th resistance R 8connect; Second analog multiplier A 2two inputs are connected with X output, Y output respectively, the second analog multiplier A 2output and the 12 resistance R 12connect.
2. hyperchaotic circuit according to claim 1, is characterized in that, the 17 resistance R 17replace with potentiometer, change the 17 resistance R 17resistance observes the various curves that hyperchaos develops.
CN201210467958.2A 2012-11-19 2012-11-19 Hyperchaotic circuit Active CN102946309B (en)

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Publication number Priority date Publication date Assignee Title
CN104202140A (en) * 2014-08-31 2014-12-10 王春梅 Four-dimensional balance point-free hyperchaotic system based on five-simplest chaotic system, and analogue circuit
CN104486063B (en) * 2014-12-17 2017-12-08 山东外国语职业学院 A kind of five rank amplitude limit type Jerk hyperchaotic circuits
CN108022488B (en) * 2017-07-10 2020-06-09 西京学院 Four-dimensional coupling power generation hyperchaotic system analog circuit
CN110299750B (en) * 2019-07-03 2020-10-16 南京荟学智能科技有限公司 Wireless charging system and method for low-power-consumption product
CN112683322A (en) * 2020-12-18 2021-04-20 中国人民解放军海军工程大学 Chaos detection circuit module

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101145901A (en) * 2007-07-06 2008-03-19 哈尔滨工程大学 Ultra-chaos pseudo random sequence generator
CN101510862A (en) * 2009-03-13 2009-08-19 重庆邮电大学 Method and system for generating ultra-chaos signal
CN101826958A (en) * 2010-04-20 2010-09-08 江苏技术师范学院 Multi-architecture chaotic signal generator
CN202218241U (en) * 2011-09-27 2012-05-09 滨州学院 Four-dimensional chaotic circuit with larger separating index

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101145901A (en) * 2007-07-06 2008-03-19 哈尔滨工程大学 Ultra-chaos pseudo random sequence generator
CN101510862A (en) * 2009-03-13 2009-08-19 重庆邮电大学 Method and system for generating ultra-chaos signal
CN101826958A (en) * 2010-04-20 2010-09-08 江苏技术师范学院 Multi-architecture chaotic signal generator
CN202218241U (en) * 2011-09-27 2012-05-09 滨州学院 Four-dimensional chaotic circuit with larger separating index

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