CN102790601B - RC (resistance-capacitance) oscillator - Google Patents

Abstract

The invention discloses an RC (resistance-capacitance) oscillator, which comprises a bias voltage generating circuit, a charging and discharging current generating circuit, a charging and discharging circuit, an external hysteresis voltage generating and gating circuit, an internal hysteresis comparator and a feedback control signal generating circuit. By adopting the internal and external hysteresis comparator, the reference current and the reference voltage can change along with changes in the voltage of an external power supply, so that effects of the voltage of the power supply on the output frequency can be overcome. Meanwhile, since resistors with different temperature coefficients are adopted, the reference current cannot be affected by the temperature. Moreover, since only one comparator is adopted in the overall structure, effects of the temperature, caused by the input offset voltage in double comparators, on the output frequency can be overcome.

Description

RC oscillator

Technical field

The invention belongs to technical field of integrated circuits, be specifically related to a kind of adjustable RC oscillator of high accuracy frequency with inside and outside hysteresis comparator.

Background technology

Generally, RC oscillator produces frequency of oscillation by the time delay that discharges and recharges to resistance capacitance, the frequency producing is easily subject to the impact of supply voltage, temperature, in order to overcome the impact on RC oscillator output frequency of supply voltage and temperature, numerous designs and invention have proposed high-precision RC oscillator, as shown in Figure 1, for the structure chart of the high accuracy RC oscillator with dual comparator at present, by charge and discharge capacitance C0, comparator A1 and A2, rest-set flip-flop, reference voltage source generating circuit, charging and discharging currents produces circuit and charge-discharge control circuit composition.Charge-discharge circuit provides charging and discharging currents I _c, I conventionally _cbe not subject to the impact of supply voltage and temperature, V _rEF1and V _rEF2produced by voltage reference, irrelevant with supply voltage and temperature.

Above-mentioned oscillator has reduced reference current and the dependence of reference voltage to supply voltage and temperature, thereby reduces supply voltage and the impact of temperature on output frequency; In addition, for some application-specific, need to be by regulation output frequency with some specific function of adaptive circuit, and in above-mentioned oscillator, R and C are integrated on chip, frequency adjustment difficulty, narrow application range; Adopt dual comparator structure, this,, when reduction supply voltage is on output frequency impact, has also brought new problem to circuit simultaneously, and the input offset voltage of dual comparator is different, and the input offset voltage of establishing dual comparator is respectively V _oS1and V _oS2, both is poor | V _oS1-V _oS2| up to mV level, and be all temperature sensitive amount, thereby cause output frequency to be still subject to the impact of temperature.

Summary of the invention

The object of the invention is the problems referred to above that exist in order to solve existing RC oscillator, proposed a kind of RC oscillator.

Technical scheme of the present invention is: a kind of RC oscillator, comprising: bias-voltage generating circuit, charging and discharging currents produce circuit, charge-discharge circuit, outside hysteresis voltage generation and gating circuit, inner hysteresis comparator and feedback control signal and produce circuit, wherein,

Described bias-voltage generating circuit is for generation of three road reference voltages, charging and discharging currents produces circuit for generation of being input to the electric current of charge-discharge circuit and the bias current of inner hysteresis comparator, under the control of the first feedback signal that charge-discharge circuit produces at feedback control signal generation circuit, exports the negative input of triangular signal to inner hysteresis comparator; Outside hysteresis voltage produces and gating circuit produces under the control of the first feedback signal that circuit produces and the second feedback signal the positive input that the first via reference voltage of input and the second road reference voltage is gated for to first via reference voltage or the second road reference voltage and is connected to inner hysteresis comparator in feedback control signal, and the output of inner hysteresis comparator is connected with the input of feedback control signal generation circuit and as the output of described RC oscillator.

Further, described bias-voltage generating circuit, comprise resistance R 1, R2, R3 and R3, capacitor C 11 and C12, wherein, the supply voltage of the first termination outside of resistance R 1, the second end of resistance R 1 is connected with the first end of resistance R 2, the second end of resistance R 2 is connected with the first end of resistance R 3, the second end of resistance R 3 is connected with the first end of resistance R 4, the second end ground connection of resistance R 4, the second end of resistance R 3 is by capacitor C 11 ground connection and export first via reference voltage, the second end of resistance R 2 is by capacitor C 12 ground connection and export the second road reference voltage, the second end output Third Road reference voltage of resistance R 1.

Further, described charging and discharging currents produces circuit and comprises: resistance R 5 and R6 that temperature coefficient is contrary, the first operational amplifier and PMOS pipe M0, wherein, the supply voltage of the first termination outside of resistance R 5, the first end of the second terminating resistor R6 of resistance R 5, the source electrode of the negative input of second termination the first operational amplifier of resistance R 6 and PMOS pipe M0, the positive input of operational amplifier connects the second road reference voltage of bias-voltage generating circuit output, the output of operational amplifier connects the grid of PMOS pipe M0, the drain electrode of PMOS pipe M0 produces the output of circuit as described charging and discharging currents.

Further, described charge-discharge circuit comprises NMOS pipe M5, M6, M7, M8, M9, M10, M11, PMOS pipe M12, M13 and charge and discharge capacitance C0, wherein, the drain electrode of NMOS pipe M6 connects the source electrode of NMOS pipe M5, and grid connects outside enable signal, source ground; The drain electrode of M8 connects the source electrode of M7, and grid connects outside enable signal, source ground, and M5 grid leak short circuit is as the input of described charge-discharge circuit; M7 tube grid connects the grid of M5, and drain electrode connects the source electrode of NMOS pipe M11, and source electrode connects the drain electrode of M8; M9 tube grid connects the grid of M5, and drain electrode connects the drain electrode of PMOS pipe M13 the output as described charge-discharge circuit, and source electrode connects the drain electrode of M10, M12 grid leak short circuit, and connect the drain electrode of M11 and the grid of M13, source electrode connects outer power voltage; The grid of M13 connects the grid of M12, and drain electrode is as the output of charge-discharge circuit, and source electrode connects outer power voltage; The grid of M11 connects the Third Road reference voltage of bias-voltage generating circuit output, and drain electrode connects the leakage of M12, and source electrode connects the drain electrode of M7; The drain electrode of charge and discharge capacitance C0 mono-termination M13, other end ground connection; The grid of M10 produces for receiving feedback control signal the first feedback signal that circuit produces as the FEEDBACK CONTROL end of described charge-discharge circuit, and the drain electrode of M10 connects the source electrode of M9, the source ground of M10.

Further, described feedback control signal produces circuit, comprise: the first inverter and the second inverter, wherein, the input of the first inverter produces the input of circuit as described feedback control signal, the output of the first inverter is connected with the input of the second inverter, and the output of the first inverter is exported the first feedback signal of described feedback control signal generation circuit, and the output of the second inverter is exported the second feedback signal of described feedback control signal generation circuit.

Further, described outside hysteresis voltage produces and gating circuit comprises NMOS pipe M14, M15 and PMOS pipe M16, M17, wherein, the drain electrode of M14 and the source electrode of M16 connect the second road reference voltage of bias-voltage generating circuit output, the grid of M14 and the grid of M17 connect feedback control signal and produce the second feedback signal of the generation of circuit, the source electrode of M14 connects the drain electrode of M15, and be connected to M16 drain electrode, M17 source electrode and produce and the output of gating circuit as outside hysteresis voltage; The source electrode of M15 and the drain electrode of M17 connect the first via reference voltage of bias-voltage generating circuit output, and the grid of M15 and the grid of M16 connect feedback control signal and produce the first feedback signal of the generation of circuit.

Further, described inner hysteresis comparator, comprises three pairs of current mirrors, offset generating circuit, Foldable cascade input stage circuit, inner sluggish intergrade circuit and a PMOS pipe output-stage circuit for common-source stage;

Wherein, first pair of current mirror comprises NMOS pipe M220, M221, M222, M223 and M224; Second pair of current mirror comprises PMOS pipe M230, M231, M232; The 3rd pair of current mirror comprises NMOS pipe M242 and M246; Offset generating circuit is managed M235, M236 by NMOS; Foldable cascade input stage circuit comprises PMOS pipe M233, M234; Inner sluggish intergrade circuit comprises that NMOS pipe M237, M238 and PMOS manage M239, M240, M241, M243, M244, M245; The PMOS pipe output-stage circuit of common source comprises PMOS pipe M247;

Concrete annexation is as follows:

The grid leak short circuit of M220 is as the bias current end of described inner hysteresis comparator, and the source ground of M221-M224; The drain electrode of M221 connects the drain electrode of M230, and grid connects the grid of M220, source ground; The drain electrode of M222 connects the source electrode of M237, and grid connects the grid of M220, source ground; The drain electrode of M223 connects the source electrode of M238, and grid connects the grid of M220, source ground; The drain electrode of M224 connects the drain electrode of M247, and grid connects the grid of M220, source ground;

The grid leak short circuit of M230, and be connected to the drain electrode of grid and the M221 of M231, M232, source electrode connects outer power voltage; The drain electrode of M231 connects the source electrode of M233, the source electrode of M234, and grid connects the grid of M230, and source electrode connects outer power voltage; The drain electrode of M232 connects grid and the drain electrode of M235, and grid connects the grid of M230, and source electrode connects outer power voltage;

The grid leak short circuit of M242, and be connected to M241 drain electrode, source ground; The drain electrode of M246 connects M245 drain electrode, and grid connects the grid of M242, source ground;

The grid leak short circuit of M235, and connect the drain electrode of M232 and the grid of M236, source electrode connects the drain electrode of M236; The drain electrode of M236 connects the source electrode of M235, and grid connects the grid of M235, source ground;

The source electrode of M233 connects the drain electrode of M231, and grid is as the negative input of inner hysteresis comparator, and drain electrode connects the leakage of M223, and substrate connects the drain electrode of M231; The source electrode of M234 connects the leakage of M231, and grid is as the positive input of inner hysteresis comparator, and drain electrode connects the drain electrode of M222, and substrate connects the drain electrode of M231;

The drain electrode of M237 connects the drain electrode of M239 and M244, together with the grid of grid and M238 connects, and is connected to the drain electrode of M235, and source electrode connects the drain electrode of M234; The drain electrode of M238 connects the drain electrode of M240 and M243, together with the grid of grid and M237 connects, and connects the drain electrode of M235, and source electrode connects the drain electrode of M233; The drain-gate short circuit of M239, and be connected to the drain electrode of M237 and the grid of M240, M241, source electrode connects outer power voltage; The drain electrode of M240 connects the drain electrode of M238, and grid connects the grid of M239, and source electrode connects outer power voltage; The drain electrode of M241 connects the drain electrode of M242, and grid connects the grid of M239, and source electrode connects outer power voltage; The drain-gate short circuit of M243, and be connected to the grid of the leakage of M238 and the grid of M244, M245, source electrode connects outer power voltage; The drain electrode of M244 connects the drain electrode of M237, and grid connects the grid of M243, and source electrode connects outer power voltage; The drain electrode of M245 connects the drain electrode of M246 and the grid of PMOS pipe M247, and grid connects the grid of M243, and source electrode connects outer power voltage;

The grid of M247 connects the drain electrode of M245, and source electrode connects outer power voltage, and drain electrode is as the output of described inner hysteresis comparator.

Beneficial effect of the present invention: RC oscillator of the present invention adopts inside and outside hysteresis comparator, reference current and reference voltage is all changed with the variation of outer power voltage, thereby overcome the impact of supply voltage on output frequency; Meanwhile, adopt the resistance of different temperature coefficients to make reference current not be subject to the impact of temperature; And a comparator of total employing, overcome the impact of the temperature that in dual comparator, input offset voltage brings on output frequency, and adopted outer meeting resistance regulating frequency scope, be especially applicable to the driving of EL lamp, regulating frequency changes the color of lamp.

Brief description of the drawings

Fig. 1 is the structural representation of the high accuracy RC oscillator of existing employing dual comparator.

Fig. 2 is RC oscillator structure schematic diagram of the present invention.

Fig. 3 is embodiment of the present invention bias-voltage generating circuit structural representation.

Fig. 4 is a kind of concrete structure schematic diagram of RC oscillator of the present invention, wherein: 101, charging and discharging currents produces circuit; 102, charge-discharge circuit; 103, outside hysteresis voltage produces and gating circuit; 104, feedback control signal produces circuit.

Fig. 5 is the structural representation of the inner hysteresis comparator of the embodiment of the present invention.

Embodiment

The present invention is described in further detail with specific embodiment with reference to the accompanying drawings below.

RC oscillator structure schematic diagram of the present invention as shown in Figure 2, comprise:, charging and discharging currents produces that circuit 101, charge-discharge circuit 102, outside hysteresis voltage produce and gating circuit 103, inner hysteresis comparator A2, feedback control signal produce circuit 104 and bias-voltage generating circuit 105, wherein, bias-voltage generating circuit 105 is for generation of three tunnel reference voltage V _ref1, V _ref2and V _ref3, charging and discharging currents produces circuit for generation of being input to the electric current of charge-discharge circuit and the bias current I of inner hysteresis comparator _ref, under the control of the first feedback signal a1 that charge-discharge circuit produces at feedback control signal generation circuit, export the negative input of triangular signal to inner hysteresis comparator; Outside hysteresis voltage produces and gating circuit produces under the first feedback signal a1 of circuit generation and the control of the second feedback signal a2 the first via reference voltage V of input in feedback control signal _ref1with the second tunnel reference voltage V _ref2be gated for first via reference voltage V _ref1or the second tunnel reference voltage V _ref2be connected to the positive input of inner hysteresis comparator, the input that the output of inner hysteresis comparator and feedback control signal produce circuit is connected and as the output end vo ut of described RC oscillator.

Fig. 3 has provided a kind of way of realization of bias-voltage generating circuit 105, obtains reference voltage V by resistance R 1, R2, R3 and R4 dividing potential drop _ref1, V _ref2and V _ref3, wherein, the positive termination VDD of R1, negative terminal meets V _ref3; The positive termination V of R2 _ref3, negative terminal meets V _ref2; The positive termination V of R5 _ref2, negative terminal meets V _ref1; The positive termination V of R6 _ref1, negativing ending grounding; This circuit also comprises two electric capacity, is respectively C11 and C12, and C11 positive pole meets V _ref1, minus earth; C12 positive pole meets V _ref2, minus earth; The effect of two electric capacity is realize reference voltage stable.V _ref1and V _ref2receive the positive input terminal of inner hysteresis comparator by transmission gate, and V _ref2the operational amplifier producing in circuit for charging and discharging currents provides positive input voltage, V _ref3for charge-discharge circuit provides bias voltage.The temperature characterisitic of above-mentioned divider resistance is consistent, overcome reference voltage and be subject to the impact of temperature.Said reference voltage can be produced by other similar scheme, and basic theories is to produce not temperature influence and with the linear reference voltage of supply voltage, in the present embodiment, C11=C12, supposes that produced reference voltage is: V _ref1=k1*VDD, V _ref2=k2*VDD, V _ref3=k3*VDD, wherein k1<k2<k3<1.

Charging and discharging currents produces circuit, as shown in 101 in Fig. 4, comprises resistance R 5 and R6, operational amplifier A 1 and PMOS pipe M0 that temperature coefficient is contrary, and generation reference current is I _ref, for circuit provides charging and discharging currents.The resistance R 5 here can be outer meeting resistance, and resistance R 6 can be integrated resistor on sheet.Wherein, the first termination VDD of R5, the first end of the second termination R6, the second termination operational amplifier of R6 and PMOS pipe M0, generation reference current is I _ref, for circuit provides charging and discharging currents.

Above-mentioned charging and discharging currents produces circuit and also can realize with other similar methods or circuit, and basic theories is to produce not temperature influence and and the linear reference current of supply voltage VDD.Circuit produce reference current as the formula (1), wherein, V _ref2=k2*VDD, and temperature influence not, R5 is contrary with R6 temperature coefficient, and R5 is polycrystalline resistor, and R6 is diffusion resistance, and the temperature coefficient of the two is contrary, and rationally parameters can obtain the reference current I of zero-temperature coefficient _ref.

$I_{\mathrm{ref}}=\frac{\mathrm{VDD}-V_{\mathrm{ref}2}}{R5+R6}=\frac{(1-k2)\mathrm{VDD}}{(R5+R6)}---\left(1\right)$

Charge-discharge circuit, as shown in 102 of Fig. 4, comprises two pairs of current mirrors, setover metal-oxide-semiconductor and a charge and discharge capacitance C0, and wherein first pair of current mirror is made up of NMOS pipe M5-M9.M6 and M8 are the mirror image precision in order to improve current mirror, and the source electrode of M6 connects the leakage of M5, and grid connects outside enable signal EN, source ground; The source electrode of M8 connects the leakage of M7, and grid meets outside enable signal EN, source ground, and above-mentioned enable signal has improved the performance of circuit, and when circuit is normally worked, its value is VDD; Above-mentioned M5 grid leak short circuit, and connect the drain electrode of PMOS pipe and the grid of M7 and M9 in charging and discharging currents generation circuit 101, the source electrode of M5 connects the leakage of M6; Above-mentioned M7 tube grid connects the grid of M5, and drain electrode connects the source electrode of biasing NMOS pipe M11, and source electrode connects the drain electrode of M8; Above-mentioned M9 tube grid connects the grid of M5, and drain electrode connects another to the PMOS pipe drain electrode of M13 and the negative-phase input of inner hysteresis comparator in current mirror, and source electrode connects the output of feedback control signal generation circuit.Above-mentioned second pair of current mirror is made up of PMOS pipe M12 and M13, M12 grid leak short circuit, and connect the drain electrode of offset M11 and the grid of M13, source electrode meets VDD; The grid of M13 connects the grid of M12, and drain electrode connects the negative-phase input of inner hysteresis comparator, and source electrode meets VDD; The grid of above-mentioned offset M11 meets V _ref3, drain electrode connects the leakage of M12, and source electrode connects the leakage of M7; Above-mentioned charge and discharge capacitance C0 positive pole connects the negative-phase input of inner hysteresis comparator, minus earth.The electric current of the above-mentioned M5 of flowing through is I _ref, the charge-discharge circuit here can be realized by other analogous circuit.

In the present embodiment, establish mirror and be: I _m7=n1*I _ref, I _m9=n2*I _ref, I _m13=m*I _m7=n3*I _ref, wherein, n3<n2.If the voltage on charge and discharge capacitance C0 is VC0, the upper trigging signal of inside and outside hysteresis comparator is VH, and the lower trigging signal of inside and outside hysteresis comparator is VL.In the time of VC0<VH, electric capacity is with I _m13the current charges of size, VC0 raises; In the time of VC0>VH, electric capacity is with (I _m9-I _m13) big or small current discharge, VC0 reduces; In the time of VC0<VL, electric capacity is again with I _m13the electric current of size starts charging, so repeatedly, thus the frequency of definite oscillator.The charging interval T of circuit _cwith T discharge time _das follows respectively:

$T_c=\frac{C0*(\mathrm{VH}-\mathrm{VL})}{I_{M13}}---\left(2\right)$

$T_d=\frac{C0*(\mathrm{VH}-\mathrm{VL})}{I_{M9}-I_{M13}}---\left(3\right)$

Thereby be T the cycle of oscillation that obtains circuit _c+ T _d.

$T=T_d+T_c=\frac{C0*(\mathrm{VH}-\mathrm{VL})}{I_{m9}-I_{M13}}+\frac{C0*(\mathrm{VH}-\mathrm{VL})}{I_{M13}}=[\frac{1}{(n2-n3)}+\frac{1}{n3}]\frac{C0*(\mathrm{VH}-\mathrm{VL})}{I_{\mathrm{ref}}}---\left(4\right)$

Outside hysteresis voltage produces and gating circuit can be realized by transmission gate, as shown in 103 of Fig. 4, comprises NMOS pipe M14-M15 and PMOS pipe M16-M17, and wherein, the drain electrode of M14 meets V _ref2, grid meets the control signal a2 of feedback generation, and source electrode connects the leakage of M15, and is connected to drain electrode, the source electrode of M17 and the normal phase input end of inner hysteresis comparator of M16; The drain electrode of M15 connects the source of M14, and grid meets the control signal a1 of feedback generation, and source electrode meets V _ref1; The source electrode of M16 meets V _ref2, grid meets the control signal a1 of feedback generation, and drain electrode connects the source of M17 and the normal phase input end of inner hysteresis comparator; The source electrode of M17 connects the leakage of M16, and grid meets the control signal a2 of feedback generation, and drain electrode meets V _ref1.Outside hysteresis voltage produces and gating circuit also can be realized by other similar scheme.

When hysteresis comparator is output as 0, when the negative terminal voltage of hysteresis comparator is higher than positive terminal voltage, a1=1, a2=0, M15 and M17 conducting in transmission gate, the normal phase input end voltage of hysteresis comparator is V _ref1=k1*VDD, it is VL that outside sluggish lower trigging signal is set ^-=V _ref1=k1*VDD; When hysteresis comparator is output as 1, when the negative terminal voltage of hysteresis comparator is lower than positive terminal voltage, a1=0, a2=1, M14 and M16 conducting in transmission gate, the normal phase input end voltage of hysteresis comparator is V _ref2=k2*VDD, it is VH that outside sluggish upper trigging signal is set ⁺=V _ref2=k2*VDD.

Feedback control signal produces circuit, as shown in 104 of Fig. 4, comprise two inverter NOR1, NOR2, the input of inverter NOR1 connects the output of inner hysteresis comparator A2, the output signal a1 that the output of inverter NOR1 meets the input inverter NOR1 of inverter NOR2 controls the gating of outside hysteresis voltage, be connected to that outside hysteresis voltage produces and gating circuit in the grid of M15-M16; The output signal a2 of inverter NOR2 controls the gating of outside hysteresis voltage, be connected to that outside hysteresis voltage produces and gating circuit in the grid of M14 and M17.

When hysteresis comparator is output as 0, when the negative terminal voltage of hysteresis comparator is higher than positive terminal voltage, i.e. a1=1, M10 conducting, electric capacity is with (I _m9-I _m13) big or small current discharge; When hysteresis comparator is output as 1, when the negative terminal voltage of hysteresis comparator is lower than positive terminal voltage, i.e. a1=0, M10 cut-off, electric capacity is with I _m13the current charges of size.

Described inner hysteresis comparator, as shown in the A2 in Fig. 4, its physical circuit is shown in Fig. 5, comprises three pairs of current mirrors, offset generating circuit, Foldable cascade input stage circuit, inner sluggish intergrade circuit and a PMOS pipe output-stage circuit for common-source stage.The substrate of above-mentioned PMOS pipe and NMOS pipe, as do not provide connection, the substrate of PMOS pipe meets VDD, the substrate ground connection of NMOS pipe.

The grounded-grid of M234, when the grid of M233 is much larger than zero time, M234 conducting, M233 cut-off, establishing the electric current that flows through M237 is I _m237, the electric current that flows through M239 equals to flow through the electric current I of M237 _m237, M240 mirror image flows through the electric current of M239, and establishing mirror image ratio is K, and the electric current that flows through M240 is K I _m237, meanwhile, due to M240 conducting, the grid voltage of M243 is arrived than the low overdrive voltage of supply voltage by too high, therefore M243 and M244 cut-off, the branch current that flows through M238 also just equals to flow through the electric current of M240.Now, comparator is output as low level, and along with the grid voltage of M233 constantly reduces to turnover voltage, M233 starts current flowing, and this phenomenon is continued until more like this, and the electric current that flows through M233 equals I _m223-K I _m237.In the time exceeding this point, the state of comparator changes, and establishing the electric current that now flows through M233 and M234 is I1 ^-and I2 ^-, the lower trigging signal that draws inner hysteresis comparator is V _tRP ^-:

V _TRP ^-=|V _GS(M234)|-|V _GS(M233)| (5)

In like manner, the upper trigging signal of inner hysteresis comparator is V _tRP ⁺:

V _TRP ⁺=|V _GS(M234)|-|V _GS(M233)| (6)

The electric current that now flows through M233 and M234 is I1 ⁺and I2 ⁺.

To sum up, after inside and outside sluggishness, the trigging signal of circuit is respectively:

VH=VH ⁺+V _TRP ⁺=V _ref2+V _TRP ⁺=k2*VDD+V _TRP ⁺ （7）

VL=VL ^-+V _TRP ^-=V _ref1+V _TRP ^-=k1*VDD+V _TRP ^- （8）

The present embodiment, I1 ⁺=I2 ⁺, I1 ^-=I2 ^-, the parameter of M233 and M234 is identical, | V _{gS (M233)}|=| V _{gS (M234)}|, thereby obtain:

VH=V _ref2=k2*VDD （9）

VL=V _ref1=k1*VDD (10)

RC oscillator shown in the embodiment of the present invention, specific works process is as follows:

1) positive input of inner hysteresis comparator is received in the output of transmission gate, charging capacitor is connected between the negative input and ground of inner hysteresis comparator, the output of inner hysteresis comparator produces control signal through two-stage inverter, control the unlatching of transmission gate, make the voltage of positive input of hysteresis comparator at V _ref1and V _ref2middle selection.

2) trigging signal of the outside hysteresis comparator producing is respectively VH ⁺=V _ref2=k2*VDD and VL ^-=V _ref1=k1*VDD.

3) V _ref2connect the positive input of operational amplifier, the reference current I of generation _reffor:

$I_{\mathrm{ref}}=\frac{\mathrm{VDD}-V_{\mathrm{ref}2}}{R5+R6}=\frac{(1-k2)\mathrm{VDD}}{(R5+R6)}---\left(11\right)$

Current mirror is by I _refbe mirrored to M9 and M13, establish mirror and be: I _m7=n1*I _ref, I _m9=n2*I _ref, I _m13=m*I _m7=n3*I _ref, wherein, n3<n2.

4) when circuit powers on, VC0=0, inner hysteresis comparator is output as 1, a1=0, M10 cut-off, capacitor charging, a2=1, M14 and M16 conducting in transmission gate, the voltage of the normal phase input end of hysteresis comparator is V _ref1=k1*VDD, now, C0 is with I _m13size of current charging, and the lower turnover voltage of inner hysteresis comparator setting is V _tRP-=| V _{gS (M234)}|-| V _{gS (M233)}|, the electric current that now flows through M233 and M234 is I1 ^-and I2 ^-, the parameter of M233 and M234 arranges identical, I1 ^-=I2 ^-.So upper trigging signal VH=V of whole hysteresis comparator _ref2=k2*VDD.

5) when VC0 is charged to VH=V _ref2when=k2*VDD, inner hysteresis comparator is output as 0, a1=1, M10 conducting, and capacitor C 0 is with (I _m9-I _m13) size of current electric discharge, and a2=0, M15 and M17 conducting in transmission gate, the normal phase input end voltage of hysteresis comparator is V _ref1=k1*VDD, now, the upper turnover voltage that inner hysteresis comparator is set is V _tRP ⁺=| V _{gS (M234)}|-| V _{gS (M233)}|, the electric current that now flows through M233 and M234 is I1 ⁺and I2 ⁺, and in this design the parameter of M233 and M234 arrange identical, I1 ⁺=I2 ⁺.So lower trigging signal VL=V of whole hysteresis comparator _ref1=k1*VDD.

6) when VC0 discharges into VL=V _ref1when=k1*VDD, inner hysteresis comparator is output as 1, a1=0, M10 cut-off, and capacitor charging, and a2=1, M14 and M16 conducting in transmission gate, the normal phase input end voltage of hysteresis comparator is V _ref2=k2*VDD, now, C0 is again with I _m13current charges is to upper trigging signal VH=V _ref2=k2*VDD.Thereby obtain the square wave that be T cycle of oscillation.

$T=T_d+T_c=[\frac{1}{(n2-n3)}+\frac{1}{n3}]\frac{C0*(\mathrm{VH}-\mathrm{VL})}{I_{\mathrm{ref}}}=[\frac{1}{(n2-n3)}+\frac{1}{n3}]\frac{(k2-k1)*C0*(R5+R6)}{1-k2}---\left(12\right)$

Can draw from above formula, the frequency of oscillation of this oscillator is only relevant with R2 with the charge and discharge capacitance C0 R1 contrary with temperature coefficient, and based on the following fact: 1) temperature coefficient of the resistance in integrated circuit is very large, can not be ignored, and adopt contrary polycrystalline resistor and the diffusion resistance of temperature coefficient to combine by a certain percentage the reference current that can obtain zero-temperature coefficient; 2) there is not the impact on output frequency of temperature that input offset voltage brings in same comparator; C) suitably regulate non-essential resistance, change charging and discharging currents value, thereby change output frequency, be especially applicable to the driving of EL lamp, regulating frequency can change the color of lamp.

The present invention has eliminated the factor that affects frequency of oscillation precision in conventional design, be T the cycle of oscillation of oscillator, as the formula (12), thus frequency of oscillation f=1/T, wherein, R5 is outer meeting resistance, facilitate regulation output frequency, be especially applicable to the driving of EL lamp, regulating frequency changes the color of lamp, both resistances of Rational choice, can obtain substantially the not frequency of oscillation of temperature influence; Can also draw from expression formula, output frequency is not subject to the impact of supply voltage; Last circuit replaces dual comparator design with inside and outside hysteresis comparator, has overcome the impact of the different temperature of bringing of dual comparator input offset voltage, has obtained the adjustable RC oscillator of high-precision frequency.

Those of ordinary skill in the art will appreciate that, embodiment described here is in order to help reader understanding's principle of the present invention, should be understood to that protection scope of the present invention is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not depart from essence of the present invention according to these technology enlightenments disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.

Claims (6)

1. a RC oscillator, comprising: bias-voltage generating circuit, charging and discharging currents produce circuit, charge-discharge circuit, outside hysteresis voltage generation and gating circuit, inner hysteresis comparator and feedback control signal and produce circuit, wherein,

Described bias-voltage generating circuit is for generation of three road reference voltages, charging and discharging currents produces circuit for generation of being input to the electric current of charge-discharge circuit and the bias current of inner hysteresis comparator, under the control of the first feedback signal that charge-discharge circuit produces at feedback control signal generation circuit, exports the negative input of triangular signal to inner hysteresis comparator; Outside hysteresis voltage produces and gating circuit produces under the control of the first feedback signal that circuit produces and the second feedback signal the positive input that the first via reference voltage of input and the second road reference voltage is gated for to first via reference voltage or the second road reference voltage and is connected to inner hysteresis comparator in feedback control signal, and the output of inner hysteresis comparator is connected with the input of feedback control signal generation circuit and as the output of described RC oscillator;

Described charging and discharging currents produces circuit and comprises: resistance R 5 and R6 that temperature coefficient is contrary, the first operational amplifier and PMOS pipe M0, wherein, the supply voltage of the first termination outside of resistance R 5, the first end of the second terminating resistor R6 of resistance R 5, the source electrode of the negative input of second termination the first operational amplifier of resistance R 6 and PMOS pipe M0, the positive input of operational amplifier connects the second road reference voltage of bias-voltage generating circuit output, the output of operational amplifier connects the grid of PMOS pipe M0, the drain electrode of PMOS pipe M0 produces the output of circuit as described charging and discharging currents.

2. RC oscillator according to claim 1, it is characterized in that, described bias-voltage generating circuit, comprise resistance R 1, R2, R3 and R4, capacitor C 11 and C12, wherein, the supply voltage of the first termination outside of resistance R 1, the second end of resistance R 1 is connected with the first end of resistance R 2, the second end of resistance R 2 is connected with the first end of resistance R 3, the second end of resistance R 3 is connected with the first end of resistance R 4, the second end ground connection of resistance R 4, the second end of resistance R 3 is by capacitor C 11 ground connection and export first via reference voltage, the second end of resistance R 2 is by capacitor C 12 ground connection and export the second road reference voltage, the second end output Third Road reference voltage of resistance R 1.

3. RC oscillator according to claim 1, it is characterized in that, described charge-discharge circuit comprises NMOS pipe M5, M6, M7, M8, M9, M10, M11, PMOS pipe M12, M13 and charge and discharge capacitance C0, wherein, the drain electrode of NMOS pipe M6 connects the source electrode of NMOS pipe M5, and grid connects outside enable signal, source ground; The drain electrode of M8 connects the source electrode of M7, and grid connects outside enable signal, source ground, and M5 grid leak short circuit is as the input of described charge-discharge circuit; M7 tube grid connects the grid of M5, and drain electrode connects the source electrode of NMOS pipe M11, and source electrode connects the drain electrode of M8; M9 tube grid connects the grid of M5, and drain electrode connects the drain electrode of PMOS pipe M13 the output as described charge-discharge circuit, and source electrode connects the drain electrode of M10, M12 grid leak short circuit, and connect the drain electrode of M11 and the grid of M13, source electrode connects outer power voltage; The grid of M13 connects the grid of M12, and drain electrode is as the output of charge-discharge circuit, and source electrode connects outer power voltage; The grid of M11 connects the Third Road reference voltage of bias-voltage generating circuit output, and drain electrode connects the leakage of M12, and source electrode connects the drain electrode of M7; The drain electrode of charge and discharge capacitance C0 mono-termination M13, other end ground connection; The grid of M10 produces for receiving feedback control signal the first feedback signal that circuit produces as the FEEDBACK CONTROL end of described charge-discharge circuit, and the drain electrode of M10 connects the source electrode of M9, the source ground of M10.

4. RC oscillator according to claim 1, it is characterized in that, described feedback control signal produces circuit, comprise: the first inverter and the second inverter, wherein, the input of the first inverter produces the input of circuit as described feedback control signal, the output of the first inverter is connected with the input of the second inverter, the output of the first inverter is exported the first feedback signal of described feedback control signal generation circuit, and the output of the second inverter is exported the second feedback signal of described feedback control signal generation circuit.

5. RC oscillator according to claim 1, it is characterized in that, described outside hysteresis voltage produces and gating circuit comprises NMOS pipe M14, M15 and PMOS pipe M16, M17, wherein, the drain electrode of M14 and the source electrode of M16 connect the second road reference voltage of bias-voltage generating circuit output, the grid of M14 and the grid of M17 connect feedback control signal and produce the second feedback signal of the generation of circuit, the source electrode of M14 connects the drain electrode of M15, and be connected to M16 drain electrode, M17 source electrode and produce and the output of gating circuit as outside hysteresis voltage; The source electrode of M15 and the drain electrode of M17 connect the first via reference voltage of bias-voltage generating circuit output, and the grid of M15 and the grid of M16 connect feedback control signal and produce the first feedback signal of the generation of circuit.

6. RC oscillator according to claim 1, it is characterized in that, described inner hysteresis comparator, comprises three pairs of current mirrors, offset generating circuit, Foldable cascade input stage circuit, inner sluggish intergrade circuit and a PMOS pipe output-stage circuit for common-source stage;

Wherein, first pair of current mirror comprises NMOS pipe M220, M221, M222, M223 and M224; Second pair of current mirror comprises PMOS pipe M230, M231, M232; The 3rd pair of current mirror comprises NMOS pipe M242 and M246; Offset generating circuit is managed M235, M236 by NMOS; Foldable cascade input stage circuit comprises PMOS pipe M233, M234; Inner sluggish intergrade circuit comprises that NMOS pipe M237, M238 and PMOS manage M239, M240, M241, M243, M244, M245; The PMOS pipe output-stage circuit of common-source stage comprises PMOS pipe M247;

Concrete annexation is as follows:

The grid leak short circuit of M220 is as the bias current end of described inner hysteresis comparator, and the source ground of M221-M224; The drain electrode of M221 connects the drain electrode of M230, and grid connects the grid of M220, source ground; The drain electrode of M222 connects the source electrode of M237, and grid connects the grid of M220, source ground; The drain electrode of M223 connects the source electrode of M238, and grid connects the grid of M220, source ground; The drain electrode of M224 connects the drain electrode of M247, and grid connects the grid of M220, source ground;

The grid leak short circuit of M230, and be connected to the drain electrode of grid and the M221 of M231, M232, source electrode connects outer power voltage; The drain electrode of M231 connects the source electrode of M233, the source electrode of M234, and grid connects the grid of M230, and source electrode connects outer power voltage; The drain electrode of M232 connects grid and the drain electrode of M235, and grid connects the grid of M230, and source electrode connects outer power voltage;

The grid leak short circuit of M242, and be connected to M241 drain electrode, source ground; The drain electrode of M246 connects M245 drain electrode, and grid connects the grid of M242, source ground;

The grid leak short circuit of M235, and connect the drain electrode of M232 and the grid of M236, source electrode connects the drain electrode of M236; The drain electrode of M236 connects the source electrode of M235, and grid connects the grid of M235, source ground;

The source electrode of M233 connects the drain electrode of M231, and grid is as the negative input of inner hysteresis comparator, and drain electrode connects the leakage of M223, and substrate connects the drain electrode of M231; The source electrode of M234 connects the leakage of M231, and grid is as the positive input of inner hysteresis comparator, and drain electrode connects the drain electrode of M222, and substrate connects the drain electrode of M231;

The drain electrode of M237 connects the drain electrode of M239 and M244, together with the grid of grid and M238 connects, and is connected to the drain electrode of M235, and source electrode connects the drain electrode of M234; The drain electrode of M238 connects the drain electrode of M240 and M243, together with the grid of grid and M237 connects, and connects the drain electrode of M235, and source electrode connects the drain electrode of M233; The drain-gate short circuit of M239, and be connected to the drain electrode of M237 and the grid of M240, M241, source electrode connects outer power voltage; The drain electrode of M240 connects the drain electrode of M238, and grid connects the grid of M239, and source electrode connects outer power voltage; The drain electrode of M241 connects the drain electrode of M242, and grid connects the grid of M239, and source electrode connects outer power voltage; The drain-gate short circuit of M243, and be connected to the grid of the leakage of M238 and the grid of M244, M245, source electrode connects outer power voltage; The drain electrode of M244 connects the drain electrode of M237, and grid connects the grid of M243, and source electrode connects outer power voltage; The drain electrode of M245 connects the drain electrode of M246 and the grid of PMOS pipe M247, and grid connects the grid of M243, and source electrode connects outer power voltage;

The grid of M247 connects the drain electrode of M245, and source electrode connects outer power voltage, and drain electrode is as the output of described inner hysteresis comparator.