CN102779859A - Adjustable capacitor - Google Patents
Adjustable capacitor Download PDFInfo
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- CN102779859A CN102779859A CN2011101228384A CN201110122838A CN102779859A CN 102779859 A CN102779859 A CN 102779859A CN 2011101228384 A CN2011101228384 A CN 2011101228384A CN 201110122838 A CN201110122838 A CN 201110122838A CN 102779859 A CN102779859 A CN 102779859A
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Abstract
The invention provides an adjustable capacitor required to be used for LC or RC matched network circuit of a micro circuit, and the goal is reached through forming a group of independent capacitors. The capacitors share one lower electrode in common use, and an upper electrode region of the capacitor is characterized in that an integration ratio is mutually selected so that any capacitors in the unit value range can be generated. For example, when four capacitors with the region ratio being 5:2:1:1, any capacitors with the range from 1 to 9 can be generated after the electrodes are connected. The connection in such a type can be a hard circuit in the last circuit layer, a factory adjustable capacitor can be provided, or the capacitors can be connected with and penetrated through field programmable elements to generate a field programmable capacitor.
Description
Technical field
The present invention relates to a kind of capacitor, especially a kind of adjustable capacitor.
Background technology
The present invention provides a kind of LC or RC for microcircuit networking that matches need use the adjustable capacitor; It is to obtain this purpose by forming one group other capacitor; This capacitor is shared one shared bottom electrode; The polar region that powers on of those capacitors is mutual selection one integration ratio, so that they can produce any electric capacity in the cell value scope.For example, if provide those districts than being 5: 2: 1: during four capacitors of 1, how to connect according to top electrode and then can produce any electric capacity from scope 1 to 9.This type of connection can be the rigid line road in the line layer in the end, passes a programmed element to provide factory's adjustable capacitor or them to connect, to produce a field programmed capacitor.
Summary of the invention
To the problems referred to above, the present invention provides a kind of adjustable capacitor.
The present invention provides a kind of LC or RC for microcircuit networking that matches need use the adjustable capacitor; It is to obtain this purpose by forming one group other capacitor; This capacitor is shared one shared bottom electrode; The polar region that powers on of those capacitors is mutual selection one integration ratio, so that they can produce any electric capacity in the cell value scope.For example, if provide those districts than being 5: 2: 1: during four capacitors of 1, how to connect according to top electrode and then can produce any electric capacity from scope 1 to 9.This type of connection can be the rigid line road in the line layer in the end, passes a programmed element to provide factory's adjustable capacitor or them to connect, to produce a field programmed capacitor.
Embodiment
The present invention provides a kind of LC or RC for microcircuit networking that matches need use the adjustable capacitor; It is to obtain this purpose by forming one group other capacitor; This capacitor is shared one shared bottom electrode; The polar region that powers on of those capacitors is mutual selection one integration ratio, so that they can produce any electric capacity in the cell value scope.For example, if provide those districts than being 5: 2: 1: during four capacitors of 1, how to connect according to top electrode and then can produce any electric capacity from scope 1 to 9.This type of connection can be the rigid line road in the line layer in the end, passes a programmed element to provide factory's adjustable capacitor or them to connect, to produce a field programmed capacitor.
A kind of processing procedure of formation one adjustable capacitor includes: a silicium wafer is provided, and it has the superiors on it, and it is connected to the circuit in this wafer for contact mat; The long-pending base portion dielectric layer in Shen is in these the superiors, and it includes this contact mat; The long-pending etching barrier layer in Shen is on this base portion dielectric layer; Shen Jiyi supports dielectric layer on this etching barrier layer; Etching one through hole passes on this support dielectric layer, this etching barrier layer and this base portion dielectric layer, uses to expose this contact mat; The long-pending barrier layer in Shen is excessively filled tungsten with this through hole then in this through hole, and planarization then, so that remove all not tungsten in this through hole; Etching three grooves, it is to extend through this support dielectric layer up to this etching barrier layer; The long-pending ground floor metal in Shen supports on dielectric layer in this, and it is to include in this groove, and this ground floor metal of patterning then, and to form a shared electrode for capacitors, it is the through hole of this filling tungsten of contact; The long-pending one deck high dielectric constant material in Shen is on this shared electrode for capacitors, and this high dielectric constant layer of patterning then, uses this and fully covers this shared electrode for capacitors of envelope; The long-pending second layer metal in Shen is in this high dielectric constant layer, and this second layer metal of patterning then, and to form four top electrodes that do not connect, those are fold envelope by this electrode, and the regional ratio of this electrode (relative to each other) is 5: 2: 1: 1; The long-pending upper dielectric layer in Shen is on this top electrode and this high dielectric constant layer; Etching four through holes pass this upper dielectric layer, use a contact zone that exposes each this top electrode; The long-pending barrier layer in Shen is excessively filled this through hole with tungsten then in this through hole, planarization then so that remove all not in this through hole tungsten; And amass and patterning 1 the 3rd metal level in Shen then, is fixedly coupled so that between this top electrode, provide, and uses that this adjustable capacitor is produced a certain capacitance.
Claims (1)
1. processing procedure that forms an adjustable capacitor, include: a silicium wafer is provided, and it has the superiors on it, and it is connected to the circuit in this wafer for contact mat; The long-pending base portion dielectric layer in Shen is in these the superiors, and it includes this contact mat; The long-pending etching barrier layer in Shen is on this base portion dielectric layer; Shen Jiyi supports dielectric layer on this etching barrier layer; Etching one through hole passes on this support dielectric layer, this etching barrier layer and this base portion dielectric layer, uses to expose this contact mat; The long-pending barrier layer in Shen is excessively filled tungsten with this through hole then in this through hole, and planarization then, so that remove all not tungsten in this through hole; Etching three grooves, it is to extend through this support dielectric layer up to this etching barrier layer; The long-pending ground floor metal in Shen supports on dielectric layer in this, and it is to include in this groove, and this ground floor metal of patterning then, and to form a shared electrode for capacitors, it is the through hole of this filling tungsten of contact; The long-pending one deck high dielectric constant material in Shen is on this shared electrode for capacitors, and this high dielectric constant layer of patterning then, uses this and fully covers this shared electrode for capacitors of envelope; The long-pending second layer metal in Shen is in this high dielectric constant layer, and this second layer metal of patterning then, and to form four top electrodes that do not connect, those are fold envelope by this electrode, and the regional ratio of this electrode (relative to each other) is 5: 2: 1: 1; The long-pending upper dielectric layer in Shen is on this top electrode and this high dielectric constant layer; Etching four through holes pass this upper dielectric layer, use a contact zone that exposes each this top electrode; The long-pending barrier layer in Shen is excessively filled this through hole with tungsten then in this through hole, planarization then so that remove all not in this through hole tungsten; And amass and patterning 1 the 3rd metal level in Shen then, is fixedly coupled so that between this top electrode, provide, and uses that this adjustable capacitor is produced a certain capacitance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011101228384A CN102779859A (en) | 2011-05-13 | 2011-05-13 | Adjustable capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011101228384A CN102779859A (en) | 2011-05-13 | 2011-05-13 | Adjustable capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102779859A true CN102779859A (en) | 2012-11-14 |
Family
ID=47124714
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2011101228384A Pending CN102779859A (en) | 2011-05-13 | 2011-05-13 | Adjustable capacitor |
Country Status (1)
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CN (1) | CN102779859A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030201476A1 (en) * | 2002-04-25 | 2003-10-30 | Chartered Semiconductor Manufacturing Ltd. | Adjustable 3D capacitor |
-
2011
- 2011-05-13 CN CN2011101228384A patent/CN102779859A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030201476A1 (en) * | 2002-04-25 | 2003-10-30 | Chartered Semiconductor Manufacturing Ltd. | Adjustable 3D capacitor |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20121114 |