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CN102749777A - Array substrate of display panel and pixel unit - Google Patents

Array substrate of display panel and pixel unit Download PDF

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Publication number
CN102749777A
CN102749777A CN2012102279299A CN201210227929A CN102749777A CN 102749777 A CN102749777 A CN 102749777A CN 2012102279299 A CN2012102279299 A CN 2012102279299A CN 201210227929 A CN201210227929 A CN 201210227929A CN 102749777 A CN102749777 A CN 102749777A
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CN
China
Prior art keywords
pixel
row
switching element
time
active switching
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Granted
Application number
CN2012102279299A
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Chinese (zh)
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CN102749777B (en
Inventor
江佳伦
黄郁升
蔡孟汝
陈彦樵
陈一清
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AU Optronics Corp
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AU Optronics Corp
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Publication of CN102749777A publication Critical patent/CN102749777A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0443—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0435—Change or adaptation of the frame rate of the video stream

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

An array substrate and a pixel unit of a display panel comprise a plurality of sub-pixels which are arranged into a pixel array with N columns and M rows. In the pixel array, only one data line is arranged between a part of sub-pixels of two adjacent rows, and two data lines are arranged between the part of sub-pixels of two adjacent rows.

Description

The array base palte of display panel and pixel cell
Technical field
The present invention is about a kind of array base palte of display panel and pixel cell, refers to a kind of array base palte and pixel cell that has long duration of charging and low colour cast and can have the display panel of high picture update rate (frame rate) especially.
Background technology
Because flat-panel screens, for example LCD has compact characteristics, has replaced the cathode ray tube (CRT) display and becomes the main product of display.Yet; With the LCD is example; It is easy to generate colour cast (color washout) problem; The practice that convention solves the colour cast problem mainly is that the number with the data line of display panels increases to twice, yet this practice can make the cost of source driving chip increase, aperture opening ratio reduces and the pixel duration of charging is not enough.In addition; In order to pursue better display quality; Reached the specification of Full HD (1920*1080) in the market for the requirement of the resolution of LCD, and for the LCD of some application-specific, for example 3D LCD or in order to play the LCD of electronic game recreation; The specification of its picture update rate also must reach 120Hz, or even 240Hz.Under the situation that the number and the picture update rate of gate line and data line all increases, the cost that LCD will face source driving chip increases, aperture opening ratio reduces and problem such as pixel duration of charging deficiency.
Summary of the invention
One of the object of the invention is to provide a kind of array base palte and pixel cell of display panel, to increase pixel duration of charging and picture update rate, reduce the source driving chip cost and to solve the colour cast problem.
A preferred embodiment of the present invention provides a kind of array base palte of display panel, and it comprises a plurality of pixels, a plurality of active switching element, many first grid polar curves, many second grid lines, many first data lines, many second data lines, many articles the 3rd data lines and one the 4th data line.Inferior pixel is arranged in the capable pel array of a N row * M, and N and M are respectively a positive integer.Active switching element is arranged at respectively in each time pixel.P bar first grid polar curve is to be arranged between inferior pixel of 3n-2 row and the inferior pixel that 3n-1 is listed as; And p bar first grid polar curve be respectively with the active switching element electric connection of the inferior pixel of the part of the active switching element of inferior pixel of 3n-2 row and 3n-1 row; Wherein n is the set smaller or equal to the positive integer of N/3, and p equals n.P bar second grid line be inferior pixel that is arranged at 3n-1 row with inferior pixel of 3n row between, and p bar second grid line is active switching element and the active switching element electric connection of the inferior pixel that 3n is listed as of the inferior pixel of the part that is listed as with 3n-1 respectively.Q bar first data line is a side that is arranged at the capable inferior pixel of 2m-1, and wherein m is the set smaller or equal to the positive integer of M/2, and q equals m.When m=1, q bar first data line is that the active switching element with the inferior pixel of the capable part of 2m-1 electrically connects; When 1＜m ≦ M/2, q bar first data line is to electrically connect with the active switching element of the inferior pixel of the capable part of the active switching element of the inferior pixel of the capable part of 2m-2 and 2m-1 respectively.Q bar second data line is to be arranged between the capable inferior pixel of the capable inferior pixel of 2m-1 and 2m, and q bar second data line is that active switching element with the inferior pixel of the capable part of 2m-1 electrically connects.Q article of the 3rd data line is to be arranged between the capable inferior pixel of the capable inferior pixel of 2m-1 and 2m, and q article of the 3rd data line is that active switching element with the inferior pixel of the capable part of 2m electrically connects.The 4th data line is arranged at a side of the capable inferior pixel of M, and the 4th data line is that active switching element with the inferior pixel of the capable part of M electrically connects.
Another preferred embodiment of the present invention provides a kind of pixel cell of display panel, and it comprises, and six time pixels are arranged in that the array of one 3 row *, 2 row, six active switching element are arranged at respectively that each time pixel is interior, a first grid polar curve, a second grid line, one the 3rd data line, one first data line and one second data line.Between inferior pixel that first grid polar curve is arranged at the 1st row and inferior pixel of the 2nd row, and first grid polar curve is wherein one the active switching element electric connection of the inferior pixel that is listed as with the active switching element and the 2nd of the 1st inferior pixel that is listed as respectively.Between inferior pixel that the second grid line is arranged at the 2nd row and inferior pixel of the 3rd row, and the second grid line is the active switching element electric connection of the inferior pixel that is listed as with wherein another person's of the 2nd inferior pixel that is listed as active switching element and the 3rd respectively.The 3rd data line is arranged at the side of inferior pixel of the 1st row, and the 3rd data line be respectively with the active switching element electric connection of the inferior pixel of the part of the 1st row.Between inferior pixel that first data line is arranged at the 1st row and inferior pixel of the 2nd row, and first data line is the active switching element electric connection of the inferior pixel of the part of with the inferior pixel and the 2nd of the 1st part of going respectively.Second data line is arranged at the side of inferior pixel of the 2nd row, and second data line be respectively with the active switching element electric connection of the inferior pixel of the part of the 2nd row.
Description of drawings
Fig. 1 is the synoptic diagram of array base palte of the display panel of first preferred embodiment of the present invention.
Fig. 2 is the synoptic diagram of array base palte of the display panel of second preferred embodiment of the present invention.
Fig. 3 is the synoptic diagram of array base palte of the display panel of the 3rd preferred embodiment of the present invention.
Fig. 4 is the synoptic diagram of array base palte of the display panel of the 4th preferred embodiment of the present invention.
Fig. 5 is the synoptic diagram of array base palte of display panel of the alternate embodiment of first to fourth preferred embodiment of the present invention.
Description of reference numerals
12 pixels of the array base palte of 10 display panels
14 active switching element GL1 first grid polar curves
GL2 second grid line DL1 first data line
The DL2 second data line DL3 the 3rd data line
DL4 the 4th data line PU pixel cell
121 pixel 122 pixels for the second time for the first time
123 the 4th pixels of pixel 124 for the third time
First bright pixel of P pixel 121B
First dark second bright pixel of pixel 122B of 121D
Second dark the 3rd bright pixel of pixel 123B of 122D
The array base palte of the 3rd dark pixel 20 display panels of 123D
The array base palte of array base palte 40 display panels of 30 display panels
Array base palte+the positive polarity of 50 display panels
-negative polarity
Embodiment
For making those skilled in the art can further understand the present invention, the hereinafter spy enumerates preferred embodiment of the present invention, and cooperate appended graphic, specify constitution content of the present invention and the effect desiring to reach.
Please refer to Fig. 1.Fig. 1 is the synoptic diagram of array base palte of the display panel of first preferred embodiment of the present invention.As shown in Figure 1, the array base palte 10 of the display panel of present embodiment comprises a plurality of pixels 12, a plurality of active switching element 14, many first grid polar curve GL1, many second grid line GL2, many data lines (comprising many first data line DL1, many second data line DL2, many articles the 3rd data line DL3 and one article of the 4th data line DL4).Inferior pixel 12 is arranged in the capable pel array of a N row * M, and wherein N and M are respectively a positive integer.Fig. 1 is that the pel array of going with one 6 row * 6 is an example.Active switching element 14, for example the membrane transistor element is arranged at respectively in each time pixel 12.P bar first grid polar curve GL1 is arranged between inferior pixel 12 of 3n-2 row and the inferior pixel 12 that 3n-1 is listed as; And p bar first grid polar curve GL1 be respectively with inferior pixel 12 of 3n-2 row in active switching element 14 electric connections of inferior pixel 12 of part of active switching element 14 and 3n-1 row; Wherein n is the set smaller or equal to the positive integer of N/3, and p equals n.P bar second grid line GL2 be inferior pixel 12 that is arranged at 3n-1 row with inferior pixel 12 of 3n row between, and p bar second grid line GL2 is active switching element 14 and active switching element 14 electric connections of the inferior pixel 12 that 3n is listed as of the inferior pixel 12 of the part that is listed as with 3n-1 respectively.For example, the 1st first grid polar curve GL1 is arranged between the inferior pixel 12 that inferior pixel 12 and the 2nd of the 1st row is listed as; Article 2, first grid polar curve GL1 is arranged between the inferior pixel 12 that inferior pixel 12 and the 5th of the 4th row is listed as; Article 1, second grid line GL2 is arranged between the inferior pixel 12 that inferior pixel 12 and the 3rd of the 2nd row is listed as; Article 2, second grid line GL2 is arranged between the inferior pixel 12 that inferior pixel 12 and the 6th of the 5th row is listed as, by that analogy.In addition, the 1st first grid polar curve GL1 be respectively with active switching element 14 electric connections of the inferior pixel 12 of the part of the active switching element 14 of inferior pixel 12 of the 1st row and the 2nd row; Article 2, first grid polar curve GL1 be respectively with active switching element 14 electric connections of the inferior pixel 12 of the part of the active switching element 14 of inferior pixel 12 of the 4th row and the 5th row, by that analogy.Article 1, second grid line GL2 be respectively with active switching element 14 electric connections of the inferior pixel 12 of the active switching element 14 of inferior pixel 12 of the part of the 2nd row and the 3rd row; Article 2, second grid line GL2 be respectively with active switching element 14 electric connections of the inferior pixel 12 of the active switching element 14 of inferior pixel 12 of the part of the 5th row and the 6th row, by that analogy.
In addition, the q bar first data line DL1 is a side (left side among Fig. 1) that is arranged at the capable inferior pixel 12 of 2m-1, and wherein m is the set smaller or equal to the positive integer of M/2, and q equals m.When m=1, the q bar first data line DL1 is that the active switching element 14 with the inferior pixel 12 of the capable part of 2m-1 electrically connects; When 1＜m ≦ M/2, the q bar first data line DL1 electrically connects with the active switching element 14 of the inferior pixel 12 of the capable part of the active switching element 14 of the inferior pixel 12 of the capable part of 2m-2 and 2m-1 respectively.The q bar second data line DL2 is arranged between the capable inferior pixel 12 of the capable inferior pixel 12 of 2m-1 and 2m, and the q bar second data line DL2 is that active switching element 14 with the inferior pixel 12 of the capable part of 2m-1 electrically connects.Q article of the 3rd data line DL3 is arranged between the capable inferior pixel 12 of the capable inferior pixel 12 of 2m-1 and 2m, and q article of the 3rd data line DL3 is that active switching element 14 with the inferior pixel 12 of the capable part of 2m electrically connects.The 4th data line DL4 is arranged at a side (right side of Fig. 1) of the capable inferior pixel 12 of M, and the 4th data line DL4 electrically connects with the capable part time pixel 12 interior active switching element 14 of M.For example; Article 1, the first data line DL1 is the left side that is arranged at the inferior pixel 12 of the 1st row; Article 1, the second data line DL2 is arranged between inferior pixel 12 and the 2nd capable inferior pixel 12 of the 1st row; Article 1, the 3rd data line DL3 be inferior pixel 12 that is arranged at the 1st row with inferior pixel 12 of the 2nd row between, the 2nd first data line DL1 is the left side that is arranged at the 3rd inferior pixel 12 of going, the 2nd second data line DL2 is arranged between the inferior pixel 12 that the 3rd inferior pixel 12 and the 4th of going; Article 2, the 3rd data line DL3 is arranged between inferior pixel 12 and the 4th capable inferior pixel 12 of the 3rd row, by that analogy.The 4th data line DL4 is arranged at the right side of the inferior pixel 12 of last 1 row.In addition since the 1st first data line DL1 only inferior pixel 12 with the 1st row is adjacent, therefore the 1st first data line DL1 is active switching element 14 electric connections with the inferior pixel 12 of the part of the 1st row.Article 2, first data line DL1 to the q bar, the first data line DL1 is owing to be between the inferior pixel 12 of two adjacent lines; Therefore the 2nd first data line DL1 electrically connects with the active switching element 14 of the inferior pixel 12 of the part of the active switching element 14 of inferior pixel 12 of the part of the 2nd row and the 3rd row respectively; Article 3, the first data line DL1 be respectively with active switching element 14 electric connections of the inferior pixel 12 of the part of the active switching element 14 of inferior pixel 12 of the part of the 4th row and the 5th row, by that analogy.Article 1, the second data line DL2 is that active switching element 14 with inferior pixel 12 of the part of the 1st row electrically connects, and the 2nd second data line DL2 is that the active switching element 14 with the inferior pixel 12 of the part of the 3rd row electrically connects, by that analogy.Article 1, the 3rd data line DL3 is that active switching element 14 with inferior pixel 12 of the part of the 2nd row electrically connects, and the 2nd article of the 3rd data line DL3 is that the active switching element 14 with the inferior pixel 12 of the part of the 4th row electrically connects, by that analogy.The 4th data line DL4 is owing to only the inferior pixel 12 with last 1 row is adjacent, and therefore the 4th data line DL4 electrically connects with the inferior pixel 12 interior active switching element 14 of the part of last 1 row.
As shown in Figure 1; In the present embodiment; P bar first grid polar curve GL1 electrically connects with the active switching element 14 of 2m time pixel 12 of the active switching element 14 of all times pixels 12 of 3n-2 row and 3n-1 row respectively, and p bar second grid line GL2 electrically connects with the active switching element 14 of all times pixels 12 of the active switching element 14 of 2m-1 time pixel 12 of 3n-1 row and 3n row respectively.For example; Article 1, first grid polar curve GL1 be respectively with active switching element 14 electric connections of inferior pixel 12 that is positioned at even number line of the active switching element 14 of all time pixels 12 of the 1st row and the 2nd row; Article 2, first grid polar curve GL1 be respectively with active switching element 14 electric connections of inferior pixel 12 that is positioned at even number line of the active switching element 14 of all time pixels 12 of the 4th row and the 5th row, by that analogy.Article 1, second grid line GL2 be respectively with active switching element 14 electric connections of all time pixels 12 of the active switching element 14 of inferior pixel 12 that is positioned at odd-numbered line of the 2nd row and the 3rd row; Article 2, second grid line GL2 be respectively with active switching element 14 electric connections of all time pixels 12 of the active switching element 14 of inferior pixel 12 that is positioned at odd-numbered line of the 5th row and the 6th row, by that analogy.Article 1, the first data line DL1 be with the 1st the row the 2nd, the 5th ..., to active switching element 14 electric connections of 3n-1 time pixel 12.Article 2, the first data line DL1 be respectively with the 2nd the row the 2nd, the 5th ..., to the active switching element 14 of 3n-1 time pixel 12 and the 2nd, the 5th of the 3rd row ..., to active switching element 14 electric connections of 3n-1 time pixel 12; Article 3, the first data line DL1 be respectively with the 4th the row the 2nd, the 5th ... To the active switching element 14 of 3n-1 time pixel 12 and the 2nd, the 5th of the 5th row ... Active switching element 14 to 3n-1 time pixel 12 electrically connects, by that analogy.Article 1, the second data line DL2 be respectively with the 1st the row the 1st, the 4th ..., to the active switching element 14 of 3n-2 pixel 12 and the 3rd, the 6th ..., to active switching element 14 electric connections of 3n time pixel 12; Article 2, the second data line DL2 be respectively with the 3rd the row the 1st, the 4th ..., to the active switching element 14 of 3n-2 pixel 12 and the 3rd, the 6th ..., to active switching element 14 electric connections of 3n time pixel 12, by that analogy.Article 1, the 3rd data line DL3 be respectively with the 2nd the row the 1st, the 4th ..., to the active switching element 14 of 3n-2 pixel 12 and the 3rd, the 6th ..., to active switching element 14 electric connections of 3n time pixel 12; Article 2, the 3rd data line DL3 be respectively with the 4th the row the 1st, the 4th ..., to the active switching element 14 of 3n-2 pixel 12 and the 3rd, the 6th ..., to active switching element 14 electric connections of 3n time pixel 12, by that analogy.The 4th data line DL4 be with last 1 the row the 2nd, the 5th ..., to active switching element 14 electric connections of 3n-1 time pixel 12.
In the present embodiment; Be positioned at the capable inferior pixel 12 of 3r-2 and be in order to show a pixel 121 for the first time of one first primary colors picture; Be positioned at the capable inferior pixel 12 of 3r-1 and be in order to show a pixel 122 for the second time of one second primary colors picture; Be positioned at the capable inferior pixel 12 of 3r and be in order to show a pixel 123 for the third time of a three primary colors picture, wherein r is the set smaller or equal to the positive integer of M/3.That is to say; Be positioned at the 1st row, the 4th row, the 7th row ... To the inferior pixel 12 of countdown line 3 be in order to show the pixel 121 first time of the first primary colors picture, be positioned at the 2nd row, the 5th row, eighth row ..., to the inferior pixel 12 of the 2nd row reciprocal be in order to show the pixel 122 second time of the second primary colors picture; Be positioned at the 3rd row, the 6th row, the 9th row ..., to the inferior pixel 12 of last 1 row be in order to show the pixel for the third time 123 of three primary colors picture.In the present embodiment, be arranged in same adjacent first time of the pixel 121 that lists, pixel 122 constitutes pixel P (Fig. 1 only shows single pixel P) with pixel 123 for the third time for the second time.The first primary colors picture, the second primary colors picture and three primary colors picture can be respectively wherein one of red picture, green picture and blue picture, but not as limit.
The array base palte 10 of the display panel of present embodiment can comprise a plurality of pixel cell PU (only indicating single pixel cell PU among Fig. 1); That is to say; According to the queueing discipline of inferior pixel 12, the pel array of the array base palte 10 of display panel can be distinguished into the pixel cell PU by a plurality of continuous arrangements.Each pixel cell PU comprises six time pixels 12, six active switching element 14, a first grid polar curve GL1, a second grid line GL2, one the 3rd data line DL3, one first data line DL1 and one second data line DL2.Above-mentioned six pixels 12 are the arrays that are arranged in one 3 row *, 2 row.Active switching element 14 is arranged at respectively in each time pixel 12.Between inferior pixel 12 that first grid polar curve GL1 is arranged at the 1st row and inferior pixel 12 of the 2nd row, and first grid polar curve GL1 is wherein one the active switching element electric connection of the inferior pixel 12 that is listed as with the active switching element 14 and the 2nd of the 1st inferior pixel 12 that is listed as respectively.Between inferior pixel 12 that second grid line GL2 is arranged at the 2nd row and inferior pixel 12 of the 3rd row, and second grid line GL2 is active switching element 14 electric connections of the inferior pixel 12 that is listed as with wherein another person's of the 2nd inferior pixel 12 that is listed as active switching element 14 and the 3rd respectively.In the present embodiment; First grid polar curve GL1 electrically connects with the active switching element 14 of the 2nd pixel 12 of the active switching element 14 of all time pixels 12 of the 1st row and the 2nd row respectively, and second grid line GL2 electrically connects with the active switching element 14 of all times pixels 12 of the active switching element 14 of the 1st pixel 12 of the 2nd row and the 3rd row respectively.The 3rd data line DL3 is arranged at the side (left side of Fig. 1) of inferior pixel 12 of the 1st row, and the 3rd data line DL3 be respectively with active switching element 14 electric connections of the inferior pixel 12 of the part of the 1st row.Between inferior pixel 12 that the first data line DL1 is arranged at the 1st row and inferior pixel 12 of the 2nd row, and the first data line DL1 is active switching element 14 electric connections of the inferior pixel 12 of the part of with the inferior pixel 12 and the 2nd of the 1st part of going respectively.The second data line DL2 is arranged at the side (right side of Fig. 1) of inferior pixel 12 of the 2nd row, and the second data line DL2 be respectively with active switching element 14 electric connections of the inferior pixel 12 of the part of the 2nd row.In the present embodiment, the 3rd data line DL3 electrically connects with the 1st pixel 12 of the 1st row and the active switching element 14 of the 3rd pixel 12 respectively.The first data line DL1 electrically connects with the active switching element 14 of the 2nd pixel 12 of the 2nd time pixel 12 of the 1st row and the 2nd row respectively.The second data line DL2 electrically connects with the 1st pixel 12 of the 2nd row and the active switching element 14 of the 3rd pixel 12.
In addition, when showing, the second data line DL2 has identical polarity with the data-signal of the 3rd data line DL3, and the data-signal of the first data line DL1 and the second data line DL2 has antipole property.That is to say that the present invention's row counter-rotating (column inversion) type of drive capable of using provides data-signal to data line, so the data-signal of wantonly two adjacent data lines of the array base palte 10 of display panel can have antipole property.As shown in Figure 1, for example, in the picture frame time (frame time), the data line of odd number bar have positive polarity (like the symbol of Fig. 1 "+" sign), and the data line of even number bar have negative polarity (like the symbol of Fig. 1 "-" sign).In time, the polarity of data line can be reversed at next picture frame, that is to say that the data line of odd number bar can have negative polarity, and the data line of even number bar can have positive polarity.
In the present invention; Pixel cell PU is the minimum arrangement units according to inferior pixel 12 that queueing discipline defined of time pixel 12, and pixel P then is according to being made up of the inferior pixel in order to picture (for example red picture, green picture and blue picture) that different primary colors are provided when the demonstration.
Under identical resolution; Pixel arrangement mode compared to adopting 1D1G (is provided with 1 data line between the two adjacent places pixels; And between the adjacent two row time pixels 1 gate line is set) display panel, the employed gate line number of the display panel of present embodiment is 2/3 times.Under this situation, each bar gate line can charge to the inferior pixel of 1.5 row, so the duration of charging can increase by 1.5 times, therefore can have higher picture update rate, for example reaches 120Hz or the picture update rate of 240Hz.In addition; Pixel arrangement mode compared to adopting 2D1G (is provided with 2 data lines between the two adjacent places pixels; And between the adjacent two row time pixels 1 gate line is set) display panel; The pixel arrangement mode of the display panel of present embodiment (only is provided with first data line between two adjacent places pixels of part; And between two adjacent places pixels of other part, being provided with second data line and the 3rd data line) employed data line number is 3/4 times, so the cost of source driving chip can reduce 1/4, and have high aperture opening ratio.In addition; When showing; The data-signal of wantonly two adjacent data lines of the array base palte 10 of display panel can have antipole property; That is utilize the row inversion driving mode to provide data-signal to data line, and, can make the display effect of array base palte 10 generation similarity counter-rotating (dot inversion) type of drive of display panel by the connected mode of above-mentioned gate line and active switching element 14 and the connected mode of data line and active switching element 14.
The array base palte and the pixel cell of display panel of the present invention do not exceed with the foregoing description.Hereinafter will be introduced the array base palte and the pixel cell of the display panel of other preferred embodiment of the present invention or alternate embodiment in regular turn; And for the ease of comparing different place and the simplified illustration of each embodiment; Use identical symbol mark components identical among each embodiment hereinafter; And the different place that is primarily aimed at each embodiment describes, and no longer repeating part is given unnecessary details.
Please refer to Fig. 2.Fig. 2 is the synoptic diagram of array base palte of the display panel of second preferred embodiment of the present invention.As shown in Figure 2; The position of the gate line of the array base palte of the display panel of present embodiment and the configuration of data line and number, active switching element and electric connection mode thereof; And the composition of pixel cell) identical with first preferred embodiment, be different from the first preferred embodiment part and be described below.In the array base palte 20 of the display panel of present embodiment; Be positioned at the capable inferior pixels 12 of 3r-2 and be in order to show first bright pixel 121B of one first primary colors picture with 2s-1 row; Be positioned at the capable inferior pixels of 3r-2 and be in order to show the first dark inferior pixel 121D of the first primary colors picture with 2s row; Be positioned at the capable inferior pixels 12 of 3r-1 and be in order to show second bright pixel 122B of one second primary colors picture with 2s-1 row; Be positioned at the capable inferior pixels 12 of 3r-1 and be in order to show the second dark inferior pixel 122D of the second primary colors picture with 2s row; Be positioned at the capable inferior pixels 12 of 3r and be in order to show the 3rd bright pixel 123B of a three primary colors picture with 2s-1 row; And be positioned at the capable inferior pixels 12 with 2s row of 3r and be in order to show the 3rd dark inferior pixel 123D of three primary colors picture, wherein r is the set smaller or equal to the positive integer of M/3, and s is the set smaller or equal to the positive integer of N/2.In the present embodiment, be positioned at the same first bright time adjacent pixel 121B that lists, second bright pixel 122B and the 3rd bright pixel 123B and be positioned at adjacent first dark pixel 121D on another adjacent columns, second dark pixel 122D constitutes a pixel P with the 3rd dark inferior pixel 123D.That is to say that the pixel P of present embodiment is made up of six 12 of pixels.In same pixel P, first bright pixel 121B and first dark pixel 121D all are in order to showing the first primary colors picture, but the brightness meeting of first bright pixel 121B is greater than the brightness of first dark pixel 121D; Second bright pixel 122B and second dark pixel 122D all are in order to showing the second primary colors picture, but the brightness meeting of second bright pixel 122B is greater than the brightness of second dark pixel 122D; The 3rd bright pixel 123B and the 3rd dark pixel 123D all are in order to showing the three primary colors picture, but the brightness meeting of the 3rd bright pixel 123B is greater than the brightness of the 3rd dark pixel 123D.The first primary colors picture, the second primary colors picture and three primary colors picture can be respectively wherein one of red picture, green picture and blue picture, but not as limit.The configuration of the pixel P of present embodiment can improve colour cast (color washout) problem of display panel.
Please refer to Fig. 3.Fig. 3 is the synoptic diagram of array base palte of the display panel of the 3rd preferred embodiment of the present invention.As shown in Figure 3; The position of the gate line of the array base palte of the display panel of present embodiment and the configuration of data line and number, active switching element and electric connection mode thereof; And the composition of pixel cell) identical with first, second preferred embodiment, be different from first, second preferred embodiment locate be described below.In the array base palte 30 of the display panel of present embodiment; Be positioned at the capable inferior pixels 12 of 2m-1 and be with 2s-1 row in order to show one first primary colors picture one the first time pixel 121; Be positioned at the capable inferior pixels 12 of 2m and be with 2s-1 row in order to show one second primary colors picture one the second time pixel 122; Be positioned at the capable inferior pixels 12 of 2m-1 and be in order to show a pixel 123 for the third time of a three primary colors picture with 2s row; Be positioned at the capable inferior pixels 12 with 2s row of 2m and be in order to show one the 4th pixel 124 of a white picture, wherein s is the set smaller or equal to the positive integer of N/2.In the present embodiment, be positioned at same list adjacent first time pixel 121 with pixel 122 for the second time and the pixel for the third time 123 and the 4th pixel 124 formations one pixel P that are positioned at another adjacent columns.That is to say that the pixel P of present embodiment is made up of four 12 of inferior pixels that are arranged in the matrix of 2*2.The first primary colors picture, the second primary colors picture and three primary colors picture can be respectively wherein one of red picture, green picture and blue picture, but not as limit.The pixel P institute picture displayed of present embodiment comprises red picture, green picture, blue picture and white picture, therefore can effectively promote the brightness and the contrast of display panel.
Please refer to Fig. 4.Fig. 4 is the synoptic diagram of array base palte of the display panel of the 4th preferred embodiment of the present invention.As shown in Figure 4; The position of the gate line of the array base palte of the display panel of present embodiment and the configuration of data line and number, active switching element and electric connection mode thereof; And the composition of pixel cell) identical with first to the 3rd preferred embodiment, be different from first, second, third preferred embodiment part and be described below.The array base palte 40 of the display panel of present embodiment is to be a look preface (field sequential color, FSC) array base palte of display panel.Be positioned at the capable inferior pixel 12 of 2m and be in order to show a pixel 121 for the first time of one first primary colors picture; Be positioned at the capable inferior pixel 12 of 2m-1 and be in order to showing a pixel 122 for the second time of a white picture, one second primary colors picture and a three primary colors picture in regular turn, and adjacent first time of the pixel 121 that is positioned at same row constitutes a pixel P with pixel 122 for the second time.That is to say that the inferior pixel 12 that is positioned at even number line is pixel 121 for the first time, and inferior pixel 12 that is positioned at odd-numbered line is pixel 122 second time, and pixel P is made up of two 12 of inferior pixels side by side.When showing; The picture frame time (frame time) can further be distinguished into three secondary picture frame times (sub frame time); Wherein pixel 121 can demonstrate white picture, second primary colors picture and the three primary colors picture at three secondary picture frames in regular turn in the time for the first time; And pixel 122 can demonstrate the first primary colors picture at first secondary picture frame in the time for the second time, not in follow-up two secondary picture frame display frames in the time.The first primary colors picture, the second primary colors picture and three primary colors picture can be provided by the module backlight (figure does not show) of the light-emitting component that is provided with different colours (for example light emitting diode element).In addition, pixel 121 optionally is provided with colored filter (figure does not show) for the first time, and pixel 122 can not be provided with colored filter for the second time, but not as limit.The first primary colors picture can be for example green picture, and the second primary colors picture and three primary colors picture can be respectively wherein one of red picture and blue picture, but not as limit.Field look preface display panel is easy to generate look and separates (color breakup; CBU) phenomenon; And by pixel arrangement mode of the present invention, display panel can be used in the picture update rate of 240Hz, therefore can effectively reduce the impression of human eye for the look segregation phenomenon; And, therefore under identical panel size, can have higher resolution because pixel P only comprises pixel 12 two times.
Please refer to Fig. 5.Fig. 5 is the synoptic diagram of array base palte of display panel of the alternate embodiment of first to fourth preferred embodiment of the present invention.The composition of the gate line of the array base palte of the display panel of present embodiment and the array base palte of the display panel of aforementioned first to fourth preferred embodiment and the number of data line and allocation position and pixel cell is all identical, its difference be active switching element the position and with the electric connection mode of gate line and data line.As shown in Figure 5; In the array base palte 50 of the display panel of this alternate embodiment, p bar first grid polar curve GL1 electrically connects with the active switching element 14 of 2m-1 time pixel 12 of the active switching element 14 of all times pixels 12 of 3n-2 row and 3n-1 row respectively.P bar second grid line GL2 electrically connects with the active switching element 14 of all times pixels 12 of the active switching element 14 of 2m time pixel 12 of 3n-1 row and 3n row respectively.In addition, when m=1, the q bar first data line DL1 is that the active switching element 14 with the capable 3n-2 of 2m-1 time pixel 12 electrically connects; When 1＜m ≦ M/2, the q bar first data line DL1 electrically connects with the active switching element 14 of capable 3n-2 time pixel 12 of the active switching element 14 of capable 3n time pixel 12 of 2m-2 and 2m-1 respectively.The q bar second data line DL2 electrically connects with the active switching element 14 of the capable 3n-1 of 2m-1 time pixel 12 and the active switching element 14 of 3n time pixel 12 respectively.Q article of the 3rd data line DL3 electrically connects with the active switching element 14 of capable 3n-2 time pixel 12 of 2m and the active switching element 14 of 3n-1 time pixel 12 respectively.The 4th data line DL4 is that the active switching element 14 with the capable 3n of M time pixel 12 electrically connects.For example, the 1st first grid polar curve GL1 be respectively with active switching element 14 electric connections of inferior pixel 12 that is positioned at odd-numbered line of the active switching element 14 of all times pixels 12 of the 1st row and the 2nd row; Article 2, first grid polar curve GL1 be respectively with active switching element 14 electric connections of inferior pixel 12 that is positioned at odd-numbered line of the active switching element 14 of all time pixels 12 of the 4th row and the 5th row, by that analogy.Article 1, second grid line GL2 be respectively with active switching element 14 electric connections of all time pixels 12 of the active switching element 14 of inferior pixel 12 that is positioned at even number line of the 2nd row and the 3rd row; Article 2, second grid line GL2 is arranged between the inferior pixel 12 that inferior pixel 12 and the 6th of the 5th row is listed as; And the 2nd second grid line GL2 be respectively with active switching element 14 electric connections of all time pixels 12 of the active switching element 14 of inferior pixel 12 that is positioned at even number line of the 5th row and the 6th row, by that analogy.
In addition, the q bar first data line DL1 is a side (left side among Fig. 5) that is arranged at the capable inferior pixel 12 of 2m-1.When m=1, the q bar first data line DL1 is that the active switching element 14 with the capable 3n-2 of 2m-1 time pixel 12 electrically connects; When 1＜m ≦ M/2, the q bar first data line DL1 electrically connects with the active switching element 14 of capable 3n-2 time pixel 12 of the active switching element 14 of capable 3n time pixel 12 of 2m-2 and 2m-1 respectively.The q bar second data line DL2 is arranged between the capable inferior pixel 12 of the capable inferior pixel 12 of 2m-1 and 2m, and the q bar second data line DL2 electrically connects with the active switching element 14 of capable 3n-1 time pixel 12 of 2m-1 and the active switching element 14 of 3n time pixel 12 respectively.Q article of the 3rd data line DL3 is arranged between the capable inferior pixel 12 of the capable inferior pixel 12 of 2m-1 and 2m, and q article of the 3rd data line DL3 electrically connects with the active switching element 14 of capable 3n-2 time pixel 12 of 2m and the active switching element 14 of 3n-1 time pixel 12 respectively.The 4th data line DL4 is that the active switching element 14 with the capable 3n of M time pixel 12 electrically connects.For example, the 1st first data line DL1 is the 1st, the 4th with the 1st row ..., to active switching element 14 electric connections of 3n-2 time pixel 12; Article 2, the first data line DL1 be respectively with the 2nd the row the 3rd, the 6th ..., to the active switching element 14 of 3n time pixel 12 and the 1st, the 4th of the 3rd row ..., to active switching element 14 electric connections of 3n-2 time pixel 12; Article 3, the first data line DL1 be respectively with the 4th the row the 3rd, the 6th ..., to the active switching element 14 of 3n time pixel 12 and the 1st, the 4th of the 5th row ..., to active switching element 14 electric connections of 3n-2 time pixel 12, by that analogy.Article 1, the second data line DL2 be respectively with the 1st the row the 2nd, the 5th ..., to the active switching element 14 of 3n-1 pixel 12 and the 3rd, the 6th ..., to active switching element 14 electric connections of 3n time pixel 12; Article 2, the second data line DL2 be respectively with the 3rd the row the 2nd, the 5th ..., to the active switching element 14 of 3n-1 pixel 12 and the 3rd, the 6th ..., to active switching element 14 electric connections of 3n time pixel 12, by that analogy.Article 1, the 3rd data line DL3 be respectively with the 2nd the row the 1st, the 4th ..., to the active switching element 14 of 3n-2 pixel 12 and the 2nd, the 5th ..., to active switching element 14 electric connections of 3n-1 time pixel 12; Article 2, the 3rd data line DL3 be respectively with the 4th the row the 1st, the 4th ..., to the active switching element 14 of 3n-2 pixel 12 and the 2nd, the 5th ..., to active switching element 14 electric connections of 3n-1 time pixel 12, by that analogy.The 4th data line DL4 be with last 1 the row the 3rd, the 6th ..., to active switching element 14 electric connections of 3n time pixel 12.
The array base palte 50 of the display panel of present embodiment can be the wherein alternate embodiment of any one of first to fourth preferred embodiment of the present invention.Present embodiment is that the array base palte 50 with display panel is that the situation of alternate embodiment of array base palte 30 of the display panel of the 3rd preferred embodiment is explained, so pixel P is made up of with pixel 122 for the second time and pixel for the third time 123 and the 4th 124 of pixel of being positioned at another adjacent columns same adjacent first time of the pixel 121 that lists.When the array base palte 50 of the display panel of present embodiment is the alternate embodiment of array base palte of display panel of first preferred embodiment, pixel be by be positioned at the same adjacent pixel first time that lists, pixel constitutes with pixel for the third time for the second time; When the array base palte 50 of the display panel of present embodiment is the alternate embodiment of array base palte of display panel of second preferred embodiment, pixel be by be positioned at the same first bright time adjacent pixel that lists, second bright pixel and the 3rd bright pixel and be positioned at the first dark time adjacent pixel on another adjacent columns, second dark pixel constitutes with the 3rd dark inferior pixel; When the array base palte 50 of the display panel of present embodiment was the alternate embodiment of array base palte of display panel of the 4th preferred embodiment, pixel was to be made up of with pixel for the second time adjacent first time of the pixel that is positioned at same row.
In sum, each bar gate line of the array base palte of display panel of the present invention and pixel cell can charge to the inferior pixel of 1.5 row, so the duration of charging can increase by 1.5 times, therefore can be used in the picture update rate of 240Hz.Moreover compared to the display panel of the pixel arrangement mode that adopts 2D1G, the employed data line number of display panel of the present invention is 3/4 times, so the cost of source driving chip can reduce 1/4.In addition, display panel utilization row inversion driving mode of the present invention can produce the display effect of similarity inversion driving mode, also can effectively reduce the cost of source driving chip.Display panel of the present invention can be display panels, or other various types of formula display panels.
The above is merely preferred embodiment of the present invention, and all equalizations of doing according to claims of the present invention change and modify, and all should belong to protection scope of the present invention.

Claims (16)

1. the array base palte of a display panel comprises:
A plurality of pixels, wherein said time pixel is arranged in the capable pel array of a N row * M, and N and M are respectively a positive integer;
A plurality of active switching element are arranged at respectively respectively in this time pixel;
Many first grid polar curves; Wherein between p bar first grid polar curve said the pixel that to be said pixel being arranged at 3n-2 row be listed as with 3n-1; N is the set smaller or equal to the positive integer of N/3; P equals n, and p bar first grid polar curve is to electrically connect with the said active switching element of said pixel of the part of the said active switching element of said pixel of 3n-2 row and 3n-1 row respectively;
Many second grid lines; Wherein p bar second grid line be said pixel being arranged at 3n-1 row with said pixel of 3n row between, and p bar second grid line be respectively with the said active switching element electric connection of said pixel of the said active switching element of said pixel of the part of 3n-1 row and 3n row;
Many data lines comprise:
Many first data lines; Wherein q bar first data line is a side that is arranged at said time capable pixel of 2m-1; M is the set smaller or equal to the positive integer of M/2; Q equals m, and when m=1, and q bar first data line is that the said active switching element with said pixel of the capable part of 2m-1 electrically connects; When 1＜m ≦ M/2, q bar first data line is to electrically connect with the said active switching element of said pixel of the capable part of the said active switching element of said pixel of the capable part of 2m-2 and 2m-1 respectively;
Many second data lines; Wherein q bar second data line is to be arranged between the said time capable pixel of said time capable pixel of 2m-1 and 2m, and q bar second data line is that said active switching element with said pixel of the capable part of 2m-1 electrically connects;
Many articles the 3rd data lines; Wherein q article of the 3rd data line is to be arranged between the said time capable pixel of said time capable pixel of 2m-1 and 2m, and q article of the 3rd data line is that said active switching element with said pixel of the capable part of 2m electrically connects; And
One the 4th data line is arranged at a side of said time capable pixel of M, and wherein the 4th data line is that said active switching element with said pixel of the capable part of M electrically connects.
2. the array base palte of display panel as claimed in claim 1; It is characterized in that p bar first grid polar curve is to electrically connect with the said active switching element of 2m time pixel of the said active switching element of all said pixels of 3n-2 row and 3n-1 row respectively; And
P bar second grid line is to electrically connect with the said active switching element of all said pixels of the said active switching element of 2m-1 time pixel of 3n-1 row and 3n row respectively.
3. the array base palte of display panel as claimed in claim 1 is characterized in that,
P bar first grid polar curve is to electrically connect with the said active switching element of 2m-1 time pixel of the said active switching element of all said pixels of 3n-2 row and 3n-1 row respectively; And
P bar second grid line is to electrically connect with the said active switching element of all said pixels of the said active switching element of 2m time pixel of 3n-1 row and 3n row respectively.
4. the array base palte of display panel as claimed in claim 1 is characterized in that,
When m=1; Q bar first data line is that the said active switching element with the capable 3n-1 of 2m-1 time pixel electrically connects; When 1＜m ≦ M/2, q bar first data line is to electrically connect with the said active switching element of capable 3n-1 time pixel of the said active switching element of capable 3n-1 time pixel of 2m-2 and 2m-1 respectively;
Q bar second data line is to electrically connect with the said active switching element of the capable 3n-2 of 2m-1 time pixel and the said active switching element of 3n time pixel respectively;
Q article of the 3rd data line is to electrically connect with the said active switching element of capable 3n-2 time pixel of 2m and the said active switching element of 3n time pixel respectively; And
The 4th data line is that the said active switching element with the capable 3n-1 of M time pixel electrically connects.
5. the array base palte of display panel as claimed in claim 1 is characterized in that,
When m=1; Q bar first data line is that the said active switching element with the capable 3n-2 of 2m-1 time pixel electrically connects; When 1＜m ≦ M/2, q bar first data line is to electrically connect with the said active switching element of capable 3n-2 time pixel of the said active switching element of capable 3n time pixel of 2m-2 and 2m-1 respectively;
Q bar second data line is to electrically connect with the said active switching element of the capable 3n-1 of 2m-1 time pixel and the said active switching element of 3n time pixel respectively;
Q article of the 3rd data line is to electrically connect with the said active switching element of capable 3n-2 time pixel of 2m and the said active switching element of 3n-1 time pixel respectively; And
The 4th data line is that the said active switching element with the capable 3n of M time pixel electrically connects.
6. the array base palte of display panel as claimed in claim 1; It is characterized in that; Be positioned at capable respectively this time pixel of 3r-2 and be in order to show a pixel for the first time of one first primary colors picture; Be positioned at capable respectively this time pixel of 3r-1 and be in order to show a pixel for the second time of one second primary colors picture; Be positioned at capable respectively this time pixel of 3r and be in order to showing a pixel for the third time of a three primary colors picture, and be positioned at same adjacent this of the pixel that lists, this first time second time pixel and this for the third time pixel constitute a pixel, wherein r is the set smaller or equal to the positive integer of M/3.
7. the array base palte of display panel as claimed in claim 1; It is characterized in that; Be positioned at capable respectively this time pixels of 3r-2 and be in order to show first bright pixel of one first primary colors picture with 2s-1 row; Be positioned at capable respectively this time pixels of 3r-2 and be in order to show first dark pixel of this first primary colors picture with 2s row; Be positioned at capable respectively this time pixels of 3r-1 and be in order to show second bright pixel of one second primary colors picture with 2s-1 row; Be positioned at capable respectively this time pixels of 3r-1 and be in order to show second dark pixel of this second primary colors picture with 2s row; Be positioned at capable respectively this time pixels of 3r and be in order to show the 3rd bright pixel of a three primary colors picture with 2s-1 row; And be positioned at capable respectively this time pixels of 3r and be in order to show the 3rd dark pixel of this three primary colors picture with 2s row; This adjacent first dark pixel, this second dark pixel and the 3rd dark pixel of being positioned at same this adjacent first bright pixel, this second bright pixel and the 3rd bright the pixel that lists and being positioned on another adjacent columns constitute a pixel, and wherein r is the set smaller or equal to the positive integer of M/3, and s is the set smaller or equal to the positive integer of N/2.
8. the array base palte of display panel as claimed in claim 1; It is characterized in that; Be positioned at capable respectively this time pixels of 2m-1 and be in order to show a pixel for the first time of one first primary colors picture with 2s-1 row; Be positioned at capable respectively this time pixels of 2m and be in order to show a pixel for the second time of one second primary colors picture with 2s-1 row; Be positioned at capable respectively this time pixels of 2m-1 and be for being in order to showing one the 4th pixel of a white picture in order to show a pixel for the third time of a three primary colors picture, to be positioned at capable respectively this time pixels of 2m with the 2s row with 2s row, and be positioned at same list adjacent this first time pixel and this second time pixel; And be positioned at another adjacent columns this for the third time pixel and the 4th pixel constitute a pixel, wherein s is the set smaller or equal to the positive integer of N/2.
9. the array base palte of display panel as claimed in claim 1; It is characterized in that; Be positioned at capable respectively this time pixel of 2m and be in order to show a pixel for the first time of one first primary colors picture; Be positioned at capable respectively this time pixel of 2m-1 and be in order to showing a pixel for the second time of a white picture, one second primary colors picture and a three primary colors picture in regular turn, and be positioned at same row adjacent this first time pixel and this second time pixel constitute a pixel.
10. the array base palte of display panel as claimed in claim 1 is characterized in that, the data-signal of wantonly two adjacent said data lines has antipole property.
11. the pixel cell of a display panel comprises:
Six pixels are arranged in the array that one 3 row * 2 go;
Six active switching element are arranged at respectively respectively in this time pixel;
One first grid polar curve; Between said the pixel that is arranged at the 1st row and said the pixel of the 2nd row, wherein this first grid polar curve be respectively with wherein this active switching element electric connection of one of said pixel of the said active switching element of said pixel of the 1st row and the 2nd row;
One second grid line; Between said the pixel that is arranged at the 2nd row and said the pixel of the 3rd row, wherein this second grid line be respectively with the said active switching element electric connection of said pixel of wherein another person's of said pixel of the 2nd row this active switching element and the 3rd row;
One the 3rd data line is arranged at the side of said pixel of the 1st row, and wherein the 3rd data line is to electrically connect with the said active switching element of said pixel of the part of the 1st row respectively;
One first data line; Between said the pixel that is arranged at the 1st row and said the pixel of the 2nd row, wherein this first data line be respectively with the said active switching element electric connection of this time pixel of the part of this time pixel of the part of the 1st row and the 2nd row; And
One second data line is arranged at the side of said pixel of the 2nd row, and wherein this second data line is to electrically connect with the said active switching element of said pixel of the part of the 2nd row respectively.
12. the pixel cell of display panel as claimed in claim 11 is characterized in that,
This first grid polar curve is to electrically connect with this active switching element of the 2nd time pixel of the said active switching element of all said pixels of the 1st row and the 2nd row respectively;
This second grid line is to electrically connect with the said active switching element of all said pixels of this active switching element of the 1st time pixel of the 2nd row and the 3rd row respectively.
13. the pixel cell of display panel as claimed in claim 11 is characterized in that,
This first grid polar curve is to electrically connect with this active switching element of the 1st time pixel of the said active switching element of all said pixels of the 1st row and the 2nd row respectively;
This second grid line is to electrically connect with the said active switching element of all said pixels of this active switching element of the 2nd time pixel of the 2nd row and the 3rd row respectively.
14. the pixel cell of display panel as claimed in claim 11 is characterized in that,
The 3rd data line is to electrically connect with the 1st pixel of the 1st row and the said active switching element of the 3rd pixel respectively;
This first data line is to electrically connect with the said active switching element of the 2nd pixel of the 2nd time pixel of the 1st row and the 2nd row respectively; And
This second data line is to electrically connect with the 1st pixel of the 2nd row and the said active switching element of the 3rd pixel.
15. the pixel cell of display panel as claimed in claim 11 is characterized in that,
The 3rd data line is to electrically connect with the 1st pixel of the 1st row and the said active switching element of the 2nd pixel respectively;
This first data line is to electrically connect with the said active switching element of the 1st pixel of the 3rd time pixel of the 1st row and the 2nd row respectively; And
This second data line is to electrically connect with the 2nd pixel of the 2nd row and the said active switching element of the 3rd pixel.
16. the pixel cell of display panel as claimed in claim 11 is characterized in that, this second data line has identical polarity with the data-signal of the 3rd data line, and the data-signal of this first data line and this second data line has antipole property.
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