CN102694016A - Bipolar junction transistor (BJT) with surface protection and manufacturing method thereof - Google Patents
Bipolar junction transistor (BJT) with surface protection and manufacturing method thereof Download PDFInfo
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- CN102694016A CN102694016A CN2011100800569A CN201110080056A CN102694016A CN 102694016 A CN102694016 A CN 102694016A CN 2011100800569 A CN2011100800569 A CN 2011100800569A CN 201110080056 A CN201110080056 A CN 201110080056A CN 102694016 A CN102694016 A CN 102694016A
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Abstract
The invention provides a bipolar junction transistor (BJT) with surface protection and a manufacturing method thereof. The BJT is formed in a substrate, and comprises a first conductive base, a second conductive emitter and a second conductive collector which are formed in the substrate, wherein the first conductive base is arranged between the second conductive emitter and the second conductive collector and separates the second conductive emitter and the second conductive collector; the base comprises a base contact region which is used as an electric connection point of the base; a gate structure is formed on the substrate surface; and a grid structure is arranged between the base contact region and the second conductive emitter.
Description
Technical field
The present invention relates to a kind of bipolarity junction transistor with surfacecti proteon (bipolarjunction transistor, BJT) and manufacturing approach; Be meant that especially a kind of grid structure that utilizes covers part substrate surface between base stage contact zone and emitter-base bandgap grading to reduce the bipolarity junction transistor and the manufacturing approach thereof of tracking current.
Background technology
Fig. 1 shows a kind of bipolarity junction transistor cutaway view, and its structure is following.In P type substrate 11, form insulation system 12, insulation system 12 for example is regional oxidation (local oxidationof silicon, a LOCOS) structure.In P type substrate 11, form the N type collection utmost point 13, P type base stage 14, with N type emitter-base bandgap grading 15; In the collection utmost point 13, form N type collection utmost point contact zone 16; In base stage 14, form P type base stage contact zone 17.When making the bipolarity junction transistor; If with other metal-oxide semiconductor (MOS) (metal oxide semiconductor, MOS) element is integrated in same substrate, when for example making bipolarity CMOS (BiCMOS) semiconductor element; In MOS element manufacturing process; Many etch processs, the for example self-aligned etching of gate etch or gate structure wall (spacer) all can cause damage or defective to substrate surface.Especially the damage of the substrate surface between base stage contact zone and emitter-base bandgap grading or defective can cause the element surface leakage current, and then reduce the current gain of BJT element.
In view of this, the present invention is promptly to the deficiency of above-mentioned prior art, proposes a kind ofly to have surfacecti proteon and can reduce the bipolarity junction transistor and the manufacturing approach thereof of tracking current; Can be through surfacecti proteon; Reduce in the element manufacture process, at element surface, especially in the damage of base stage and emitter junction; To reduce the element surface leakage current, increase the current gain of BJT element.
Summary of the invention
The object of the invention is to overcome the deficiency and the defective of prior art, proposes a kind of bipolarity junction transistor and manufacturing approach thereof with surfacecti proteon.
For reaching above purpose, with regard to one of them viewpoint, the invention provides a kind of bipolarity junction transistor with surfacecti proteon; Be formed in the substrate; Comprise: be formed at the first conductivity type base stage in this substrate, the second conductivity type emitter-base bandgap grading, with the second conductivity type collection utmost point, wherein, this base stage is between between this emitter-base bandgap grading and the collection utmost point and separate this emitter-base bandgap grading and collect the utmost point; And this base stage comprises a base stage contact zone, in order to the electrical contact as this base stage; And one grid structure be formed on this substrate surface, and this grid structure is between this base stage contact zone and this emitter-base bandgap grading.
With regard to another viewpoint; The invention provides a kind of bipolarity junction transistor manufacturing approach, comprise with surfacecti proteon: a substrate is provided, and in this substrate, form the first conductivity type base stage, the second conductivity type emitter-base bandgap grading, with the second conductivity type collection utmost point; Wherein, This base stage is between this emitter-base bandgap grading and the collection utmost point and separate this emitter-base bandgap grading and the collection utmost point, and this base stage comprises a base stage contact zone, in order to the electrical contact as this base stage; And on this substrate surface, form a grid structure, and this grid structure is by the face that connects that covers this base stage and this emitter-base bandgap grading on this substrate surface.
In said elements and the manufacturing approach, this grid structure should be electrically connected to a known current potential.
Said elements and manufacturing approach; As be applied in the BiCMOS semiconductor element manufacturing process; Then also can make metal oxide semiconductor device in addition in the technology; The grid structure of this metal oxide semiconductor device and the grid structure in the above-mentioned bipolarity junction transistor can utilize the same process step to form at this moment, and do not need to increase in addition processing step.
Explain in detail through specific embodiment below, when the effect that is easier to understand the object of the invention, technology contents, characteristics and is reached.
Description of drawings
Fig. 1 shows a kind of bipolarity junction transistor cutaway view;
Fig. 2 A-2C shows the manufacturing process cross-sectional schematic of first embodiment of the present invention;
Fig. 3 A-3E shows second embodiment of the present invention;
Fig. 4 shows the 3rd embodiment of the present invention;
Fig. 5 shows the 4th embodiment of the present invention;
Fig. 6 shows the 5th embodiment of the present invention.
Symbol description among the figure
11 substrates
12 insulation systems
The 13 collection utmost points
14 base stages
15 emitter-base bandgap gradings
16 collection utmost point contact zones
17 base stage contact zones
18, the 18a grid structure
19 photoresistances
20 leads
Embodiment
Illustrate graphic all genus the among the present invention, mainly be intended to represent the orbution up and down between processing step and each layer, then according to scale as for shape, thickness and width.
See also Fig. 2 A-2C, show the manufacturing process cross-sectional schematic of first embodiment of the present invention.See also Fig. 2 A, at first, the first conductivity type substrate 11 is provided; Such as but not limited to P type substrate; In the first conductivity type substrate 11, form the second conductivity type collection utmost point 13, the first conductivity type base stage 14 and insulation system 12, wherein; Insulation system 12 for example can be but is not limited to LOCOS structure or shallow trench isolation (shallow trench isolation, STI) structure.Then; See also Fig. 2 B; In the first conductivity type substrate 11, form the second conductivity type emitter-base bandgap grading 15, the second conductivity type collection utmost point contact zone 16, with the first conductivity type base stage contact zone 17, wherein; Base stage 14 is between the emitter-base bandgap grading 15 and the collection utmost point 13 and separate the emitter-base bandgap grading 15 and the collection utmost point 13, and base stage contact zone 17 is in order to the electrical contact as base stage 14.Then, see also Fig. 2 C, on substrate 11 surfaces, form grid structure 18, and preferable part or all of substrate 11 surfaces that should make grid structure 18 cover 15 of base stage contact zones 17 and emitter-base bandgap gradings.Wherein, The collection utmost point 13, base stage 14, emitter-base bandgap grading 15, collection utmost point contact zone 16, with base stage contact zone 17 can be through technological, the part or all of grid structure 18 of little shadow or the shielding of SI semi-insulation structure 12; And with ion embedding technology; With first conductivity type or second conductive-type impurity,, implant in the zone of definition with the form of speeding-up ion.Wherein, insulation system 12 is in order to separate collection utmost point contact zone 16 and base stage 14.
Because the protection of grid structure 18; In the time of in forming grid structure 18 or subsequent technique, need carrying out etching; The part substrate surface that part base stage contact zone 17 and emitter-base bandgap grading are 15 will relatively can not sustain damage or produce defective; Therefore when the bipolarity junction transistor is operated, can reduce the leakage current of element surface, improve element characteristic.
Fig. 3 A-3E shows the manufacturing process cross-sectional schematic of second embodiment of the present invention.Different with first embodiment is, present embodiment shows in a kind of BiCMOS manufacturing process, utilize grid structure 18, photoresistance 19, and insulation system 12 define emitter-base bandgap grading 15 and collection utmost point contact zone 16.See also Fig. 3 A; At first, the first conductivity type substrate 11 is provided, such as but not limited to P type substrate; In the first conductivity type substrate 11; Form the second conductivity type collection utmost point 13, the first conductivity type base stage 14 and insulation system 12, wherein, insulation system 12 for example can be but is not limited to LOCOS structure or sti structure; Wherein, in the second conductivity type collection utmost point, the 13 first conductivity type substrates 11 for example capable of using, and the second conductivity type epitaxial layer above being positioned at forms.
Then, see also Fig. 3 B, on the first conductivity type substrate, 11 surfaces, form grid structure 18, grid structure 18 preferable should utilizations in the substrate 11, the same process that in the CMOS zone, forms grid structure forms.Then, see also Fig. 3 C, in substrate 11; Be utilized in the CMOS zone photoresistance 19 that forms second conductive area (being for example and without limitation to second conductivity type source electrode and the drain), part of grid pole structure 18, with SI semi-insulation structure 12 as shielding, with second conductive-type impurity, with ion embedding technology; Like dotted arrow institute signal among the figure, in the implantation substrate 11, to form the second conductivity type emitter-base bandgap grading 15, and the second conductivity type collection utmost point contact zone 16; Wherein, The processing step that ion is implanted preferably is utilized in the same process that forms second conductive area in the CMOS zone and forms, such as but not limited to the processing step of source electrode and drain.
Next see also Fig. 3 D; Be utilized in the CMOS zone lithography process step that forms first conductive area (being for example and without limitation to first conductive type body region) and ion implantation technology step (such as dotted arrow in scheming signal); And utilize grid structure 18 and insulation system 12 conducts to shield; Form the first conductivity type base stage contact zone 17, and base stage contact zone 17 is in order to the electrical contact as base stage 14.Remove after the photoresistance 19, shown in Fig. 3 E, form the generalized section of present embodiment element.In the present embodiment, owing to utilize grid structure 18 definition base stage contact zones 17 and emitter-base bandgap grading 15, therefore, substrate 11 surfaces that grid structure 18 meeting covering most base stage contact zones 17 and emitter-base bandgap grading are 15.Wherein, insulation system 12 is in order to separate collection utmost point contact zone 16 and base stage 14.
Fig. 4 shows the 3rd embodiment of the present invention.Present embodiment and second embodiment difference are: grid structure 18 is electrically connected to emitter-base bandgap grading 15 through lead 20.
Fig. 5 shows the 4th embodiment of the present invention, and different with second embodiment is that grid structure 18 is electrically connected to earthing potential or preset potential through lead 20.In fact 18 purposes of the grid structure among the present invention only be on technology protective substrate 11 surfaces avoid being etched technology cause the damage or defective; And the effect on any circuit is not provided; So its current potential is unimportant; But for fear of grid structure 18 suspension joints and uncontrollable its current potential causes unnecessary disturbing effect, therefore should grid structure 18 be electrically connected to a known current potential.
Fig. 6 shows the 5th embodiment of the present invention; Present embodiment is intended to explanation, in the metal oxide semiconductor device manufacturing process, makes a bipolarity junction transistor of deriving; Just in substrate 11 except metal oxide semiconductor device; Also can make the bipolarity junction transistor in addition, be integrated in the same substrate 11, for example when making the grid structure 18a of this metal oxide semiconductor device; Can utilize the same process step to form grid structure 18, and not need to increase in addition processing step.Similarly; The second conductivity type collection utmost point 13, the first conductivity type base stage 14, the second conductivity type emitter-base bandgap grading 15, the second conductivity type collection utmost point contact zone 16, the first conductivity type base stage contact zone 17; Form such as but not limited to the same process step of utilizing the second conductivity type well region (not shown) in the metal oxide semiconductor device, the first conductivity type well region (not shown), the second conductivity type source electrode 15a, the second conductivity type drain 16a, the first conductive type body region (not shown) respectively, and do not need to increase in addition processing step.
Below to preferred embodiment the present invention being described, is the above, be merely to make those skilled in the art be easy to understand content of the present invention, and be not to be used for limiting interest field of the present invention.Under same spirit of the present invention, those skilled in the art can think and various equivalence changes.For example,, can add other processing step or structure, like deep-well region etc. not influencing under the main characteristic of element; And for example, little shadow technology is not limited to the light shield technology, also can comprise the little shadow technology of electron beam; For another example, the present invention can also be applied to the BJT element of other structure or distribution form, does not for example have the BJT element of insulation system, but not is limited to BJT structure and the layout shown in each embodiment.Scope of the present invention should contain above-mentioned and other all equivalences change.
Claims (8)
1. the bipolarity junction transistor with surfacecti proteon is formed in the base version, it is characterized in that, comprises:
Be formed at the first conductivity type base stage in this substrate, the second conductivity type emitter-base bandgap grading, with the second conductivity type collection utmost point; Wherein, This base stage is between this emitter-base bandgap grading and the collection utmost point and separate this emitter-base bandgap grading and the collection utmost point, and this base stage comprises a base stage contact zone, in order to the electrical contact as this base stage; And
One grid structure is formed on this substrate surface, and this grid structure is between this base stage contact zone and this emitter-base bandgap grading.
2. the bipolarity junction transistor with surfacecti proteon as claimed in claim 1, wherein, this grid structure is electrically connected to this emitter-base bandgap grading, an earthing potential or a preset potential.
3. the bipolarity junction transistor with surfacecti proteon as claimed in claim 1; Wherein, Also comprise a metal oxide semiconductor device in this substrate, this metal oxide semiconductor device has another grid structure, utilizes the same process step to form with this grid structure.
4. the bipolarity junction transistor with surfacecti proteon as claimed in claim 1 wherein, also comprises:
One second conductivity type collection utmost point contact zone, be formed at this collection extremely in; And
At least one insulation system is to separate collection utmost point contact zone and this base stage.
5. the bipolarity junction transistor manufacturing approach with surfacecti proteon is characterized in that, comprises:
One substrate is provided; And in this substrate, form the first conductivity type base stage, the second conductivity type emitter-base bandgap grading, with the second conductivity type collection utmost point, wherein, this base stage is between between this emitter-base bandgap grading and the collection utmost point and separate this emitter-base bandgap grading and collect the utmost point; And this base stage comprises a base stage contact zone, in order to the electrical contact as this base stage; And
On this substrate surface, form a grid structure, and this grid structure is between this base stage contact zone and this emitter-base bandgap grading.
6. the bipolarity junction transistor manufacturing approach with surfacecti proteon as claimed in claim 5, wherein, this grid structure is electrically connected to this emitter-base bandgap grading, an earthing potential or a preset potential.
7. the bipolarity junction transistor manufacturing approach with surfacecti proteon as claimed in claim 5; Wherein, Also comprise a metal oxide semiconductor device in this substrate, this metal oxide semiconductor device has another grid structure, utilizes the same process step to form with this grid structure.
8. the bipolarity junction transistor manufacturing approach with surfacecti proteon as claimed in claim 5 wherein also comprises:
, this forms one second conductivity type collection utmost point contact zone in collecting extremely; And
Form at least one insulation system, to separate collection utmost point contact zone and this base stage.
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| CN2011100800569A CN102694016A (en) | 2011-03-25 | 2011-03-25 | Bipolar junction transistor (BJT) with surface protection and manufacturing method thereof |
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| CN2011100800569A CN102694016A (en) | 2011-03-25 | 2011-03-25 | Bipolar junction transistor (BJT) with surface protection and manufacturing method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108122906A (en) * | 2016-11-28 | 2018-06-05 | 新唐科技股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108122906A (en) * | 2016-11-28 | 2018-06-05 | 新唐科技股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
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Application publication date: 20120926 |