CN102573135B - Wireless sensor network node controller, core bottom plate and wireless network access method for sensor - Google Patents

Abstract

The invention discloses a wireless sensor network node controller, which includes a core base board and multiple interface conversion sub-modules; the core base board includes multiple general communication interfaces, multiple UART/SPI multiplexing selection switches, and a protocol analysis process module; the protocol analysis and processing module, which is used to process the data received by each general communication interface of the core chassis, or the data sent by the core chassis to each general communication interface, according to the UART, SPI or I2C communication protocol; the interface conversion sub-module includes the above The general communication interface of the core base board is compatible with the sub-module general communication interface, a sensor interface, and the interface conversion sub-module is used to convert the data of various types of sensor interfaces into UART, SPI or I2C data, and output them to all The corresponding pin of the general communication interface of the sub-module. The invention also discloses a core bottom board and a wireless network access method for sensors. The invention can enhance the compatibility of the sensor network node controller and facilitate miniaturization.

Description

Wireless sensor network node controller, core backplane and sensor wireless network access method

technical field

The invention relates to information collection and wireless communication technology, in particular to a wireless sensor network node controller, a core base board and a sensor wireless network access method.

Background technique

With the development of wireless communication technology and integrated circuit technology, data collection in many fields (such as environmental monitoring, fire escape guidance, industrial equipment monitoring equipment) has gradually deviated from the original wired centralized monitoring mode and evolved into distributed wireless sensing Network node - gateway convergence node - host computer system. At present, the sensor network node controller in this system is a fixed combination sensor network node controller, that is, a wireless transceiver-node micro-processing system-signal conditioning circuit, and then connected to a 4-20mA sensor , this kind of sensor network node controller has only one sensor interface, which has a high degree of integration, but it is not suitable for sensors with multiple interfaces and multiple data formats to enter the network; the other is a sensor network node controller with strong compatibility This kind of sensor network node controller has a variety of external sensor interfaces, such as UART (Universal Asynchronous Receiver/Transmitter, Universal Asynchronous Receiver Transmitter), SPI (serial peripheral interface, serial peripheral interface), I2C (Inter- Integrated Circuit, I2C bus), RS485, RS232, RS422, CAN (Controller Area Network, controller area network), USB (Universal SerialBUS, universal serial bus), TCP/IP (Transmission Control Protocol/Internet Protocol, medium transmission control protocol /Internet Interconnection Protocol) or GPS (Global Positioning System, Global Positioning System) and other interfaces, but this kind of sensor network node controller is not conducive to miniaturization and portability due to too many external sensor interfaces.

Contents of the invention

The technical problem to be solved by the invention is to make the node controller of the sensor network highly compatible and easy to miniaturize.

In order to solve the above-mentioned technical problems, the present invention provides a wireless sensor network node controller, which includes a core backplane and a plurality of interface conversion sub-modules;

The core base plate includes a plurality of general communication interfaces, a plurality of UART/SPI multiplexing selection switches, and a protocol analysis processing module;

The protocol analysis processing module is used for according to the state of each UART/SPI multiplexing selector switch, the data received by each general communication interface of the core chassis, or the data sent to each general communication interface by the core chassis, according to UART, SPI or I2C communication protocols for processing;

The interface conversion sub-module includes a sub-module general communication interface compatible with the general communication interface of the core backplane, and a dedicated interface. The interface conversion sub-module of a certain type of special interface is used for this type of dedicated The data of the interface is converted into UART, SPI or I2C data, and output to the corresponding pin of the general communication interface of the sub-module, and the interface conversion sub-module communicates with the general communication interface of the core baseboard through its general communication interface of the sub-module.

The general communication interface may include a UART receiving/SPI input pin, a UART sending/SPI output pin, an I2C serial data pin, and an I2C serial clock pin;

The UART/SPI multiplexing selector switch has two states of 1 and 0;

When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed after receiving according to the UART communication protocol; when the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis The processing module packs and processes the data sent by the core board to the UART sending/SPI output pin of the general communication interface, and then sends the data according to the SPI communication protocol, and the data received by the UART receiving/SPI input pin of the general communication interface follows the SPI communication protocol After receiving, analyze and process; no matter what the state of the UART/SPI multiplexing selector switch corresponding to a general communication interface is, the protocol analysis processing module packs the data of the I2C serial data pins sent to the general communication interface by the core backplane After processing, the data is sent according to the I2C communication protocol, and the data received by the I2C serial data pin of the general communication interface is analyzed and processed after being received according to the I2C communication protocol.

The general communication interface may also include an SPI clock pin, a reset pin/SPI enable pin, a power supply pin, a ground pin, and multiple reserved control signal pins.

The dedicated interface of the interface conversion sub-module can be UART, SPI, I2C, RS485, RS232, RS422, CAN, USB, TCP/IP or GPS.

In order to solve the above-mentioned technical problems, the present invention also provides a core backplane, which includes a plurality of general communication interfaces, a plurality of UART/SPI multiplexing selection switches, and a protocol analysis processing module;

The general communication interface includes a UART receiving/SPI input pin, a UART sending/SPI output pin, an I2C serial data pin, and an I2C serial clock pin;

The UART/SPI multiplexing selector switch has two states of 1 and 0;

When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed after receiving according to the UART communication protocol; when the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis The processing module packs and processes the data sent by the core board to the UART sending/SPI output pin of the general communication interface, and then sends the data according to the SPI communication protocol, and the data received by the UART receiving/SPI input pin of the general communication interface follows the SPI communication protocol After receiving, analyze and process; no matter what the state of the UART/SPI multiplexing selector switch corresponding to a general communication interface is, the protocol analysis processing module packs the data of the I2C serial data pins sent to the general communication interface by the core backplane After processing, the data is sent according to the I2C communication protocol, and the data received by the I2C serial data pin of the general communication interface is analyzed and processed after being received according to the I2C communication protocol.

The general communication interface may also include an SPI clock pin, a reset pin/SPI enable pin, a power supply pin, a ground pin, and multiple reserved control signal pins.

In order to solve the above-mentioned technical problems, the present invention also provides a wireless network access method for sensors, and the technical solution adopted is:

A sensor of a certain type of interface is connected to a general communication interface of a core chassis through an interface conversion submodule of this type of special interface, and the core chassis is connected to a gateway through another general communication interface through an interface conversion submodule of a wireless type special interface Sink node wireless communication;

The interface conversion sub-module includes a sub-module general communication interface adapted to the general communication interface of the core backplane, a special interface, and the interface conversion submodule of a certain type of special interface is used to use this type of special interface The data is converted into UART, SPI or I2C data, and output to the corresponding pin of the general communication interface of the sub-module;

The interface conversion sub-module of a certain type of special interface communicates with the sensor of this type of interface through its special interface, and communicates with the general communication interface of the core base plate through its sub-module general communication interface;

The core backplane includes multiple general communication interfaces, multiple UART/SPI multiplexing selection switches, and a protocol analysis and processing module;

The protocol analysis processing module, according to the state of each UART/SPI multiplexing selector switch, to the data received by each general communication interface of the core chassis, or the data sent to each general communication interface by the core chassis, according to the UART, SPI or I2C communication protocol process;

A general communication interface of the core base board communicates with a submodule general communication interface of an interface conversion submodule of a wireless type special interface, and wirelessly communicates with the gateway convergence node through the wireless type special interface of the wireless type special interface conversion submodule.

The general communication interface may include a UART receiving/SPI input pin, a UART sending/SPI output pin, an I2C serial data pin, and an I2C serial clock pin;

The UART/SPI multiplexing selector switch has two states of 1 and 0;

When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed after receiving according to the UART communication protocol; when the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis The processing module packs and processes the data sent by the core board to the UART sending/SPI output pin of the general communication interface, and then sends the data according to the SPI communication protocol, and the data received by the UART receiving/SPI input pin of the general communication interface follows the SPI communication protocol After receiving, analyze and process; no matter what the state of the UART/SPI multiplexing selector switch corresponding to a general communication interface is, the protocol analysis processing module packs the data of the I2C serial data pins sent to the general communication interface by the core backplane After processing, the data is sent according to the I2C communication protocol, and the data received by the I2C serial data pin of the general communication interface is analyzed and processed after being received according to the I2C communication protocol.

The general communication interface may also include an SPI clock pin, a reset pin/SPI enable pin, a power supply pin, a ground pin, and multiple reserved control signal pins.

The dedicated interface of the interface conversion sub-module can be UART, SPI, I2C, RS485, RS232, RS422, CAN, USB, TCP/IP or GPS.

The wireless sensor network node controller of the present invention adopts the combination mode of a core base plate and an interface conversion sub-module, is connected through a universal communication interface (USCI), and the core base plate and the interface conversion sub-module are independent. Each universal communication interface (USCI) on the core base board is compatible with SPI, UART and I2C. The SPI and UART pins can be multiplexed through the UART/SPI multiplexing selection switch, and the UART/SPI and I2C interface selection is realized by relying on the core base board. , while realizing the multiplexing of UART and SPI interface. The wireless sensor network node controller of the present invention, facing a variety of sensors with data interfaces, only needs to select the corresponding interface conversion sub-module to realize the conversion of different communication protocols, and then it can be directly applied to realize the reading of sensor data , which greatly improves the compatibility of the node controller, and the core base board does not need to set corresponding data interfaces for various interfaces of the sensor, which facilitates the miniaturization of the core base board and thus facilitates the miniaturization of the wireless sensor network node controller, and the interface The design of the conversion sub-module interface conversion does not involve complex processors, which greatly reduces the system development time and development difficulty of the entire node controller, and reduces the development cost.

Description of drawings

In order to illustrate the technical solution of the present invention more clearly, the accompanying drawings used in the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, In other words, other drawings can also be obtained from these drawings on the premise of not paying creative work.

Fig. 1 is a schematic diagram of a core baseboard of an embodiment of a wireless sensor network node controller of the present invention;

FIG. 2 is a schematic diagram of a general communication interface of a core backplane of an embodiment of a wireless sensor network node controller of the present invention;

Fig. 3 is a schematic diagram of a wireless transceiver interface conversion submodule of an example of a wireless sensor network node controller of the present invention;

Fig. 4 is the RS485 interface conversion submodule schematic diagram of an example of the wireless sensor network node controller of the present invention;

Fig. 5 is a schematic diagram of a GPS interface conversion sub-module of an example of a wireless sensor network node controller of the present invention.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, not to limit the present invention. And in the case of no conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments of the present invention belong to the protection scope of the present invention.

A wireless sensor network node controller, including a core base board and multiple interface conversion sub-modules;

As shown in FIG. 1 , the core baseboard includes a plurality of universal communication interfaces (USCI) 5 , a plurality of UART/SPI multiplexing selection switches 7 , and a protocol analysis processing module 1 .

Described universal communication interface (USCI) one embodiment is as shown in Figure 2, comprises UART receiving/SPI input pin (RXx/SOMIx) 1, SPI clock pin (CLKx) 2, reset pin/SPI enabling pin (Reset/ STEx) 3, power pin (VCCx) 4, UART send/SPI output pin (TXx/SIMOx) 5, ground pin (GND) 6, I2C serial data pin (SDA) 7, I2C serial clock pin (SCL) 8 , Multiple reserved control signal pins (Ctrlx_0, Ctrlx_1, Ctrlx_2, Ctrlx_3) 9, 10, 11, 12;

The UART/SPI multiplexing selector switch 7 has two states of 1 and 0;

Described protocol analysis processing module is used for according to the state of each UART/SPI multiplexing selector switch, to the data that each general communication interface of core baseboard receives, or the data that core baseplate sends to each general communication interface, according to UART (Universal Asynchronous Receiver /Transmitter, universal asynchronous transceiver), SPI (serial peripheral interface, serial peripheral interface) or I2C (Inter-Integrated Circuit, I2C bus) communication protocol for analysis and processing; and the response is packaged to conform to the corresponding application layer communication protocol Standard data packets;

When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed according to the UART communication protocol;

When the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis processing module sends the data of the UART sending/SPI output pin of the general communication interface to the core baseboard to package and process according to the SPI communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed according to the SPI communication protocol;

Regardless of the state of the UART/SPI multiplexing selection switch corresponding to a general communication interface, the protocol analysis processing module, after packaging the data sent to the I2C serial data pins of the general communication interface by the core chassis, according to the I2C communication protocol To send data, analyze and process the data received by the I2C serial data pin of the general communication interface according to the I2C communication protocol.

The core backplane may also include a plurality of analog input interfaces 6 , a power supply module 2 , a power detection module 3 , and a configuration information storage module 4 .

The analog input interface 6 is used to directly access the conditioned analog signal;

The power module 2 is used to supply power to the core backplane;

The power detection module 3 is used to provide system battery power information for the core chassis;

The configuration information storage module 4 is used to store the configuration information of the core backplane;

The interface conversion sub-module includes a sub-module universal communication interface adapted to the universal communication interface (USCI) of the core backplane, a dedicated interface, and the interface conversion sub-module of a certain type of dedicated interface is used for the The data of each type of special interface is converted into UART, SPI or I2C data, and output to the corresponding pin of the general communication interface of the sub-module, and the interface conversion sub-module communicates with the general communication of the core chassis through its general communication interface of the sub-module Interface communication, connected with the core backplane;

The sensor interface of the interface conversion sub-module can be UART, SPI, I2C, RS485, RS232, RS422, CAN, USB, TCP/IP or GPS and other interfaces.

Using the above wireless sensor network node controller to realize the sensor wireless network access method is as follows:

A sensor of a certain type of interface is connected to a general communication interface of a core chassis through an interface conversion submodule of this type of special interface, and the core chassis is connected to a gateway through another general communication interface through an interface conversion submodule of a wireless type special interface Sink node wireless communication;

The interface conversion sub-module includes a sub-module general communication interface adapted to the general communication interface of the core backplane, a special interface, and the interface conversion submodule of a certain type of special interface is used to use this type of special interface The data is converted into UART, SPI or I2C data, and output to the corresponding pin of the general communication interface of the sub-module;

The interface conversion sub-module of a certain type of special interface communicates with the sensor of this type of interface through its special interface, and communicates with the general communication interface of the core base plate through its sub-module general communication interface;

The core backplane includes multiple general communication interfaces, multiple UART/SPI multiplexing selection switches, and a protocol analysis and processing module;

The protocol analysis processing module, according to the state of each UART/SPI multiplexing selector switch, to the data received by each general communication interface of the core chassis, or the data sent to each general communication interface by the core chassis, according to the UART, SPI or I2C communication protocol process;

A general communication interface of the core base board communicates with a submodule general communication interface of an interface conversion submodule of a wireless type special interface, and wirelessly communicates with the gateway convergence node through the wireless type special interface of the wireless type special interface conversion submodule.

The general communication interface may include a UART receiving/SPI input pin, a UART sending/SPI output pin, an I2C serial data pin, and an I2C serial clock pin;

The UART/SPI multiplexing selector switch has two states of 1 and 0;

When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed after receiving according to the UART communication protocol; when the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis The processing module packs and processes the data sent by the core board to the UART sending/SPI output pin of the general communication interface, and then sends the data according to the SPI communication protocol, and the data received by the UART receiving/SPI input pin of the general communication interface follows the SPI communication protocol After receiving, analyze and process; no matter what the state of the UART/SPI multiplexing selector switch corresponding to a general communication interface is, the protocol analysis processing module packs the data of the I2C serial data pins sent to the general communication interface by the core backplane After processing, the data is sent according to the I2C communication protocol, and the data received by the I2C serial data pin of the general communication interface is analyzed and processed after being received according to the I2C communication protocol.

The general communication interface may also include an SPI clock pin, a reset pin/SPI enable pin, a power supply pin, a ground pin, and multiple reserved control signal pins.

The dedicated interface of the interface conversion sub-module is UART, SPI, I2C, RS485, RS232, RS422, CAN, USB, TCP/IP or GPS.

The core backplane may also include a plurality of analog input interfaces;

The multiple analog input interfaces are directly connected to conditioned analog signals.

The core backplane may also include a configuration information storage module;

The configuration information storage module stores the configuration information of the core backplane.

The core backplane may also include a power supply module and a power detection module;

The power supply module supplies power to the core backplane;

The power detection module provides system battery power information for the core chassis

A specific embodiment:

The wireless sensor network node controller includes a core base board and a wireless transceiver interface conversion sub-module shown in FIG. 3 , two RS485 interface conversion sub-modules shown in FIG. 4 , and a GPS interface conversion sub-module shown in FIG. 5 .

As the core board, choose TI's MSP430F5438 microcontroller, low power consumption, system clock up to 18MHz, internal phase-locked loop, 256KB FLASH, 16KB RAM; it integrates internal 12bitADC and 12 external analog channels, which can be directly connected to Input the adjusted analog signal; there are 4 universal communication interfaces (USCI) as shown in Figure 2, which support UART, SPI and I2C communication, and the pins support UART and SPI port multiplexing. If the universal communication interface (USCI) is controlled Programming can also expand more general communication interfaces. As shown in Figure 1, four UART/SPI multiplexing selection switches 6 correspond to four universal communication interfaces (USCI) in Figure 2 respectively, when a UART/SPI multiplexing selection switch is pulled to 0, corresponding to the UART The universal communication interface (USCI) of the /SPI multiplexing selection switch supports SPI and I2C interfaces. When a UART/SPI multiplexing selection switch is pulled to 1, it corresponds to the universal communication interface (USCI) of the UART/SPI multiplexing selection switch. UART and I2C interfaces are supported.

As shown in Figure 3, the wireless transceiver interface conversion sub-module adopts the low-power MCU-Si1000 (product of Silicon Labs) integrating 240-960MHz EZRadioPRO transceiver. The wireless transceiver interface conversion sub-module integrates the general communication interface of the sub-module , TCP/IP wireless dedicated interface, the wireless transceiver interface conversion submodule converts TCP/IP interface data into UART data, and outputs to the corresponding pin of the general communication interface of the submodule, the wireless transceiver interface conversion submodule passes its submodule The universal communication interface is connected to the universal communication interface (USCI) of the core chassis, using the UART communication protocol, and the UART receiving/SPI input pin (RXx/SOMIx) in the universal communication interface (USCI) of the core chassis shown in Figure 2 is connected to the wireless transceiver interface conversion The U_Tx signal of the sub-module, the UART transmission/SPI output pin (TXx/SIMOx) is connected to the wireless transceiver interface to convert the U_Rx signal of the sub-module, and the power pin (VCCx) and ground pin (GND) of the universal communication interface (USCI) of the core board are used To supply power to the wireless transceiver interface conversion sub-module, the UART baud rate is set to 9600, the data bit is 8 bits, and the stop bit is 1.

As shown in Figure 4, the RS485 interface conversion sub-module adopts TI's isolated two-wire RS485 data transceiver chip ISO15, which can realize the conversion between UART and half-duplex RS485 signals. The RS485 interface conversion sub-module integrates sub-modules General communication interface, RS485 dedicated interface, the RS485 interface conversion sub-module converts RS485 interface data into UART data, and outputs to the corresponding pin of the general communication interface of the sub-module, the RS485 interface conversion sub-module communicates with the general communication interface of its sub-module The universal communication interface (USCI) of the core chassis is connected, using the UART communication protocol. The UART receiving/SPI input pin (RXx/SOMIx) in the universal communication interface (USCI) of the core chassis shown in Figure 2 is connected to the U_Tx signal of the RS485 interface conversion sub-module , the UART sending/SPI output pin (TXx/SIMOx) is connected to the U_Rx signal of the RS485 interface conversion sub-module, and the power pin (VCCx) and ground pin (GND) of the universal communication interface (USCI) on the core board are used for the RS485 interface conversion sub-module The module is powered, the UART baud rate is set to 4800 according to the connected RS485 interface sensor, the data bit is 8 bits, and the stop bit is 1.

As shown in Figure 5, the GPS interface conversion sub-module adopts the L20GPS module of QUECTEL Company, which has high sensitivity and can quickly obtain satellite signals. The GPS interface conversion sub-module integrates the general communication interface of the sub-module and the dedicated GPS wireless interface. The conversion sub-module converts the GPS wireless interface data into UART data, and outputs them to the corresponding pins of the general communication interface of the sub-module, and the GPS interface conversion sub-module is connected to the universal communication interface (USCI) of the core baseboard through its general communication interface of the sub-module , using the UART communication protocol, the UART receiving/SPI input pin (RXx/SOMIx) in the core chassis universal communication interface (USCI) shown in Figure 2 is connected to the U_Tx signal of the GPS interface conversion sub-module, and the UART sending/SPI output pin (TXx/ SIMOx) is connected to the U_Rx signal of the GPS interface conversion sub-module, the power pin (VCCx) and ground pin (GND) of the universal communication interface (USCI) of the core board are used to supply power to the GPS interface conversion sub-module, and the UART baud rate is set to 4800 , 8 data bits, 1 stop bit, because the GPS interface conversion sub-module consumes a lot of power when it continues to work, the reset signal of the reset pin/SPI enable pin (Reset/STEx) of the universal communication interface (USCI) Used to wake up/sleep GPS interface conversion sub-module to reduce system power consumption.

In this embodiment, the core base board can be connected to two digital sensors with RS485 interface (such as digital gas sensors, meteorological instruments, etc.), 12 analog sensors with 4-20mA output, and one GPS signal. The interface conversion sub-module sends valid information to the gateway aggregation node.

The wireless sensor network node controller of the present invention adopts the combination mode of a core base plate and an interface conversion sub-module, is connected through a universal communication interface (USCI), and the core base plate and the interface conversion sub-module are independent. Each universal communication interface (USCI) on the core base board is compatible with SPI, UART and I2C. The SPI and UART pins can be multiplexed through the UART/SPI multiplexing selection switch, and the UART/SPI and I2C interface selection is realized by relying on the core base board. , while realizing the multiplexing of UART and SPI interface. The wireless sensor network node controller of the present invention, facing a variety of sensors with data interfaces, only needs to select the corresponding interface conversion sub-module to realize the conversion of different communication protocols, and then it can be directly applied to realize the reading of sensor data , which greatly improves the compatibility of the node controller, and the core base board does not need to set corresponding data interfaces for various interfaces of the sensor, which facilitates the miniaturization of the core base board and thus facilitates the miniaturization of the wireless sensor network node controller, and the interface The design of the conversion sub-module interface conversion does not involve complex processors, which greatly reduces the system development time and development difficulty of the entire node controller, and reduces the development cost.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the present invention. within the scope of protection.

Claims (15)

1. A wireless sensor network node controller, characterized in that, comprises a core base plate, a plurality of interface conversion submodules; The core base plate includes a plurality of general communication interfaces, a plurality of UART/SPI multiplexing selection switches, and a protocol analysis processing module; The protocol analysis processing module is used for according to the state of each UART/SPI multiplexing selector switch, the data received by each general communication interface of the core chassis, or the data sent to each general communication interface by the core chassis, according to UART, SPI or I2C communication protocols for processing; The interface conversion sub-module includes a sub-module general communication interface compatible with the general communication interface of the core backplane, and a dedicated interface. The interface conversion sub-module of a certain type of special interface is used for this type of dedicated The data of the interface is converted into UART, SPI or I2C data, and output to the corresponding pin of the general communication interface of the sub-module, and the interface conversion sub-module communicates with the general communication interface of the core chassis through its general communication interface of the sub-module; The general communication interface includes a UART receiving/SPI input pin, a UART sending/SPI output pin, an I2C serial data pin, and an I2C serial clock pin; The UART/SPI multiplexing selector switch has two states of 1 and 0; When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed after receiving according to the UART communication protocol; when the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis The processing module packs and processes the data sent by the core board to the UART sending/SPI output pin of the general communication interface, and then sends the data according to the SPI communication protocol, and the data received by the UART receiving/SPI input pin of the general communication interface follows the SPI communication protocol After receiving, analyze and process; no matter what the state of the UART/SPI multiplexing selector switch corresponding to a general communication interface is, the protocol analysis processing module packs the data of the I2C serial data pins sent to the general communication interface by the core backplane After processing, the data is sent according to the I2C communication protocol, and the data received by the I2C serial data pin of the general communication interface is analyzed and processed after being received according to the I2C communication protocol. 2. wireless sensor network node controller according to claim 1, is characterized in that, The general communication interface also includes an SPI clock pin, a reset pin/SPI enable pin, a power supply pin, a ground pin, and a plurality of reserved control signal pins. 3. wireless sensor network node controller according to claim 1, is characterized in that, The dedicated interface of the interface conversion sub-module is UART, SPI, I2C, RS485, RS232, RS422, CAN, USB, TCP/IP or GPS. 4. wireless sensor network node controller according to claim 1, is characterized in that, The core backplane also includes a plurality of analog input interfaces; The multiple analog input interfaces are used to directly access the conditioned analog signals. 5. wireless sensor network node controller according to claim 1, is characterized in that, The core backplane also includes a configuration information storage module; The configuration information storage module is used to store the configuration information of the core backplane. 6. wireless sensor network node controller according to claim 1, is characterized in that, The core backplane also includes a power supply module and a power detection module; The power module is used to supply power to the core backplane; The power detection module is used to provide system battery power information for the core backplane. 7. A core base plate, characterized in that, comprises a plurality of general communication interfaces, a plurality of UART/SPI multiplexing selection switches, and a protocol analysis processing module; The general communication interface includes a UART receiving/SPI input pin, a UART sending/SPI output pin, an I2C serial data pin, and an I2C serial clock pin; The UART/SPI multiplexing selector switch has two states of 1 and 0; When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed after receiving according to the UART communication protocol; when the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis The processing module packs and processes the data sent by the core board to the UART sending/SPI output pin of the general communication interface, and then sends the data according to the SPI communication protocol, and the data received by the UART receiving/SPI input pin of the general communication interface follows the SPI communication protocol After receiving, analyze and process; no matter what the state of the UART/SPI multiplexing selector switch corresponding to a general communication interface is, the protocol analysis processing module packs the data of the I2C serial data pins sent to the general communication interface by the core backplane After processing, the data is sent according to the I2C communication protocol, and the data received by the I2C serial data pin of the general communication interface is analyzed and processed after being received according to the I2C communication protocol. 8. The core base plate according to claim 7, characterized in that, The general communication interface also includes an SPI clock pin, a reset pin/SPI enable pin, a power supply pin, a ground pin, and a plurality of reserved control signal pins. 9. The core base plate according to claim 7, characterized in that, The core backplane also includes a plurality of analog input interfaces and a configuration information storage module; The analog input interface is used to directly access the conditioned analog signal; The configuration information storage module is used to store the configuration information of the core backplane. 10. A sensor wireless network access method, characterized in that, A sensor of a certain type of interface is connected to a general communication interface of a core chassis through an interface conversion submodule of this type of special interface, and the core chassis is connected to a gateway through another general communication interface through an interface conversion submodule of a wireless type special interface Sink node wireless communication; The interface conversion sub-module includes a sub-module general communication interface adapted to the general communication interface of the core backplane, a special interface, and the interface conversion submodule of a certain type of special interface is used to use this type of special interface The data is converted into UART, SPI or I2C data, and output to the corresponding pin of the general communication interface of the sub-module; The interface conversion sub-module of a certain type of special interface communicates with the sensor of this type of interface through its special interface, and communicates with the general communication interface of the core base plate through its sub-module general communication interface; The core backplane includes multiple general communication interfaces, multiple UART/SPI multiplexing selection switches, and a protocol analysis and processing module; The protocol analysis processing module, according to the state of each UART/SPI multiplexing selector switch, to the data received by each general communication interface of the core chassis, or the data sent to each general communication interface by the core chassis, according to the UART, SPI or I2C communication protocol process; A general communication interface of the core base board communicates with a submodule general communication interface of an interface conversion submodule of a wireless type special interface, and wirelessly communicates with the gateway convergence node through the wireless type special interface of the interface conversion submodule of the wireless type special interface; The general communication interface includes a UART receiving/SPI input pin, a UART sending/SPI output pin, an I2C serial data pin, and an I2C serial clock pin; The UART/SPI multiplexing selector switch has two states of 1 and 0; When the UART/SPI multiplexing selector switch corresponding to a general communication interface is 1, the protocol analysis processing module sends the data of the UART transmission/SPI output pin of the general communication interface to the core baseboard to package and process according to the UART communication The protocol sends data, and the data received by the general communication interface UART/SPI input pin is analyzed and processed after receiving according to the UART communication protocol; when the UART/SPI multiplexing selection switch corresponding to a general communication interface is 0, the protocol analysis The processing module packs and processes the data sent by the core board to the UART sending/SPI output pin of the general communication interface, and then sends the data according to the SPI communication protocol, and the data received by the UART receiving/SPI input pin of the general communication interface follows the SPI communication protocol After receiving, analyze and process; no matter what the state of the UART/SPI multiplexing selector switch corresponding to a general communication interface is, the protocol analysis processing module packs the data of the I2C serial data pins sent to the general communication interface by the core backplane After processing, the data is sent according to the I2C communication protocol, and the data received by the I2C serial data pin of the general communication interface is analyzed and processed after being received according to the I2C communication protocol. 11. The sensor wireless network access method according to claim 10, characterized in that, The general communication interface also includes an SPI clock pin, a reset pin/SPI enable pin, a power supply pin, a ground pin, and a plurality of reserved control signal pins. 12. The sensor wireless network access method according to claim 10, characterized in that, The dedicated interface of the interface conversion sub-module is UART, SPI, I2C, RS485, RS232, RS422, CAN, USB, TCP/IP or GPS. 13. The sensor wireless network access method according to claim 10, characterized in that, The core backplane also includes a plurality of analog input interfaces; The multiple analog input interfaces are directly connected to conditioned analog signals. 14. The sensor wireless network access method according to claim 10, characterized in that, The core backplane also includes a configuration information storage module; The configuration information storage module stores the configuration information of the core backplane. 15. The sensor wireless network access method according to claim 10, characterized in that, The core base plate also includes a power supply module and a power detection module; The power supply module supplies power to the core backplane; The power detection module provides system battery power information for the core backplane.