CN102541745A - Addressing method for data storage of microcontroller and microcontroller - Google Patents
Addressing method for data storage of microcontroller and microcontroller Download PDFInfo
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- CN102541745A CN102541745A CN2010106200145A CN201010620014A CN102541745A CN 102541745 A CN102541745 A CN 102541745A CN 2010106200145 A CN2010106200145 A CN 2010106200145A CN 201010620014 A CN201010620014 A CN 201010620014A CN 102541745 A CN102541745 A CN 102541745A
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Abstract
The invention provides an addressing method for a data storage of a microcontroller and a microcontroller. The method comprises the following steps of: decoding a command; obtaining a command operation code, an access enabling mark of a rapid data storage area and a low address value of a data storage area to be accessed, wherein the rapid data storage area is a continuous address space and at least comprises or is mapped with a special functional register; according to the enabling mark of the rapid data storage area, acquiring an address of the data storage area to be accessed; when the access enabling mark of the rapid data storage area indicates to access the rapid data storage area, combining a prestored high address value of the rapid data storage area, which is used as a high address value of the data storage area to be accessed, with the low address value of the data storage area to be accessed to obtain an address to be accessed. The microcontroller comprises an addressing circuit. The addressing circuit at least comprises a command decoding circuit and an address selecting circuit.
Description
Technical field
The present invention relates to the microcontroller field, relate in particular to a kind of addressing method and microcontroller of microcontroller data-carrier store.
Background technology
Microcontroller is that the major part with microcomputer is integrated in a single-chip microcomputer on the chip.Microcontroller is born in 20th century the mid-1970s, and through 20 years of development, its cost is more and more lower, and function is from strength to strength, this just make microcontroller application more and more widely.
The microcontroller of using at present has multiple, and Reduced Instruction Set Computer (ReducedInstruction Set Computer abbreviates RISC as) is a kind of microprocessor of carrying out less type computer instruction.Because carrying out each instruction type, computing machine all needs extra transistor and circuit component; Computer instruction set will make microprocessor complicated more greatly; Executable operations also can be slower; So RISC executable operations at faster speed for common microcontroller, per second is carried out 1,000,000 instructions approximately.The length of RISC instruction is single, is generally 2 bytes, has 8 (or 7) to be used for presentation directives's operational code in the middle of these 2 bytes, and remaining 8 (or 9) are used to represent the address of accesses data memory.
The data-carrier store of microcontroller is divided according to function, can be divided into general-purpose data register and special function register.Wherein, general-purpose data register can be used for the data or the state flag bit of storage instruction implementation; Special function register can be used for the operation of each functional module of control chip and the indication of running status.Data-carrier store quantity in the microcontroller is more, but the limited length of RISC instruction, but just determined that the scope of data-carrier store of RISC instruction directly address is less, be generally 256, maximum can reach 512.
In order to overcome the problems referred to above of RISC instruction, a kind of method of the data storer being carried out paging has been proposed in the prior art.For data-carrier store than large space, be that unit carries out paging with 128 usually, and special function register is evenly distributed in the first half address realm of several pages, as shown in Figure 1.Page address register is set, is used to select current page, the RISC instruction can be visited the data-carrier store in the current page scope.If the RISC instruction needs other pages of visit, must at first carry out the switching of the page through page address register.For guaranteeing all to conduct interviews, need page address register be mapped to each page to page address register at any page.
Utilizing above-mentioned prior art to carry out the process flow diagram of the addressing method of microcontroller data-carrier store can be as shown in Figure 2; To instruct and be stored in order register after from program storage, reading; Instruction decoding circuit is deciphered the instruction in the order register, resolves the required operation of instruction.Needs are carried out the instruction of data-carrier store write/read operation, extract the address of the data-carrier store that comprises in the order code, and be stored in the data memory addresses register.The high n position of the data memory addresses of storing in the data memory addresses register (n is the actual number of bits of page address register) expression needs the page at the data-carrier store place of visit, and the low m position of data memory addresses is formed in low m position.The high n position of extracting the data memory addresses of storing in the data memory addresses register writes page address register; Carry out the selection or the switching of the page, extract the low m position of the data memory addresses of storing in the data memory addresses register and carry out addressing at current page as the address of the data-carrier store of needs visit.
In realizing process of the present invention, the inventor finds to exist at least in the prior art following problem:
The special function register of visit does not belong to the corresponding current page of page address register if desired; Need to operate page address register earlier, make it switch to the required page after, just can carry out addressing, the visit of special function register; Because program needs the different special function register of frequent access usually; And needing a machine cycle to accomplish to writing at least of page address register, the visit special function register also needs a machine cycle at least, that is to say that prior art will accomplish once the special function register accessing operation of other pages; Need at least two machine cycles, cause executing efficiency lower.
Summary of the invention
The embodiment of the invention provides a kind of addressing method and microcontroller of microcontroller data-carrier store, and is complicated and then cause the low problem of microcontroller executing efficiency in order to the addressing program that solves data-carrier store in the prior art.
The embodiment of the invention provides a kind of addressing method of microcontroller data-carrier store, comprising:
Instruction is deciphered; Obtain instruction operation code, the access enabled sign in fast data store district and the low order address value of data storage area to be visited; Said fast data store district is a continuous address, wherein comprises at least or is mapped with special function register;
The address that obtains data storage area to be visited according to the access enabled sign in said fast data store district:
When the fast data store district is visited in the access enabled sign indication in said fast data store district; The high address in the said fast data store district that stores in advance is worth the high address value as data storage area to be visited; Low order address value in conjunction with said data storage area to be visited obtains address to be visited.
The embodiment of the invention provides a kind of microcontroller, comprises addressing circuit, and said addressing circuit comprises at least: instruction decoding circuit and addressing circuit;
Said instruction decoding circuit is deciphered instruction, the access enabled signal in output order operational code, fast data store district and the low address signal of data storage area to be visited; Said fast data store district is a continuous address, wherein comprises at least or is mapped with special function register;
Said addressing circuit is when the access enabled signal indication visit fast data store district in said fast data store district; The high address in the said fast data store district that stores in advance is worth the high-order address signal as data storage area to be visited; In conjunction with the low address signal of said data storage area to be visited, obtain address to be visited.
The addressing method and the microcontroller of the microcontroller data-carrier store that the embodiment of the invention provides; Be stored in continuous fast data store district, address through all special function registers with microcontroller; The low order address value that comprises the access enabled sign and the data-carrier store to be visited in instruction operation code, fast data store district in the instruction; Can carry out directly address to the arbitrary data storer in the fast data store district; Not limited by the data-carrier store paging of microcontroller, improved executing efficiency.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do one to the accompanying drawing of required use in embodiment or the description of the Prior Art below introduces simply; Obviously, the accompanying drawing in describing below is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The synoptic diagram that data storer carried out paging of Fig. 1 for providing in the prior art;
Fig. 2 is the addressing method process flow diagram of microcontroller data-carrier store in the prior art;
Fig. 3 is the synoptic diagram in the fast data store district of microcontroller data-carrier store of the present invention;
Fig. 4 is the process flow diagram of the addressing method embodiment of microcontroller data-carrier store of the present invention;
Fig. 5 obtains circuit diagram for the address of microcontroller data-carrier store of the present invention;
Fig. 6 is the structural representation of microcontroller embodiment of the present invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer; To combine the accompanying drawing in the embodiment of the invention below; Technical scheme in the embodiment of the invention is carried out clear, intactly description; Obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
The invention provides a kind of addressing method of microcontroller data-carrier store; This addressing method can not carry out the visit that page operation just can be accomplished data-carrier store to page address register; Can in a machine cycle, accomplish visit the soonest; Improve executing efficiency, and reduced by an instruction code at least, saved program's memory space.
Before the addressing of carrying out data-carrier store, preliminary work comprises:
Whole special function registers of microprocessor are stored in the continuous address, this part continuous address is referred to as the fast data store district.This part continuous address also is appreciated that to be a page, if all the number deficiency of special function register also can be stored in the part general-purpose data register in this part continuous address to constitute a page.As shown in Figure 3, the address location total number of supposing the fast data store district is j, and the number of the special function register in the fast data store district is k, and the number of the general-purpose data register in the fast data store district is t.Difference after wherein numerical value t can not surpass numerical value j and numerical value k and subtracts each other, i.e. t≤j-k.Other general-purpose data register still can be according to visiting after the paging in the prior art.
Fig. 4 is the process flow diagram of the addressing method embodiment of microcontroller data-carrier store of the present invention, and this method comprises:
Step 401: will instruct from program storage, read after, be stored in order register.
Need to prove; Instruction described in the step 401 and RISC of the prior art instruction are distinguishing; Concrete difference is: the instruction in the step 401 is made up of the low m bit address of the access enabled sign in instruction operation code and fast data store district and data-carrier store to be visited, and this instruction can have multiple different coding implementation.Wherein, the type of the instruction operation code instruction manipulation that is used to represent that this instruction will be carried out; Whether the access enabled sign in fast data store district is used for expression and the fast data store district is conducted interviews and enable; The low m bit address of data storage area to be visited is used to represent direct low m bit address corresponding to data storage area to be visited.
For the access enabled sign in fast data store district be appreciated that for: when this access enabled is masked as 1, this instruction access fast data store district; When this access enabled was masked as 0, the fast data store district was not visited in this instruction, visit be the data-carrier stores in the middle of other pages.Can certainly do like this: when this access enabled is masked as 0, this instruction access fast data store district; When this access enabled was masked as 1, the fast data store district was not visited in this instruction.Above-mentioned dual mode all is allowed to.Present embodiment is only given an example with binary mode, but not in order to limit the concrete numerical value of this enabler flags.
Step 402: instruction decoding circuit is deciphered the instruction in the order register, confirms the operation that instruction will be carried out according to the instruction operation code in the instruction;
Step 403: the access enabled sign according to the fast data store district in the instruction determines whether to visit the fast data store district.
Step 404: if the access enabled sign in the fast data store district in instruction representative visit fast data store district; With the high n bit address of the high n of the fast data store regional address position of storing in advance as data storage area to be visited; Low m bit address in conjunction with data storage area to be visited; Obtain the address (amounting to the n+m position) of data storage area to be visited, this data memory area address is conducted interviews, operate according to instruction operation code according to this address.
This visit and page address register are irrelevant; Can directly have access to the address location in the fast data store district; Can in a machine cycle, accomplish visit the soonest; Improve executing efficiency, and reduced an instruction code (to the operational order code of page address register) at least, saved program's memory space.
Concrete, the address of microcontroller data-carrier store of the present invention obtains circuit diagram can be as shown in Figure 5.Wherein, addressing circuit is the multichannel address selector, produces the high n position of data memory area address.Access enabled through the fast data store district is selected.When the access enabled in fast data store district when being effective, select the high n of fast data store regional address position, otherwise, select the high n of other data memory area addresses position.N wherein is the actual number of bits of page address register, can be for more than or equal to 1, and the positive integer smaller or equal to 8.Accordingly, according to prior art, m+n can be 16, but the concrete numerical value of m, n is not limited in the above-mentioned concrete numerical value.
Need to prove; The general-purpose data register that is stored in the fast data store district also can be realized visiting so quickly and easily, and the user can be stored in frequent data or the state flag bit of operation in the execution process instruction in the general-purpose data register in fast data store district.
The addressing method of the microcontroller data-carrier store that present embodiment provides; Be stored in continuous fast data store district, address through all special function registers with microcontroller; The low m bit address that comprises the access enabled sign and the data storage area to be visited in instruction operation code, fast data store district in the instruction; Can carry out directly address to the arbitrary data storer in the fast data store district, not limited by the data-carrier store paging of microcontroller, improve executing efficiency.
The embodiment of the invention also provides a kind of microcontroller, and this microcontroller is the specific executive agent of the addressing method of above-mentioned data-carrier store, so can method embodiment all be quoted from the present embodiment.As shown in Figure 6, the microcontroller that present embodiment provides comprises an addressing circuit, and this addressing circuit comprises: instruction decoding circuit 601 and addressing circuit 602; Wherein, 601 pairs of instructions of instruction decoding circuit are deciphered, the access enabled signal in output order operational code, fast data store district and the low address signal of data storage area to be visited; This fast data store district is a continuous address, wherein comprises at least or is mapped with special function register; Addressing circuit 602 is when the access enabled signal indication visit fast data store district in fast data store district; The high address in the fast data store district that stores in advance is worth the high-order address signal as data storage area to be visited; In conjunction with the low address signal of data storage area to be visited, obtain address to be visited.
This addressing circuit can also comprise: page address register and address decoding circuitry; This address decoding circuitry is when other data storage areas of access enabled signal indication visit in fast data store district; From page address register, read the page at place, data storage area to be visited; And export the high-order address signal of data storage area to be visited according to the page at place, data storage area to be visited; The high-order address signal of the data storage area to be visited that addressing circuit 602 obtains address decoding circuitry combines the low address signal of data storage area to be visited, obtains address to be visited.
Related fast data store district is a continuous address in the present embodiment, wherein stores whole special function registers of microcontroller.If this continuous address is not filled up by whole special function registers, can also the part general-purpose data register be stored in the fast data store district.Need to prove that the quantity of general-purpose data register should be greater than the difference of the total quantity of the total quantity of the address location in fast data store district and special function register in the fast data store district.
The microcontroller that present embodiment provides; Be stored in continuous fast data store district, address through all special function registers with microcontroller; Comprise the enabler flags in instruction operation code, fast data store district and the low m bit address of data storage area to be visited in the instruction; Can carry out directly address to the arbitrary data storer in the fast data store district, not limited by the data-carrier store paging of microcontroller, improve executing efficiency.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can be accomplished through the relevant hardware of programmed instruction; Aforesaid program can be stored in the computer read/write memory medium; This program the step that comprises said method embodiment when carrying out; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CD.
What should explain at last is: above embodiment is only in order to explaining technical scheme of the present invention, but not to its restriction; Although with reference to previous embodiment the present invention has been carried out detailed explanation, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these are revised or replacement, do not make the spirit and the scope of the essence disengaging various embodiments of the present invention technical scheme of relevant art scheme.
Claims (5)
1. the addressing method of a microcontroller data-carrier store is characterized in that: comprising:
Instruction is deciphered; Obtain instruction operation code, the access enabled sign in fast data store district and the low order address value of data storage area to be visited; Said fast data store district is a continuous address, wherein comprises at least or is mapped with special function register;
The address that obtains data storage area to be visited according to the access enabled sign in said fast data store district:
When the fast data store district is visited in the access enabled sign indication in said fast data store district; The high address in the said fast data store district that stores in advance is worth the high address value as data storage area to be visited; Low order address value in conjunction with said data storage area to be visited obtains address to be visited.
2. the addressing method of microcontroller data-carrier store according to claim 1 is characterized in that:
Said method also comprises:
When other data storage areas are visited in the access enabled sign indication in said fast data store district; From page address register, obtain the page at place, data storage area to be visited; Obtain the high address value of data storage area to be visited through address decoding circuitry; Low order address value in conjunction with said data storage area to be visited obtains address to be visited.
3. a microcontroller comprises addressing circuit, it is characterized in that:
Said addressing circuit comprises at least: instruction decoding circuit and addressing circuit;
Said instruction decoding circuit is deciphered instruction, the access enabled signal in output order operational code, fast data store district and the low address signal of data storage area to be visited; Said fast data store district is a continuous address, wherein comprises at least or is mapped with special function register;
Said addressing circuit is when the access enabled signal indication visit fast data store district in said fast data store district; The high address in the said fast data store district that stores in advance is worth the high-order address signal as data storage area to be visited; In conjunction with the low address signal of said data storage area to be visited, obtain address to be visited.
4. microcontroller according to claim 3 is characterized in that:
Said addressing circuit also comprises: page address register and address decoding circuitry;
Said address decoding circuitry is when other data storage areas of access enabled signal indication visit in said fast data store district; From said page address register, read the page at place, data storage area to be visited; And export the high-order address signal of said data storage area to be visited according to the page at place, said data storage area to be visited; The high-order address signal of the data storage area to be visited that said addressing circuit obtains said address decoding circuitry combines the low address signal of said data storage area to be visited, obtains address to be visited.
5. microcontroller according to claim 3 is characterized in that:
The general-purpose register that also comprises or be mapped with said microcontroller in the said fast data store district, the quantity of said general-purpose register are less than or equal to the difference of total quantity of total quantity and said special function register of the address location in said fast data store district.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106325766A (en) * | 2015-06-30 | 2017-01-11 | 伊姆西公司 | Dynamic elasticity in flash acceleration layer |
| CN106469118A (en) * | 2015-08-19 | 2017-03-01 | 深圳市博巨兴实业发展有限公司 | A kind of memorizer Memory Allocation access method and device |
| CN109116972A (en) * | 2017-06-23 | 2019-01-01 | 三垦电气株式会社 | microcomputer |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4722047A (en) * | 1985-08-29 | 1988-01-26 | Ncr Corporation | Prefetch circuit and associated method for operation with a virtual command emulator |
| US6189077B1 (en) * | 1994-12-15 | 2001-02-13 | Texas Instruments Incorporated | Two computer access circuit using address translation into common register file |
| CN1719421A (en) * | 2005-07-28 | 2006-01-11 | 上海大学 | Addressing space extending method of 16M syllable data storage based on MCS-51 structure |
| CN101071410A (en) * | 2006-05-09 | 2007-11-14 | 飞思卡尔半导体公司 | Microcontroller unit |
| US20100205345A1 (en) * | 2009-02-11 | 2010-08-12 | Microchip Technology Incorporated | Microcontroller with linear memory access in a banked memory |
-
2010
- 2010-12-31 CN CN201010620014.5A patent/CN102541745B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4722047A (en) * | 1985-08-29 | 1988-01-26 | Ncr Corporation | Prefetch circuit and associated method for operation with a virtual command emulator |
| US6189077B1 (en) * | 1994-12-15 | 2001-02-13 | Texas Instruments Incorporated | Two computer access circuit using address translation into common register file |
| CN1719421A (en) * | 2005-07-28 | 2006-01-11 | 上海大学 | Addressing space extending method of 16M syllable data storage based on MCS-51 structure |
| CN101071410A (en) * | 2006-05-09 | 2007-11-14 | 飞思卡尔半导体公司 | Microcontroller unit |
| US20100205345A1 (en) * | 2009-02-11 | 2010-08-12 | Microchip Technology Incorporated | Microcontroller with linear memory access in a banked memory |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106325766A (en) * | 2015-06-30 | 2017-01-11 | 伊姆西公司 | Dynamic elasticity in flash acceleration layer |
| CN106325766B (en) * | 2015-06-30 | 2019-10-18 | 伊姆西公司 | Dynamic elasticity in flash acceleration layer |
| CN106469118A (en) * | 2015-08-19 | 2017-03-01 | 深圳市博巨兴实业发展有限公司 | A kind of memorizer Memory Allocation access method and device |
| CN106469118B (en) * | 2015-08-19 | 2019-08-13 | 深圳市博巨兴实业发展有限公司 | A kind of memory Memory Allocation access method and device |
| CN109116972A (en) * | 2017-06-23 | 2019-01-01 | 三垦电气株式会社 | microcomputer |
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