CN102468134B - Method for adjusting chip graph density using redundancy graph insertion, - Google Patents
Method for adjusting chip graph density using redundancy graph insertion, Download PDFInfo
- Publication number
- CN102468134B CN102468134B CN201010545835.7A CN201010545835A CN102468134B CN 102468134 B CN102468134 B CN 102468134B CN 201010545835 A CN201010545835 A CN 201010545835A CN 102468134 B CN102468134 B CN 102468134B
- Authority
- CN
- China
- Prior art keywords
- pattern
- density value
- pattern density
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The invention discloses a method for adjusting graph density of a chip using redundancy graph filling, comprising the following steps: obtaining a fillable area in a certain graph layer of chip preparation; presetting a group of filling graphs with different graph densities; equivalently dividing into a plurality of small areas, and setting the graph density of the layer after filling, the minimal graph density value, the maximal graph density value of the small areas and the maximal graph density difference value between two adjacent small areas; calculating the initial graph density value of each small area; calculating the graph density value of the small area after filled with filling graph with maximal graph density; adjusting the graph density of each small area adopting virtual graph filling method; and filling the fillable areas of each small area to enable the graph density value of the filled small area to be close to the graph density value adjusted by Step (6). With the method, the uniformity of the graph densities of partial areas filled is improved.
Description
Technical field
The present invention relates to a kind of method of utilizing redundant pattern to fill to adjust graphics chip density.
Background technology
Along with the continuous progress of integrated circuit processing technique, especially, after 0.13 micron of technique, the live width of silicon technology has all been less than the wavelength length of exposure, makes the stability of technique more and more difficult.At the spin-off effects that just starts to consider technique early stage of design, produce thus the rule of a lot of manufacturability designs (DFM, Design for Manufacturability).As, pattern density (Pattern Density) homogeneity in silicon chip is good, and the otherness of local pattern density is less, less for the impact of macroscopical load of cmp and etching.
Macroscopical load (Macro Loading) for cmp (CMP, Chemical Mechanical Polarization) technique and etching all has a significant impact.For the homogeneity that improves CMP and grind, very general of the insertion technology of redundant pattern.At present, the fill rule of the general redundant pattern adopting is: first set the fill area slightly far away with graphics chip, a kind of pattern filling is inserted; Reset another fill area, another kind of pattern filling is inserted; Fill so several demands that planarization is adjusted of taking turns to reach.But shortcoming may be the region that original pattern density is not high, after having filled virtual pattern around, the variation of pattern density is larger.Carry out respectively the insertion of redundant pattern for every region, but do not consider the pattern density value in region around, this piece region, only consider whether the pattern density in current this piece region satisfies condition, therefore, in regional area, the difference of pattern density may be very large.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of method of utilizing redundant pattern to fill to adjust pattern density, and it can improve the homogeneity of pattern density better.
For solving the problems of the technologies described above, the method for utilizing redundant pattern to fill to adjust pattern density of the present invention, comprises the steps:
(1), according to fill rule, what obtain certain figure layer in chip preparation can fill area;
(2) pattern filling that a default block graphics density does not wait;
(3) this figure layer is divided into multiple pockets, and according to technological requirement, be set in the pattern density value requirement of this figure layer after having filled, the maximum pattern density difference between the minimum figure density value of pocket, maximum pattern density value and adjacent two pockets;
(4) calculate the initial pattern density value (CD0) of above-mentioned each pocket;
(5) calculate above-mentioned each pocket can fill area in, insert the pattern density value (CM) of the pocket after the pattern filling of the pattern density maximum described in step (2);
(6) according to the pattern density difference between the pattern density value of the each pocket calculating in the pattern density value of the each pocket calculating in step (4), step (5) and both, the method that adopts virtual pattern to fill is adjusted the pattern density of each pocket successively, before and after making, the pattern density difference of each pocket is less than predetermined value after twice adjustment, and in the scope that sets in step (3) of the final pattern density value of whole figure layer;
(7), with default pattern filling in step (2), to can fill fill area in each pocket, make to fill the pattern density value of rear pocket and pattern density numerical value that step (6) adjusts the most approaching.
Adopt the method for utilizing redundant pattern to adjust the pattern density of figure layer of the present invention, the pattern density problem of non-uniform that can effectively avoid the insertion of pattern filling to cause, improves the homogeneity of regional area pattern density better.
Brief description of the drawings
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 is the schematic diagram that in method of the present invention, cutting is pocket;
Fig. 2 is the method flow diagram that utilizes redundant pattern to fill to adjust graphics chip density of the present invention;
Fig. 3 and Fig. 4 are that pattern density of the present invention is adjusted schematic diagram.
Embodiment
Method of the present invention, for being about to carry out the figure layer of CMP technique or etching technics, designing have the pattern filling scheme of predetermined pattern density, then copies this design be fabricated in current layer, then carries out CMP technique or etching technics.The method of utilizing redundant pattern to fill to adjust graphics chip density of the present invention, comprises the steps (seeing Fig. 2):
(1), according to fill rule, what obtain certain figure layer (being that figure layer that need to carry out redundant pattern filling, as polysilicon layer) in chip preparation can fill area.Because the insertion of redundant pattern may have impact to the electric property of chip, therefore can fill area and be not equal to the white space of current layer, be conventionally less than the white space of current layer.Fill rule is the electric property that the insertion of pattern filling can not affect prepared chip, and this is to fill most important principle in redundant pattern.The redundant pattern of for example polysilicon layer (POLY) can not superpose mutually with the figure of active area (AA).In semiconductor industry, conventionally the impact on electric signal transmission after the insertion of redundant pattern is less than to 5% standard of inserting as redundant pattern.In concrete enforcement, this can provide by the form of figure layer (layout) fill area.Identical with existing fill method of this step.
(2) pattern filling that a default block graphics density does not wait.The basic configuration of pattern filling is generally rectangle.In a concrete example, single pattern filling is the rectangle of 1*1 μ m, and the spacing between single pattern filling and filling can be set as different value (as 1 μ m, 2 μ m, 3 μ m etc.), forms the pattern filling that a block graphics density does not wait.At different process nodes, different levels, the pattern density value range of choice of pattern filling is not etc.As pattern filling is less, figure is more intensive, and the numerical value of pattern density is just higher so.
(3) this figure layer is divided into multiple pockets, and according to technological requirement, set the pattern density value of this figure layer after having filled, the maximum pattern density difference (GRA) between minimum figure density value (MIN), maximum pattern density value (MAX) and adjacent two pockets after pocket has been filled; In cutting, can also be assigned to accordingly in each pocket fill area, become in pocket can fill area.
Because the minimum figure density value of certain figure layer and maximum pattern density are known numerical value in whole chip, the minimum shape density value of above-mentioned pocket can subtract a value by the minimum figure density value at this figure layer, and adds a value in the maximum pattern density value of this figure layer and set.20%～50% of the minimum figure density value of the numerical value that this adds or desirable this figure layer of the numerical value cutting and maximum pattern density value, the minimum figure density value that is pocket be this figure layer minimum figure density value 50%～80% between numerical value, and maximum pattern density value be this figure layer maximum pattern density value 120%～150% between numerical value.
(4) calculate the pattern density value (CD0) before each pocket is filled, i.e. initial graphics density value;
(5) calculate each pocket can fill area in, insert the pattern density value (CM, Current Max) of the pocket after the pattern filling of pattern density maximum;
(6) adjust successively the pattern density value of each pocket, by CD0, CM, this pocket, around CD, MAX and the GRA of pocket determine the pattern density value of this pocket jointly, the method that adopts virtual pattern to fill is adjusted the pattern density of pocket successively, makes in scope that the final graphics density value of this figure layer sets in step (3).
(7), with the different pattern filling of predefined that block graphics density, by can filling fill area of each pocket, obtain pattern density and the immediate pattern filling layout of pattern density numerical value of calculating.
Before corresponding CMP technique or etching technics, this pattern filling layout is copied on this figure layer, and be produced in corresponding rete afterwards.Adopt the method for adjustment pattern density of the present invention, the local pattern density problem of non-uniform that can effectively avoid the insertion of pattern filling to cause, improves the homogeneity of pattern density better, optimizes corresponding PROCESS FOR TREATMENT effect.
One specific embodiment is described below:
(1), according to fill rule, what draw the figure layer that will fill can fill area;
(2) the different pattern filling of design one block graphics density;
(3) whole silicon chip is cut into the pocket (seeing Fig. 1) of the homalographic of 5X5.According to concrete technology requirement, the figure of the present embodiment Wei Hou road metal level, after setting completes, the pattern density value of this figure layer must meet 35%～60%, the pattern density of each pocket meets minimum figure density value MIN=20%, maximum pattern density value MAX=70%, the maximum pattern density difference GRA=20% between pocket;
In above-mentioned setting, and maximum pattern density difference GRA between pocket can get the minimum figure density value of pocket and maximum pattern density value difference 1/5～1/2.In concrete enforcement, after cutting, do not meet and be less than or equal to MIN value if any the pattern density value that is greater than 5% pocket, or be greater than this condition of MAX value, can again be cut into the pocket of larger size, also can directly carry out pattern density optimization.
(4) calculate the pattern density CD0 before each pocket is filled;
(5) calculate the pattern density CM of the pocket after the pattern filling of can fill area inserting the pattern density maximum described in step (2) of each pocket; (seeing Fig. 3)
(6) according to the pattern density difference between the pattern density value (CM) of the each pocket calculating in the pattern density value (CD0) of the each pocket calculating in step (4), step (5) and both, the method that adopts virtual pattern to fill is adjusted the pattern density of each pocket successively, before and after making, the difference of the pattern density of each pocket is less than predetermined value after twice adjustment, and in the scope that sets in step (3) of the final graphics density of whole figure layer; The method of adjustment of a concrete virtual pattern filling is:
1) the initial graphics density value CD0 of pocket does not need to adjust the pattern density of this pocket under following situations: while not filling virtual pattern, the CD0 of this pocket is more than or equal to the maximum pattern density value MAX setting; Fill after virtual pattern the CD=CM of this pocket.
2) pocket that is more than or equal to the maximum pattern density value of the pocket that sets MAX for the initial graphics density value CD0 of pocket pocket around, by this around the pattern density of pocket be adjusted into that less pattern density numerical value in the CM value of corresponding pocket and (CD0-GRA) value of this pocket;
3) keep pattern density to equal the pocket of CM; Calculate the mean value of this pocket pocket pattern density around, the difference between the mean value calculating and CM value, and the difference of the pattern density of each pocket and initial graphics density.
In this example, around fritter has only been got four pockets up and down that are positioned at this pocket.In practice, also can consider the fritter of tilted direction.Can adjust by following rule: while filling virtual pattern, the CD0 of this pocket must meet <=CM; While filling virtual pattern, the CD of this pocket deducts the poor <=GRA of CD of pocket around; Fill when virtual pattern, the CD of this pocket is the mean value of the pattern density of pocket around;
According to the set-up procedure that repeatedly circulates, the pattern density value that makes this pocket is the difference sum minimum of the pattern density of pocket around, can ensure that like this homogeneity of entirety in figure layer is higher, the pattern density difference minimum between part;
Adopt in the method for the invention the pattern density mean value of surrounding's pocket of certain pocket, and through the adjustment that repeatedly circulates, because the pattern density of these pockets is interactional, first pocket of for example first adjusting is not considered the pattern density of the final pocket of second, calculate it around when the mean value of the density of fritter, what use does not still consider the pattern density in second region of fritter pattern density around, therefore need the adjustment that repeatedly circulates, to reach the object of regional area pattern density difference minimum.
4) pattern density of the pocket that is negative value by (CM-CD) value is adjusted into CM, and (CD1-CD0), for the fritter pattern density of negative value is adjusted into CD0, wherein CD1 is the pattern density value of this pocket after adjusting for the first time;
5) circulate above-mentioned 3) and 4) step, take turns adjustment through 5, (CD5-CD4) changing value is less than or equal to predefined value, and (wherein CD5 is the pattern density value of the pocket after adjusting for the 5th time, CD4 is the pattern density value of the pocket after adjusting for the 4th time), finish to adjust (seeing Fig. 4); This predefined value can be 1 or 2, and this specification can be determined according to technological requirement.This changing value is less, and the internal homogeneity of pattern density is better.
7) calculating is taken turns after adjustment through 5, and the pattern density value of this figure layer is 49.13%, and scope meets the demands.
(7) with the different pattern filling of predefined that block graphics density in step (2), to can filling fill area of each pocket, obtaining the rear final immediate figure of pattern density numerical value of pattern density and step (6) adjustment is final pattern filling.The layout of this pattern filling is copied and is prepared in corresponding figure layer afterwards, optimize ensuing CMP technique or etching technics treatment effect with this.
In said method, the calculating of pattern density value can adopt existing conventional method, as utilizes eda tool, the calibre of Mentor etc.
Claims (5)
1. utilize redundant pattern to fill to adjust a method for graphics chip density, it is characterized in that, comprise the steps:
(1), according to fill rule, what obtain certain figure layer in chip preparation can fill area;
(2) pattern filling that a default block graphics density does not wait;
(3) described figure layer is divided into multiple pockets, according to technological requirement, be set in the pattern density requirement of having filled rear described figure layer, the maximum pattern density difference (GRA) between the minimum figure density value of described pocket, maximum pattern density value and adjacent two pockets;
(4) calculate the initial pattern density value (CD0) of above-mentioned each pocket;
(5) calculate above-mentioned each pocket can fill area in, insert the pattern density value (CM) of the pocket after the pattern filling of the pattern density maximum setting in step (2);
(6) according to the pattern density difference between the pattern density value (CM) of the each pocket calculating in the pattern density value (CD0) of the each pocket calculating in step (4), step (5) and both, the method that adopts virtual pattern to fill is adjusted the pattern density of each pocket successively, before and after making, the difference of the pattern density of each pocket is less than predetermined value after twice adjustment, and in the scope that sets in step (3) of whole figure layer final graphics density;
(7), with default pattern filling in step (2), to can fill fill area in each pocket, make to fill the pattern density value of rear pocket and pattern density value that step (6) adjusts the most approaching.
2. in accordance with the method for claim 1, it is characterized in that, the virtual pattern fill method of described step (6) is:
When not filling virtual pattern, the initial pattern density value (CD0) of pocket equals in described pocket can fill area to insert the pattern density value (CM) after the pattern filling of pattern density maximum, be more than or equal to the maximum pattern density value of the pocket setting with pocket initial pattern density value (CD0), keep the initial pattern density value of this pocket;
The pocket that is more than or equal to the maximum pattern density value of the pocket that sets for initial graphics density value pocket around, by the pattern density value of described pocket be around adjusted into corresponding pocket can fill area in insert the initial graphics density value of pattern density value (CM) after the pattern filling of pattern density maximum and described pocket and adjacent two pockets of setting between maximum pattern density difference (CD0-GRA) in less that numerical value;
Fill when virtual pattern, the pattern density value of this pocket must meet be less than or equal to described pocket can fill area in insert the pattern density value (CM) after the pattern filling of pattern density maximum; While filling virtual pattern, the difference that the pattern density value of this pocket deducts the pattern density value of its pocket is around less than or equal to the maximum pattern density difference (GRA) between adjacent two pockets that set; While filling virtual pattern, the pattern density value of this pocket is the mean value of the pattern density value of its pocket around;
By described pocket can fill area in the pattern density value of difference (CM-CD) value of pattern density value of pattern density value while inserting the pattern filling of pattern density maximum and the described pocket while the adjusting pocket that is negative value be adjusted into this pocket can fill area in pattern density value (CM) while inserting the pattern filling of pattern density maximum, the pattern density value of the described pocket that is negative value by the difference (CDn-CD0) of the pattern density value (CDn) of pocket after adjusting and the initial graphics density value of this pocket is adjusted into initial graphics density value.
3. according to the method described in claim 1 or 2, it is characterized in that: in described step (3), in pocket after decile, need the pattern density value that meets the pocket that is more than or equal to 95% to be less than or equal to the minimum figure density value of the pocket setting, or be greater than the maximum pattern density value of the pocket setting.
4. according to the method described in claim 1 or 2, it is characterized in that: in described step (3), 1/5～1/2 of the minimum figure density value of pocket that maximum pattern density difference between adjacent two pockets is set as setting and the difference of maximum pattern density value, the minimum figure density value of described pocket be made as this figure layer minimum figure density value 50%～80% between numerical value, and the maximum pattern density value of pocket be made as this figure layer maximum pattern density value 120%～150% between numerical value.
5. in accordance with the method for claim 3, it is characterized in that: in described step (3), 1/5～1/2 of the minimum figure density value of pocket that maximum pattern density difference between adjacent two pockets is set as setting and the difference of maximum pattern density value, the minimum figure density value of described pocket be made as this figure layer minimum figure density value 50%～80% between numerical value, and the maximum pattern density value of pocket be made as this figure layer maximum pattern density value 120%～150% between numerical value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010545835.7A CN102468134B (en) | 2010-11-16 | 2010-11-16 | Method for adjusting chip graph density using redundancy graph insertion, |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010545835.7A CN102468134B (en) | 2010-11-16 | 2010-11-16 | Method for adjusting chip graph density using redundancy graph insertion, |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102468134A CN102468134A (en) | 2012-05-23 |
| CN102468134B true CN102468134B (en) | 2014-07-09 |
Family
ID=46071623
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010545835.7A Active CN102468134B (en) | 2010-11-16 | 2010-11-16 | Method for adjusting chip graph density using redundancy graph insertion, |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102468134B (en) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102945302A (en) * | 2012-11-02 | 2013-02-27 | 上海华力微电子有限公司 | Method for dividing high-filling-rate redundant graph |
| CN103853854B (en) * | 2012-11-28 | 2017-02-15 | 上海华虹宏力半导体制造有限公司 | Method for inserting filling graphs in map |
| CN103400014A (en) * | 2013-08-14 | 2013-11-20 | 上海华力微电子有限公司 | Method for improving filling rate of redundant figures in long and narrow zone |
| CN103514617A (en) * | 2013-10-18 | 2014-01-15 | 上海华力微电子有限公司 | Method for improving redundancy graph filling rate in long and narrow area |
| CN103902789A (en) * | 2014-04-22 | 2014-07-02 | 上海华力微电子有限公司 | Filling method of redundant graphs |
| CN104239612B (en) * | 2014-08-27 | 2020-06-09 | 上海华力微电子有限公司 | Method for improving laser annealing heat distribution |
| CN104766785A (en) * | 2015-03-31 | 2015-07-08 | 上海华力微电子有限公司 | Polycrystalline silicon surface deposition area adjusting method |
| CN106096087B (en) * | 2016-05-31 | 2019-08-13 | 上海华虹宏力半导体制造有限公司 | Capture filling graph method |
| CN110378073A (en) * | 2019-08-15 | 2019-10-25 | 德淮半导体有限公司 | Domain modification method and device |
| CN110750952B (en) * | 2019-10-16 | 2024-02-02 | 上海华虹宏力半导体制造有限公司 | Semiconductor layout and layout method of semiconductor layout |
| CN111125992A (en) * | 2019-12-26 | 2020-05-08 | 上海华虹宏力半导体制造有限公司 | Filling method of redundant metal |
| CN113312873B (en) * | 2021-05-24 | 2023-03-14 | 海光信息技术股份有限公司 | Circuit layout design method and device, mask plate and electronic equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1445604A (en) * | 2002-03-20 | 2003-10-01 | 张国飙 | Low cost photo etching technique |
| CN101231667A (en) * | 2007-01-22 | 2008-07-30 | 台湾积体电路制造股份有限公司 | Method of filling redundancy for semiconductor manufacturing process and semiconductor device |
| CN101750877A (en) * | 2008-12-22 | 2010-06-23 | 中芯国际集成电路制造(上海)有限公司 | Method of determining graphic outer contour for optical proximity correction |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7408999B2 (en) * | 2004-12-09 | 2008-08-05 | Conexant Systems, Inc. | Method and system for dynamic interleaver adaptation scheme in VDSL |
-
2010
- 2010-11-16 CN CN201010545835.7A patent/CN102468134B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1445604A (en) * | 2002-03-20 | 2003-10-01 | 张国飙 | Low cost photo etching technique |
| CN101231667A (en) * | 2007-01-22 | 2008-07-30 | 台湾积体电路制造股份有限公司 | Method of filling redundancy for semiconductor manufacturing process and semiconductor device |
| CN101750877A (en) * | 2008-12-22 | 2010-06-23 | 中芯国际集成电路制造(上海)有限公司 | Method of determining graphic outer contour for optical proximity correction |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102468134A (en) | 2012-05-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102468134B (en) | Method for adjusting chip graph density using redundancy graph insertion, | |
| US7900177B2 (en) | Method of processing dummy pattern based on boundary length and density of wiring pattern, semiconductor design apparatus and semiconductor device | |
| US8816444B2 (en) | System and methods for converting planar design to FinFET design | |
| US8726220B2 (en) | System and methods for converting planar design to FinFET design | |
| KR20190058369A (en) | Integrated circuit and layout method for standard cell structures | |
| CN103902789A (en) | Filling method of redundant graphs | |
| JP2010541280A (en) | Filler cells for design optimization in place and route systems. | |
| CN103268369A (en) | Method of thermal density optimization for device and process enhancement | |
| KR100730282B1 (en) | Method of adjusting pattern density | |
| CN111428435B (en) | Integrated circuit layout power consumption optimization method and device | |
| Piersanti et al. | Decoupling capacitors placement for a multichip PDN by a nature-inspired algorithm | |
| CN103441096B (en) | A kind of redundant pattern fill method | |
| US20200328205A1 (en) | Leakage Current Reduction in Electrical Isolation Gate Structures | |
| KR20170073513A (en) | A computer implemented system and method for modifying a layout of standard cells defining a circuit component | |
| JP2004252717A (en) | Method and device for designing semiconductor integrated circuit, data structure of cell library, and automatic layout program | |
| JP2007027290A (en) | Method for designing layout of semiconductor integrated circuit | |
| WO2008115609A1 (en) | Random yield improvement based on comparison between wire and global critical area | |
| Tseng et al. | Minimum-implant-area-aware detailed placement with spacing constraints | |
| US8004315B1 (en) | Process for making and designing an IC with pattern controlled layout regions | |
| CN109709761B (en) | Optical proximity correction method | |
| US20020043668A1 (en) | Semiconductor integrated circuit device and method of producing the same | |
| JP2003282569A (en) | Semiconductor integrated circuit device and insertion method of dummy metal | |
| US9218446B1 (en) | Optimization of integrated circuits for a reticle transmission process window using multiple fill cells | |
| CN103853854B (en) | Method for inserting filling graphs in map | |
| JP2003114515A (en) | Mask and its designing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140116 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201206 PUDONG NEW AREA, SHANGHAI TO: 201203 PUDONG NEW AREA, SHANGHAI |
|
| TA01 | Transfer of patent application right |
Effective date of registration: 20140116 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |