CN102376666B - A kind of ball grid array package structure and manufacture method thereof - Google Patents
A kind of ball grid array package structure and manufacture method thereof Download PDFInfo
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- CN102376666B CN102376666B CN201010248782.2A CN201010248782A CN102376666B CN 102376666 B CN102376666 B CN 102376666B CN 201010248782 A CN201010248782 A CN 201010248782A CN 102376666 B CN102376666 B CN 102376666B
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- pad
- chip
- grid array
- package structure
- array package
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
The invention provides a kind of ball grid array package structure and manufacture method thereof, this ball grid array package structure comprises: chip, and its upper surface is formed with fixed cell and multiple pad; Substrate, its upper surface is formed with the placement unit corresponding with described fixed cell and the multiple through holes corresponding respectively with pad described in each, described chip makes described fixed cell contact with described placement unit in the mode of upside-down mounting, and makes each described through hole expose the described pad corresponding with this through hole respectively.According to ball grid array package structure of the present invention and manufacture method thereof; by by flip-chip in substrate; and each pad exposed by the through hole being arranged at substrate on chip; and by directly planting ball on pad after electric conducting material protection pad; realize low cost thus, technique is simple, and there is high electrical performance.
Description
Technical field
The present invention relates to a kind of ball grid array package structure and manufacture method thereof, particularly relate to a kind of ball grid array package structure and manufacture method thereof by flip-chip to be improved electrical property in substrate.
Background technology
Ball grid array (BGA) encapsulation technology is a kind of surface mount packages, it replaces traditional lead-in wire by producing spherical salient point (ballbump) at the back side of substrate by array way, such that the integrated level of semiconductor device is higher, performance is better.BGA package technology can increase I/O number of pins, the reduction solder pad space length of device significantly, and then reduce the size of packaging part, save the footprint of encapsulation, thus make the high density such as PC chipset, microprocessor, high-performance, many pin package device be miniaturizated to possibility.Along with the continuous intensification of encapsulation technology and product diversification demand, high speed, low cost, small size, outstanding electrical property are its important development trends.
In the manufacturing process of traditional BGA package, chip is fixed on substrate by its lower surface, and the pad then making to be arranged at chip upper surface by wire bonding (wirebonding) technique is formed by the solder joint on metal wire and substrate and is electrically connected.Then, mould envelope (molding) is carried out to described chip and substrate, with the metal wire of protect IC and inside.Finally, forming convex ball by planting ball technique in the downside of substrate, being electrically connected to make chip and other outside circuit be formed.
But because existing bga structure needs through lead key closing process manufacture, therefore its cost is higher, and due to metal wire longer, cause signal integrity poor, processing step is more complicated.
Summary of the invention
The present invention proposes to solve the problem, and its object is to provides a kind of ball grid array package structure and manufacture method thereof, to improve the electrical property of ball grid array package structure while saving lead key closing process.
According to an aspect of the present invention, a kind of ball grid array package structure, comprising: chip, and its upper surface is formed with fixed cell and multiple pad; Substrate, its upper surface is formed with the placement unit corresponding with described fixed cell and the multiple through holes corresponding respectively with described pad, described chip makes described fixed cell engage with described placement unit in the mode of upside-down mounting, and makes each described through hole expose the described pad corresponding with this through hole respectively.
And described fixed cell and described placement unit are fixed together by bonded adhesives.
Further, described bonded adhesives is heat-conducting type bonded adhesives, to dispel the heat to chip.
The plastic-sealed body for the protection of described chip and described substrate is also comprised according to ball grid array package structure of the present invention.
Ball grid array package structure according to the present invention also comprises: for the protection of the electric conducting material of described pad, and it is inner that this electric conducting material is arranged at described through hole; Be arranged at the convex ball of through hole lower end, this convex ball is formed by described electric conducting material and described pad and is electrically connected.
According to a further aspect in the invention, a kind of manufacture method of ball grid array package structure comprises the following steps: by described chip upside down, and make each described pad respectively with described through-hole alignment; By bonded adhesives, the described fixed cell of described chip is fixed on the described placement unit of described substrate; Insert in described through hole for the protection of pad electric conducting material; Mould envelope is carried out to described chip and described substrate; Formed in the described through hole lower end of described substrate and form with described pad the convex ball be electrically connected.
According to ball grid array package structure of the present invention and manufacture method thereof; by by flip-chip in substrate; and each pad exposed by the through hole being arranged at substrate on chip; and by directly planting ball on pad after electric conducting material protection pad; realize low cost thus, technique is simple, and there is high electrical performance.
Accompanying drawing explanation
Fig. 1 is the schematic diagram according to chip upper surface of the present invention;
Fig. 2 is the end view according to chip of the present invention;
Fig. 3 is the cutaway view according to substrate of the present invention;
Fig. 4 is the schematic diagram according to ball grid array package structure of the present invention;
Fig. 5 is the manufacturing process flow diagram according to ball grid array package structure of the present invention.
Embodiment
Below, leading wire heating device is according to an embodiment of the invention described in detail with reference to accompanying drawing.But the present invention can implement in a number of different ways, and should not be understood to be limited to the following examples.In the accompanying drawings, for clarity, size of exaggerating represents, and uses the parts that identical label represents identical in different accompanying drawings.
Fig. 1 is the schematic diagram according to chip upper surface of the present invention, and Fig. 2 is the end view according to chip of the present invention, and Fig. 3 is the cutaway view according to substrate of the present invention, and Fig. 4 is the schematic diagram according to ball grid array package structure of the present invention.
As seen from the figure, multiple pad 11 and fixed cell 12 is formed with according to the upper surface of chip 10 of the present invention.Described pad 11 is connected with external circuit as input/output terminal and enables chip perform specific function.Described fixed cell 12 for described chip 10 is arranged on the substrate 13, to encapsulate chip 10.Described substrate 13 is for carrying described chip 10, and surface is formed with the placement unit 15 for engaging with the fixed cell 12 of chip 10 thereon.Be fixed by bonded adhesives 19 between described fixed cell 12 and described placement unit 15.Preferably, described placement unit 15 is formed with the groove with certain depth, to arrange described bonded adhesives 19.Described bonded adhesives 19 has heat conduction function, and the heat produced during to run chip 10 dispels the heat.Described substrate 13 is also formed and multiplely runs through its upper and lower surface and the through hole 14 formed, and each through hole 14 can be corresponding with the pad 11 of described chip 10 respectively, thus when described chip 10 carries and is fixed on described substrate 13, described through hole 14 exposes described pad 11.As shown in Figure 4, because the pad 11 of chip 10 of the present invention and fixed cell 12 are all formed in upper surface, therefore when described chip 10 is fixed on described substrate 13, the upper surface of described chip 10 and the upper surface close contact of described substrate 13, namely the upside-down mounting of described chip 10 pastes described substrate 13.And, electric conducting material 18 is set in the through hole 14 of described substrate 13, to protect described pad 10, prevents chip 10 ineffective.Further, compared with prior art, pad 11 described in the present invention by electric conducting material 18 directly and soldered ball 17 formed and be electrically connected.That is, substrate 13 described in the present invention is without the need to wiring, only plays a kind of effect of support frame.Symbol 16 represents the plastic-sealed body for the protection of internal structures such as chips.
Below, composition graphs 1 to Fig. 5 describes the manufacturing process according to ball grid array package structure of the present invention in detail.Fig. 5 is the manufacturing process flow diagram according to ball grid array package structure of the present invention.As seen from the figure, as follows according to the manufacturing process of ball grid array package structure of the present invention: first, as shown in (a) of Fig. 5, by chip upside down, and the align pad on chip and the through hole on substrate.Now, when through-hole alignment on the pad on described chip and described substrate, the fixed cell of described chip aligns with the placement unit on described substrate naturally.Then, as shown in (b) of Fig. 5, utilize bonded adhesives that described chip is fixed on described substrate.Now described bonded adhesives is heat-conducting type bonded adhesives, and the heat produced during to run chip dispels the heat.Then, in the through hole of described substrate, insert electric conducting material, to protect described pad, avoid chip ineffective.Now, need between adjacent pad to keep certain spacing, form even point to avoid adjacent pad by electric conducting material.Then, as shown in (d) of Fig. 5, carry out mould envelope (molding), with protect IC to through the chip of above-mentioned technique and substrate.Then, as shown in (e) of Fig. 5, formed in the described through hole lower end of described substrate and form with described pad the convex ball be electrically connected.Now, described convex ball by electric conducting material directly and pad formed and be electrically connected, which thereby enhance electrical property.
According to ball grid array package structure of the present invention and manufacture method thereof; by by flip-chip in substrate; and each pad exposed by the through hole being arranged at substrate on chip; and by directly planting ball on pad after electric conducting material protection pad; realize low cost thus, technique is simple, and there is high electrical performance.And the substrate in the present invention, without the need to connecting up, thereby saving technique, and reduces cost.
The invention is not restricted to above-described embodiment, without departing from the present invention, can various changes and modifications be carried out.
Claims (6)
1. a ball grid array package structure, is characterized in that comprising:
Chip, its upper surface is formed with fixed cell and multiple pad, and fixed cell is positioned at the central authorities of the upper surface of chip, and described multiple pad is positioned at around fixed cell;
Substrate, its upper surface is formed with the placement unit corresponding with described fixed cell and the multiple through holes corresponding respectively with described pad,
Described chip makes described fixed cell engage with described placement unit in the mode of upside-down mounting, and makes each described through hole expose the described pad corresponding with this through hole respectively.
2. ball grid array package structure according to claim 1, is characterized in that described fixed cell and described placement unit are fixed together by bonded adhesives.
3. ball grid array package structure according to claim 2, is characterized in that described bonded adhesives is heat-conducting type bonded adhesives, to dispel the heat to chip.
4. ball grid array package structure according to claim 1, characterized by further comprising the plastic-sealed body for the protection of described chip and described substrate.
5. ball grid array package structure according to claim 1, characterized by further comprising:
For the protection of the electric conducting material of described pad, it is inner that this electric conducting material is arranged at described through hole;
Be arranged at the convex ball of through hole lower end, this convex ball is formed by described electric conducting material and described pad and is electrically connected.
6., for the manufacture of a method for ball grid array package structure according to claim 1, it is characterized in that comprising the following steps:
By described chip upside down, and make each described pad respectively with described through-hole alignment;
By bonded adhesives, the described fixed cell of described chip is fixed on the described placement unit of described substrate;
Insert in described through hole for the protection of pad electric conducting material;
Mould envelope is carried out to described chip and described substrate;
Formed in the described through hole lower end of described substrate and form with described pad the convex ball be electrically connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010248782.2A CN102376666B (en) | 2010-08-06 | 2010-08-06 | A kind of ball grid array package structure and manufacture method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010248782.2A CN102376666B (en) | 2010-08-06 | 2010-08-06 | A kind of ball grid array package structure and manufacture method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102376666A CN102376666A (en) | 2012-03-14 |
| CN102376666B true CN102376666B (en) | 2016-04-13 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201010248782.2A Active CN102376666B (en) | 2010-08-06 | 2010-08-06 | A kind of ball grid array package structure and manufacture method thereof |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN207134353U (en) * | 2017-08-31 | 2018-03-23 | 深圳市江波龙电子有限公司 | Mobile terminal and its chip-packaging structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7498196B2 (en) * | 2001-03-30 | 2009-03-03 | Megica Corporation | Structure and manufacturing method of chip scale package |
| KR100651124B1 (en) * | 2004-11-08 | 2006-12-06 | 삼성전자주식회사 | WBGA semiconductor package and manufacturing method thereof |
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| CN102376666A (en) | 2012-03-14 |
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