CN102231030B - Pixel structure of thin film transistor liquid crystal display - Google Patents
Pixel structure of thin film transistor liquid crystal display Download PDFInfo
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- CN102231030B CN102231030B CN 201110189254 CN201110189254A CN102231030B CN 102231030 B CN102231030 B CN 102231030B CN 201110189254 CN201110189254 CN 201110189254 CN 201110189254 A CN201110189254 A CN 201110189254A CN 102231030 B CN102231030 B CN 102231030B
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- 239000010409 thin film Substances 0.000 title claims abstract description 55
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 11
- 239000010408 film Substances 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 abstract description 3
- 239000002184 metal Substances 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000005755 formation reaction Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000002950 deficient Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a pixel structure of a thin film transistor liquid crystal display, which comprises pairs of parallel scanning lines (1), data lines (2) and a plurality of pixel units (3), wherein the pixel units (3) are defined by the scanning lines (1) and the data lines (2), which are vertically crossed; each pixel unit (3) corresponds to two scanning lines (1); each pixel unit (3) comprises a pixel electrode (4) and a thin film transistor (5); grids (6) of every two adjacent thin film transistors (5) are connected with different scanning lines (1); and distances between the grids (6) of any two adjacent thin film transistors (5) arranged between two scanning lines (1) along the directions of the scanning lines (1) are equal. In the invention, by changing relative positions of components in the thin film transistors, grid-drain parasitic capacitances can be consistent with the characteristics of the components of the thin film transistors, so that longitudinal moire fringes caused by different grid-drain parasitic capacitances are avoided and the quality of a picture of the display is improved.
Description
Technical field
The present invention relates to a kind of dot structure of liquid crystal indicator, but thereby specifically a kind of balance parasitic capacitances is avoided the dot structure of the Thin Film Transistor-LCD of the bad generation of vertical moire.
Background technology
Existing Thin Film Transistor-LCD is made of the liquid crystal layer that a thin-film transistor array base-plate, a color membrane substrates and are sandwiched between aforementioned two substrates.Thin-film transistor array base-plate mainly comprises multi-strip scanning line, many data lines, be arranged between sweep trace and data line thin film transistor (TFT) and with the pixel electrode of the corresponding configuration of thin film transistor (TFT).Above-mentioned thin film transistor (TFT) mainly comprises grid, source electrode and drain electrode etc., and it is used as the on-off element of liquid crystal display.The manufacturing process of thin-film transistor array base-plate generally includes development and etching step repeatedly.In general manufacturing technology, grid and sweep trace are the first metal layer (metal 1), and source electrode, drain electrode and data line are the second metal level (metal 2).And, between the first metal layer and the second metal level, have at least one deck gate insulator.In the structure of thin film transistor (TFT), grid and drain electrode have at least overlaps, so usually can have so-called gate-to-drain stray capacitance (Cgd) between grid and the drain electrode.
With regard to liquid crystal display, be applied between the light transmittance of voltage on the liquid crystal capacitance (Clc) and liquid crystal molecule and have specific relation.Therefore, as long as control the voltage that is applied on the liquid crystal capacitance according to picture to display, can make display show predetermined picture.But because the existence of gate-to-drain stray capacitance, the voltage that keeps on the liquid crystal capacitance will change to some extent along with the change in voltage on the sweep trace, and the flexible amount of this voltage becomes feedback voltage (Feed-through Voltage).When with the gate-to-drain stray capacitance on the array basal plate not simultaneously, then can be because the difference of feedback voltage causes the problem of brightness irregularities in procedure for displaying.
Fig. 1 is the dot structure of existing a kind of Thin Film Transistor-LCD, it comprises the sweep trace 1 that be arranged in parallel in pairs, the edge is perpendicular to data line 2 and the sweep trace 1 of intersection and a plurality of pixel cells 3 that data line 2 defines of the direction setting of sweep trace 1, all corresponding two sweep traces of every row pixel cell 3 wherein, each pixel cell 3 comprises pixel electrode 4 and drives the thin film transistor (TFT) 5 of this pixel electrode 4, the grid 6 of thin film transistor (TFT) 5, source electrode 7 and drain electrode 8 respectively with sweep trace 1, data line 2 and pixel electrode 4 is electrically connected and the grid 6 of adjacent two thin film transistor (TFT)s 5 links to each other from different sweep trace 1 respectively.In this dot structure, the source electrode of adjacent two thin film transistor (TFT)s 57 shares data lines 2, and namely the symmetria bilateralis of same data line 2 is arranged thin film transistor (TFT) 5, and source electrode 7 opening directions in the thin film transistor (TFT) 5 are opposite, and 8 the electrode direction of draining simultaneously is also opposite.And in present active cell array technique, easily move the skew that causes the contraposition step with the relative position that causes each element difference to some extent because of board.As shown in Figure 2, when when the second metal level is made, occuring with respect to the skew of turning left of the position of the first metal layer, the grid 6 that then causes thin film transistor (TFT) 5 in vertical two row's pixel cells 3 of same sweep trace 2 both sides does not wait with the overlapping area of drain electrode 8, cause the size of the gate-to-drain stray capacitance of adjacent vertical two row's thin film transistor (TFT)s 5 that different variations occurs, namely wherein the gate-to-drain stray capacitance change of row's pixel cell 3 causes greatly brightness deterioration, and gate-to-drain stray capacitance of adjacent another row pixel cell 3 diminishes and causes brightness to strengthen, so cause easily the bad generation of vertical moire.
Summary of the invention
The objective of the invention is the defective for prior art, a kind of dot structure that can avoid the Thin Film Transistor-LCD of the bad generation of vertical moire is provided.
The objective of the invention is to solve by the following technical programs:
A kind of dot structure of Thin Film Transistor-LCD, comprise the sweep trace that be arranged in parallel in pairs, the edge is perpendicular to data line and the sweep trace of intersection and a plurality of pixel cells that data line defines of the direction setting of sweep trace, corresponding two sweep traces of every row pixel cell, wherein pixel cell comprises the thin film transistor (TFT) of pixel electrode and this pixel electrode of driving, the grid of thin film transistor (TFT), source electrode and the drain electrode respectively with sweep trace, data line and pixel electrode are electrically connected and the grid of adjacent two thin film transistor (TFT)s links to each other from different sweep trace respectively, and the described distance that is arranged between the grid of appointing adjacent two thin film transistor (TFT)s between two sweep traces along scan-line direction is equal.
Drain electrode in described adjacent films transistor equates with the area of gate overlap position and this lap position equates along the distance of scan-line direction.
The electrode direction of described drain electrode is identical.
Described source electrode is by the branch of " L " shape and the connecting portion formation of " one " shape, and the vertical end of branch links to each other with the inboard of connecting portion, and an end and the data line of connecting portion are electrical connected; The opening direction of described source electrode is identical.
The present invention has the following advantages compared to existing technology:
The present invention is by making the layout of grid in the thin film transistor (TFT), source electrode and drain electrode, so that the gate-to-drain stray capacitance can be consistent with the element characteristic of thin film transistor (TFT), even also can keep the grid in the thin film transistor (TFT) identical with the overlapping area of drain electrode when the contraposition skew occurs in the array process, thereby avoid the generation owing to the different vertical moires that cause of gate-to-drain stray capacitance, improved the quality that display picture shows.
Description of drawings
Accompanying drawing 1 is the structural representation of prior art.
Accompanying drawing 2 is that the contraposition structural representation in when skew appears in prior art.
Accompanying drawing 3 is structural representations of the present invention.
Wherein: 1-sweep trace; 2-data line; 3-pixel cell; 4-pixel electrode; 5-thin film transistor (TFT); 6-grid; 7-source electrode; 8-drain electrode; 9-branch; 10-connecting portion.
Embodiment
The present invention is further illustrated below in conjunction with accompanying drawing and embodiment.
As shown in Figure 3: a kind of dot structure of Thin Film Transistor-LCD, comprise the sweep trace 1 that be arranged in parallel in pairs, the edge is perpendicular to data line 2 and the sweep trace 1 of intersection and a plurality of pixel cells 3 that data line 2 defines of the direction setting of sweep trace 1, every row pixel cell 3 corresponding two sweep traces 1, wherein pixel cell 3 comprises the thin film transistor (TFT) 5 of pixel electrode 4 and this pixel electrode 4 of driving, the grid 6 of thin film transistor (TFT) 5, source electrode 7 and drain electrode 8 respectively with sweep trace 1, data line 2 and pixel electrode 3 is electrically connected and the grid 6 of adjacent two thin film transistor (TFT)s 5 links to each other from different sweep trace 1 respectively.Between two sweep traces 1, equate along the distance between the grid 6 of appointing adjacent two thin film transistor (TFT)s 5 of sweep trace 1 direction layout; Keep synchronously for the gate-to-drain stray capacitance that guarantees adjacent films transistor 5 simultaneously, therefore the electrode direction of drain electrode 8 is identical in all thin film transistor (TFT)s 5, and the drain electrode 8 in the adjacent films transistor 5 equates with the area of grid 6 lap positions and this lap position is equal along the distance of sweep trace 1 direction; Source electrode 7 in the thin film transistor (TFT) 5 of the present invention is by the branch 9 of " L " shape and connecting portion 10 formations of " one " shape, the vertical end of branch 9 links to each other with the inboard of connecting portion 10, one end and the data line 2 of connecting portion 10 are electrical connected, and source electrode 7 opening directions in any two thin film transistor (TFT)s are identical.
In the present invention, in when, position with respect to the first metal layer occuring when the second metal level of array base palte is made producing skew, because all elements relative elements in the first metal layer are simultaneous bias in the second metal level, the in the same size that namely is offset, so the grid 6 of thin film transistor (TFT) 5 and the increase of drain electrode 8 overlapping area or the amplitude that reduces are consistent in vertical two row's pixel cells 3 of same sweep trace 2 both sides, the size of the gate-to-drain stray capacitance of simultaneously adjacent vertical two row's thin film transistor (TFT)s 5 occurs to change synchronously, the gate-to-drain stray capacitance that is all pixel cells 3 on the same array base palte occurs to change synchronously, therefore can not cause the difference that feedback voltage changes, so that the picture brightness of liquid crystal display when showing keeps changing synchronously, be that picture integral body brightens or whole dimmed, thereby avoid the generation of vertical moire.
The technology that the present invention does not relate to all can be realized by prior art.
Claims (2)
1. the dot structure of a Thin Film Transistor-LCD, comprise the sweep trace (1) that be arranged in parallel in pairs, the edge is perpendicular to data line (2) and the sweep trace (1) of intersection and a plurality of pixel cells (3) that data line (2) defines of the direction setting of sweep trace (1), corresponding two sweep traces (1) of every row pixel cell (3), wherein pixel cell (3) comprises the thin film transistor (TFT) (5) of pixel electrode (4) and this pixel electrode of driving (4), the grid (6) of thin film transistor (TFT) (5), source electrode (7) and the drain electrode (8) respectively with sweep trace (1), data line (2) and pixel electrode (4) are electrically connected and the grid (6) of adjacent two thin film transistor (TFT)s (5) links to each other from different sweep trace (1) respectively, it is characterized in that equating and be arranged in adjacent two thin film transistor (TFT)s (5) that arrange in pairs between two sweep traces (1) along sweep trace (1) direction to be electrical connected by source electrode (7) and same data line (2) along the distance that sweep trace (1) direction is arranged between the grid (6) of appointing adjacent two thin film transistor (TFT)s (5) between two sweep traces (1).
2. the dot structure of Thin Film Transistor-LCD according to claim 1 is characterized in that drain electrode (8) in the described adjacent films transistor (5) equates with the area of grid (6) lap position and this lap position equates along the distance of sweep trace (1) direction.
3
.The dot structure of Thin Film Transistor-LCD according to claim 1 and 2 is characterized in that the electrode direction of described drain electrode (8) is identical.
4
.The dot structure of Thin Film Transistor-LCD according to claim 1 and 2, it is characterized in that described source electrode (7) is by the branch (9) of " L " shape and connecting portion (10) formation of " one " shape, the vertical end of branch (9) links to each other with the inboard of connecting portion (10), and an end of connecting portion (10) and data line (2) are electrical connected; The opening direction of described source electrode (7) is identical.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110189254 CN102231030B (en) | 2011-07-07 | 2011-07-07 | Pixel structure of thin film transistor liquid crystal display |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201110189254 CN102231030B (en) | 2011-07-07 | 2011-07-07 | Pixel structure of thin film transistor liquid crystal display |
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| CN102231030A CN102231030A (en) | 2011-11-02 |
| CN102231030B true CN102231030B (en) | 2013-04-10 |
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| CN 201110189254 Expired - Fee Related CN102231030B (en) | 2011-07-07 | 2011-07-07 | Pixel structure of thin film transistor liquid crystal display |
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Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI559046B (en) | 2012-03-30 | 2016-11-21 | 友達光電股份有限公司 | Pixel array and display panel |
| CN102881249A (en) * | 2012-10-18 | 2013-01-16 | 深圳市华星光电技术有限公司 | Pixel unit and active matrix flat panel display device |
| CN104298038B (en) | 2014-10-22 | 2017-03-15 | 深圳市华星光电技术有限公司 | Display panels and its array base palte |
| CN105259717A (en) * | 2015-11-25 | 2016-01-20 | 深圳市华星光电技术有限公司 | Array substrate and display device |
| CN111025804A (en) * | 2019-12-12 | 2020-04-17 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display device having a plurality of pixel electrodes |
| CN114660864B (en) * | 2022-03-22 | 2023-10-13 | Tcl华星光电技术有限公司 | Pixel structure and display panel |
| CN114974157B (en) * | 2022-04-07 | 2024-03-08 | Tcl华星光电技术有限公司 | Display panel and display device |
| CN115942798A (en) * | 2022-12-16 | 2023-04-07 | 京东方科技集团股份有限公司 | Display panel and display device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1341230A (en) * | 1999-12-24 | 2002-03-20 | 松下电器产业株式会社 | Liquid crystal device |
| CN1425948A (en) * | 2001-12-12 | 2003-06-25 | 夏普株式会社 | Liquid crystal display device |
| CN1799080A (en) * | 2003-06-06 | 2006-07-05 | 克雷沃耶提公司 | Liquid crystal display backplane layouts and addressing for non-standard subpixel arrangements |
| CN101359109A (en) * | 2007-07-31 | 2009-02-04 | 奇美电子股份有限公司 | Pixel, display panel and drive method thereof |
| CN101551562A (en) * | 2008-04-04 | 2009-10-07 | 索尼株式会社 | Liquid crystal display module |
| CN101562003A (en) * | 2009-06-03 | 2009-10-21 | 友达光电股份有限公司 | Liquid crystal display panel and drive method thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI427381B (en) * | 2008-12-12 | 2014-02-21 | Innolux Corp | Active matrix display device and method for driving the same |
| TWI393973B (en) * | 2009-04-06 | 2013-04-21 | Chunghwa Picture Tubes Ltd | Lcd display and method thereof |
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- 2011-07-07 CN CN 201110189254 patent/CN102231030B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1341230A (en) * | 1999-12-24 | 2002-03-20 | 松下电器产业株式会社 | Liquid crystal device |
| CN1425948A (en) * | 2001-12-12 | 2003-06-25 | 夏普株式会社 | Liquid crystal display device |
| CN1799080A (en) * | 2003-06-06 | 2006-07-05 | 克雷沃耶提公司 | Liquid crystal display backplane layouts and addressing for non-standard subpixel arrangements |
| CN101359109A (en) * | 2007-07-31 | 2009-02-04 | 奇美电子股份有限公司 | Pixel, display panel and drive method thereof |
| CN101551562A (en) * | 2008-04-04 | 2009-10-07 | 索尼株式会社 | Liquid crystal display module |
| CN101562003A (en) * | 2009-06-03 | 2009-10-21 | 友达光电股份有限公司 | Liquid crystal display panel and drive method thereof |
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