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CN102201349A - Circuit component built-in module and manufacturing method therefor - Google Patents

Circuit component built-in module and manufacturing method therefor Download PDF

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Publication number
CN102201349A
CN102201349A CN2011100783582A CN201110078358A CN102201349A CN 102201349 A CN102201349 A CN 102201349A CN 2011100783582 A CN2011100783582 A CN 2011100783582A CN 201110078358 A CN201110078358 A CN 201110078358A CN 102201349 A CN102201349 A CN 102201349A
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CN
China
Prior art keywords
via hole
circuit elements
substrate
inner via
module
Prior art date
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Granted
Application number
CN2011100783582A
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Chinese (zh)
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CN102201349B (en
Inventor
石丸幸宏
林祥刚
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Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
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Publication of CN102201349A publication Critical patent/CN102201349A/en
Application granted granted Critical
Publication of CN102201349B publication Critical patent/CN102201349B/en
Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

The invention provides a manufacturing method for circuit component built-in modules with heat dissipation property and reliability, wherein the connection between layers are electrically connected with each other via a conductive composition. During the inner hole forming process, through holes formed on an electrically insulating substrate are arranged at the thickness direction thereof so as to form one or more inner holes for the electrical connection between layers. During the filling process, the inner holes are filled with a conductive composition. During the heating process, heating is performed so that the diameter of the central portion of the inner holes is smaller than the diameter of an opening portion thereof. During the laminating process, the two surfaces of the electrically insulating substrate are overlapped with a first substrate and a second substrate. During a pressurized heating process, the electrically insulating substrate, the first and second substrates are pressurized and heated.

Description

The manufacture method of circuit elements device built-in module and circuit elements device built-in module
Technical field
The present invention relates to the manufacture method of a kind of circuit elements device built-in module and circuit elements device built-in module.
Background technology
Along with the miniaturization of electronic equipment in recent years and slimming, multifunction, increase day by day for being installed on the requirement that circuit substrate that electronic devices and components on the printed base plate realize high-density installation and electronic devices and components are installed improves function.In this case, develop electronic devices and components are embedded substrate having built-in components (for example, with reference to patent documentation 1) in the substrate.
In the substrate having built-in components, embed in the substrate, therefore can reduce the area of substrate owing to will be installed on the active components (for example, semiconductor element) and the passive components and parts (for example, capacitor) on the surface of printed base plate usually.In addition, compare, can improve the degree of freedom of configuration electronic devices and components, thereby therefore also can be expected to improve high frequency characteristics etc. by the wiring of optimizing between electronic devices and components with the situation of mounted on surface.
At present, although in the field of ceramic substrate, LTCC (the low temperature cofired ceramics) substrate that is built-in with electronic devices and components is practicability, but because serious breaking takes place in easily, therefore be difficult to be applicable to large substrate, and owing to need high-temperature process, therefore can't built-in LSI such semiconductor element etc., its restriction is bigger.
Therefore, what be concerned by people recently is the substrate having built-in components that components and parts is built in the printed base plate that uses resin, and they are different with ltcc substrate, and are less for the restriction of size of substrate, also have also can built-in LSI advantage.
Then, with reference to Fig. 9, the substrate having built-in components (circuit elements device built-in module) that patent documentation 1 is disclosed is described.Circuit elements device built-in module 400 shown in Figure 9 comprises: the substrate 401 that is laminated with insulating properties substrate 401a, 401b and 401c; Be formed on the interarea and inner wiring pattern 402a, 402b, 402c and the 402d of substrate 401; And the circuit elements device 403a, the 403b that are connected with the wiring pattern of the inside that is configured in substrate 401. Wiring pattern 402a, 402b, 402c and 402d utilize inner via hole 404 to be electrically connected, and insulating properties substrate 401a, 401b and 401c are made of the mixture that comprises inorganic filler and heat reactive resin.The electrical connection that utilizes inner via hole connection method to carry out connects owing to carrying out interlayer in desirable position, is effective structure for shortening wiring therefore.
Under the situation of using inner via hole connection method, disclosed and utilized the technology (for example, with reference to patent documentation 2) of silk screen print method to inner via hole filled conductive resin combination.At this moment, disclosed following technology: by using porous matter base material with material as the formation insulated substrate, thereby utilize the pressurized, heated operation to push the emptying aperture of described porous matter base material, improve the compression ratio of thickness direction (Z direction), improve the conductance of electroconductive resin constituent.
In addition, in order to utilize silk screen print method to inner via hole filled conductive resin combination, disclosed use with coverlay be pasted on the operation of insulated substrate, the operation of carrying out hole processing, filled conductive resin combination operation, peel off the operation of coverlay.
Patent documentation 1: Japanese patent laid-open 11-220262 communique
Patent documentation 2: Japanese patent laid-open 6-268345 communique
Yet in the past, therefore the substrate that uses in the inner via hole connection method existed the lower problem of thermal conductivity owing to the material that by porous matter base material is resinae constitutes.In the circuit elements device built-in module, circuit elements device mounting density is high more, and the heat that then needs components and parts are produced dispels the heat, but owing to existing substrate can not dispel the heat fully, so the reliability of circuit elements device built-in module reduces.
On the other hand, if improve thermal conductivity and with high density such as ceramic powder be filled in the material of substrate, then because therefore the compression ratio step-down of Z direction produces following problem: the conductance step-down of electroconductive resin constituent, the reliability of the electrical connection of interlayer reduces.Particularly circuit elements device built-in module is compared with common printed base plate, owing to for built-in components and parts make the insulating resin layer thickening, so the compression ratio step-down of Z direction, this becomes bigger problem.
Summary of the invention
The present invention has considered the problem of above-mentioned existing circuit elements device built-in module, and its purpose is, the further circuit elements device built-in module and the manufacture method thereof that improves of reliability of a kind of thermal diffusivity and electrical connection is provided.
In order to achieve the above object, of the present invention the 1st the invention be,
A kind of manufacture method of circuit elements device built-in module, the interlayer that uses conductive composition to carry out on electric connects, and wherein, comprising:
Inner via hole forms operation, and this inside via hole forms in operation, on the raw-material thickness direction of insulated substrate through hole is set, and forms one or more and is used to carry out the inside via hole that the interlayer on electric connects;
Filling work procedure is in this filling work procedure, to described inner via hole filled conductive constituent;
Heating process in this heating process, heats and makes the diameter of central portion of described inner via hole compare little with the diameter of peristome;
Stacked operation in this stacked operation, disposes respectively and laminate component on raw-material two surfaces of described insulated substrate; And
The pressurized, heated operation in this pressurized, heated operation, is pressurizeed and is heated the raw material of the described insulated substrate after stacked and described member.
In addition, the 2nd invention of the present invention is in the manufacture method of the 1st inventive circuit components and parts built-in module of the present invention, also to comprise:
Paste operation, this is pasted in the operation, coverlay is pasted on the raw material of described insulated substrate; And
Stripping process in this stripping process, after described heating process, is peeled off described coverlay from the raw material of described insulated substrate,
It is the operation that described through hole is set in the raw material of described coverlay and described insulated substrate that described inner via hole forms operation,
Described filling work procedure is to utilize the described inner via hole of silk screen printing normal direction to fill the operation of described conductive composition.
In addition, of the present invention the 3rd the invention be, in the manufacture method of the 1st inventive circuit components and parts built-in module of the present invention,
It is to utilize punching processing that the operation of described through hole is set that described inner via hole forms operation.
In addition, of the present invention the 4th the invention be, in the manufacture method of the 2nd inventive circuit components and parts built-in module of the present invention,
It is to utilize punching processing that the operation of described through hole is set that described inner via hole forms operation.
In addition, of the present invention the 5th the invention be,
A kind of circuit elements device built-in module is to utilize each the manufacture method of circuit elements device built-in module of the 1st to the 4th invention of the present invention to make, wherein,
Described inner via hole is following shape: the diameter of described central portion is compared with the diameter of described peristome and is wanted little by 10%～50%.
In addition, of the present invention the 6th the invention be, in the 5th inventive circuit components and parts built-in module of the present invention,
Described insulated substrate is to utilize the material that comprises inorganic filler and resin Composition to form,
Comprise the described inorganic filler of 70～95 weight % in the described material,
Comprise heat reactive resin and rubber components in the described resin Composition,
Described rubber components is that molecular weight comprises 70 weight %～95 weight % more than 50,000 and in described resin.
In addition, of the present invention the 7th the invention be, in the 5th inventive circuit components and parts built-in module of the present invention,
In all or part of described inner via hole, dispose the circuit elements device.
In addition, the 8th invention of the present invention is in the 1st inventive circuit components and parts built-in module of the present invention, comprising:
Components and parts insert operation, and these components and parts insert in the operation, and the circuit elements device is inserted all or part of described inner via hole; And
The clamping operation in this clamping operation, heats that to make the diameter of central portion of described inner via hole compare with the diameter of peristome little, the described circuit elements device that is inserted with clamping,
Described filling work procedure is the operation of also filling described conductive composition to the described inner via hole that is inserted with described components and parts.
According to the present invention, can provide the further circuit elements device built-in module and the manufacture method thereof that improves of reliability of a kind of thermal diffusivity and electrical connection.
Description of drawings
Fig. 1 is the sectional structure chart of the circuit elements device built-in module in the embodiments of the present invention 1.
Fig. 2 (a)～(g) is the sectional structure chart of each operation of manufacture method that is used for illustrating the circuit elements device built-in module of embodiments of the present invention 1.
Fig. 3 is the sectional structure chart of the circuit elements device built-in module in the variation of embodiments of the present invention 1.
Fig. 4 is the sectional structure chart of the circuit elements device built-in module in the variation of embodiments of the present invention 1.
Fig. 5 is the sectional structure chart of the circuit elements device built-in module in the embodiments of the present invention 2.
Fig. 6 is that the electron micrograph of analysing and observe is amplified in the part of the circuit elements device built-in module in the expression embodiments of the present invention 2.
Fig. 7 (a)～(h) is the sectional structure chart of each operation of manufacture method that is used for illustrating the circuit elements device built-in module of embodiments of the present invention 2.
Fig. 8 is the sectional structure chart that is used to illustrate the structures of samples of embodiment 1.
Fig. 9 is the figure of the structure of the existing circuit elements device built-in module of expression.
Embodiment
Below, with reference to accompanying drawing, an example of embodiments of the present invention is described.
(execution mode 1)
Below, the circuit elements device built-in module in the embodiments of the present invention 1 is described.
Fig. 1 is the sectional structure chart of the circuit elements device built-in module of present embodiment 1.As shown in Figure 1, the circuit elements device built-in module 100 of this execution mode be provided with the 1st substrate the 101, the 2nd substrate 108 and be clipped in the 1st substrate 101 and the 2nd substrate 108 between components and parts build-up layer 110.Interarea in components and parts build-up layer 110 1 sides of the 1st substrate 101 and the 2nd substrate 108 is formed with electrode of substrate 102 respectively.
And components and parts build-up layer 110 has as the electrical insulating property substrate 104 of an example of insulated substrate of the present invention, the inside via hole 103 that is configured in its inner semiconductor chip 105 and sheet components and parts 106 and the electrode of substrate 102 of the electrode of substrate 102 of the 1st substrate 101 and the 2nd substrate 108 is electrically connected.In addition, semiconductor chip 105 and sheet components and parts 106 are installed on the electrode of substrate 102 of the 1st substrate 101, and semiconductor chip 105 is to use wire-bonded to install.In addition, semiconductor chip 105 sealed resins 109 cover.
And in the inner via hole 103, the width of the central portion 103a on the thickness direction of electrical insulating property substrate 104 (Z direction among the figure) is compared narrow with peristome 103b.
The manufacture method of the circuit elements device built-in module of present embodiment 1 then, is described.
Fig. 2 (a)～(g) is the cutaway view of an execution mode of the manufacture method of indication circuit components and parts built-in module 100.In addition, among Fig. 2 (a)～(g), semiconductor chip shown in Figure 1 105 and sheet components and parts 106 have been omitted.
At first, shown in Fig. 2 (a), by to comprising inorganic filler and process at interior mixture, thereby form tabular electrical insulating property substrate raw materials 202 as heat reactive resin, curing agent and the rubber components of resin Composition.By heat reactive resin of inorganic filler and its uncured state etc. is mixed with the thing that mixes as the thickener shape, and this thickener shape thing that mixes is shaped to certain thickness, thereby can forms electrical insulating property substrate raw materials 202.This electrical insulating property substrate raw materials 202 by heat reactive resin is carried out hot curing, thereby forms electrical insulating property substrate 104 shown in Figure 1 after the pressurized, heated operation shown in Fig. 2 described later (g) finishes.In addition, electrical insulating property substrate raw materials 202 is equivalent to a raw-material example of insulated substrate of the present invention.
On two surfaces of this tabular electrical insulating property substrate raw materials 202, configuration coverlay 201 is made tabular component 210.For coverlay 201, for example can use the film of PETG and polyphenylene sulfide.The operation that like this coverlay 201 is pasted on electrical insulating property substrate raw materials 202 is equivalent to an example of stickup operation of the present invention.
Afterwards, shown in Fig. 2 (b), form through hole, thereby make the tabular component 211 that is formed with inner via hole 103 by desired position at tabular component 210.Inner via hole 103 for example can be by laser processing, utilize the processing of drill bit or utilize the metal die of perforating press to process and form.In addition, the operation that forms this through hole is equivalent to the example that inner via hole of the present invention forms operation.
As the processing that forms inner via hole 103, owing to utilize the punching processing of perforating press to have following effect: accumulate deformation in electrical insulating property substrate raw materials 202, the heating process after utilizing reduces inner via diameter, and is therefore preferred.Utilizing punching processing to form under the situation of inner via hole 103, shown in Fig. 2 (b), though being shaped as with the metal die of punching processing after the processing processed via hole towards the straight shape of the roughly the same diameter of pin, but, therefore become the state of accumulation deformation in material because punching processing is to apply the processing method that compression stress is processed to material.Therefore, relax deformation by utilizing heating process described later, thereby the shape of inner via hole 103 can be formed following shape: the diameter of Z direction central portion 103a (with reference to Fig. 2 (d)) is compared little with peristome 103b.But, under the situation of the electrical insulating property substrate that comprises more rubber components,, thereby dwindle via diameter sometimes by after processing just, just making deformation release.
Afterwards, shown in Fig. 2 (c),, make tabular component 212 to inner via hole 103 filled conductive resin combinations 111 '.When filled conductive resin combination 111 ', the electrical insulating property substrate raw materials 202 that will have inner via hole 103 is arranged on the workbench of printing machine (not shown), directly printing conductive resin combination 111 ' from the coverlay 201.At this moment, the coverlay 201 of the upper surface effect playing the effect of mask to print and prevent the surface contamination of electrical insulating property substrate raw materials 202.In addition, the operation of filling this electroconductive resin constituent 111 ' to inner via hole 103 is equivalent to an example of filling work procedure of the present invention.In addition, electroconductive resin constituent 111 ' by the heat reactive resin that is contained is carried out hot curing, thereby forms electroconductive resin constituent 111 shown in Figure 1 after the pressurized, heated operation shown in Fig. 2 described later (g) finishes.
At this moment, surface configuration about electroconductive resin constituent 111 ', its printing surface side is (among Fig. 2 (c), reference surface 220) viscosity because of the electroconductive resin constituent becomes the shape that caves in into concavity, opposing face side (among Fig. 2 (c), with reference to surface 221) is smooth shape because of the workbench surface that is pressed into printing machine forms.
Afterwards, shown in Fig. 2 (d), by tabular component 212 is carried out heat treated, thereby make tabular component 213, in this tabular component 213, the diameter in the hole of the central portion 103a of the Z direction of inner via hole 103 is compared with peristome 103b and will be produced contraction, and electroconductive resin constituent 111 ' is outstanding from surperficial 213a, 213b.Here, if heating-up temperature, overlong time in this heating treatment step, then the electrical insulating property substrate raw materials 202 of B stage condition is further solidified, because the adhesive strength in the pressurized, heated operation shown in Fig. 2 (g) afterwards descends, therefore preferably is suppressed to the degree of too further not solidifying.In the heating treatment step, because by the deformation in the electrical insulating property substrate raw materials 202 is discharged, thereby the diameter in hole of the central portion 103a of inner via hole 103 is reduced, so this heating treatment step is preferably with high temperature and carry out at short notice.
Like this, by heating afterwards to inner via hole 103 filled conductive resin combinations 111 ', thereby become following shape: the diameter of the central portion 103a of inner via hole 103 diminishes, the electroconductive resin constituent 111 ' of being filled be extruded and internally the peristome 103b of via hole 103 overflow.The operation of this heating is equivalent to an example of heating process of the present invention.
Afterwards, shown in Fig. 2 (e), on electrical insulating property substrate raw materials 202, coverlay 201 is peeled off, made the tabular component 214 that electroconductive resin constituent 111 ' is given prominence to from electrical insulating property substrate raw materials 202.In addition, the outstanding part of electroconductive resin constituent 111 ' is represented as overflowing part 205.The operation of peeling off this coverlay 201 is equivalent to an example of stripping process of the present invention.
Here, in the past, when coverlay 201 is peeled off, sometimes the electroconductive resin constituent 111 ' in the inner via hole 103 can hang on the coverlay 201 and come off, but in the present embodiment, because its central portion 103a ratio open 103b of portion that is shaped as of inner via hole 103 wants narrow shape, so the change of the friction between electroconductive resin constituent 111 ' and the inner via hole 103 is big, so can suppress coming off of electroconductive resin constituent 111 '.
The part 205 of overflowing shown in this Fig. 2 (e), electroconductive resin constituent 111 ' is brought bigger influence for the reliability of the electrical connection in the inner via hole 103.Shown in Fig. 2 (g), owing to finally become the shape that has embedded electrode of substrate 102, so electroconductive resin constituent 111 ' has been compressed the size corresponding to the thickness that overflows part 205 and electrode of substrate 102 of electroconductive resin constituent 111 '.Basically, because decrement is big more, then the contact area of conductive filler in the electroconductive resin constituent 111 ' and electrode of substrate 102, and conductive filler between contact area big more, so resistance value step-down, can obtain high conductivity, the quality of inner via hole improves.
Here, though consider thickness by thickening electrode of substrate 102, thereby increase electroconductive resin constituent 111 ' overflow part 205, if thickening electrode of substrate 102, then can't form the pattern of substrate preferably, therefore have restriction.In addition, under the thicker situation of electrode of substrate 102, when embedding electrode of substrate 102 in the electrical insulating property substrate raw materials 202, if the resin flow of electrical insulating property substrate raw materials 202 is insufficient, then can produce the space between electrode of substrate 102 and electrical insulating property substrate raw materials 202, it becomes the reason of insulation degradation etc.
In addition, thereby though also consider to overflow part 205 by thickening coverlay 201 increase electroconductive resin constituents 111 ', but when peeling off coverlay 201, the friction of coverlay 201 and electroconductive resin constituent 111 ' increases, and coming off of above-mentioned electroconductive resin constituent 111 ' taken place easily.
Therefore, in the present embodiment, the diameter of the central portion 103a by reducing inner via hole 103, thereby play following effect: what can increase electroconductive resin constituent 111 ' overflows part 205, solve the problems referred to above, compression ratio is improved corresponding to outstanding size, can obtain high conductivity.
Afterwards, shown in Fig. 2 (f), (g), by the 1st substrate the 101, the 2nd substrate 108 and tabular component 214 are carried out position alignment to carry out overlapping then it pressurization, thereby form the plate body that is embedded with the circuit elements device, afterwards by this plate body is heated, thereby the heat reactive resin in the electrical insulating property substrate raw materials 202 is cured, form electrical insulating property substrate 104, heat reactive resin in the electroconductive resin constituent 111 ' also is cured, and makes the circuit elements device built-in module that is built-in with the circuit elements device.In addition, among above-mentioned Fig. 2, though omitted semiconductor chip shown in Figure 1 105 and sheet components and parts 106, but as long as on the electrode of substrate 102 of the 2nd substrate 108 of Fig. 2 (f), be equipped with under the state of semiconductor chip 105 and sheet components and parts 106, to the 1st substrate 101, tabular component 214, and the 2nd substrate 108 pressurize and get final product.In addition, when pressurization, the semiconductor chip 105 preferred sealing resins 109 (with reference to Fig. 1) that use cover to protect.Shown in above-mentioned Fig. 2 (f), the 1st substrate the 101, the 2nd substrate 108 and tabular component 214 are carried out position alignment be equivalent to an example of stacked operation of the present invention to carry out overlapping operation.In addition, the member of the counterweight poststack operation pressurizeing, heat is equivalent to an example of pressurized, heated operation of the present invention.In addition, the 1st substrate 101 and the 2nd substrate 108 are equivalent to an example of member of the present invention.
In addition, heating is to carry out under the temperature (for example 150 ℃～260 ℃) more than the temperature that is cured of the heat reactive resin in electrical insulating property substrate raw materials 202 and electroconductive resin constituent 111 '.By this heating, make electrode of substrate 102, circuit elements device (semiconductor chip 105, sheet components and parts 106) and electrical insulating property substrate 104 mechanically carry out bonding securely.In addition, utilize the electroconductive resin constituent 111 in the inner via hole 103, the electrode of substrate 102 of the 1st substrate 101 and the electrode of substrate 102 of the 2nd substrate 108 are electrically connected.In addition, when utilizing heating that heat reactive resin in electrical insulating property substrate raw materials 202 and the electroconductive resin constituent 111 ' is cured, while by heating with 10kg/cm 2～200kg/cm 2Pressure pressurize, thereby can improve the mechanical strength (identical in the following execution mode) of circuit elements device blocks.
In the circuit elements device built-in module 100 shown in the present embodiment 1, owing to can utilize the inorganic filler that comprises in the electrical insulating property substrate 104 to obtain high heat conductance, therefore the heat that is produced by circuit elements device (semiconductor chip 105) conducts rapidly.Thereby, can obtain the high circuit elements device built-in module of reliability.
In addition, in the circuit elements device built-in module 100, as electrical insulating property substrate 104 being carried out the inside via hole 103 that interlayer connects, have its shape and be shaped such that the diameter of the thickness direction central portion 103 of electrical insulating property substrate 104 is compared with the diameter of peristome 103b and want little inside via hole.
Like this, owing to diminish by the central portion 103a that makes inner via hole 103, thereby what form electroconductive resin constituent 111 ' overflows part 205, so the compression ratio of the Z direction (thickness direction) of electroconductive resin constituent 111 ' becomes big in the pressurized, heated operation, can obtain high conductivity.
In addition, diminish by the central portion 103a that makes inner via hole 103, it is big that thereby the friction of the wall of inner via hole 103 and electroconductive resin constituent 111 ' becomes, under long-term reliability tests such as thermal shock test, wall by keeping inner via hole 103 and electroconductive resin constituent 111 ' be close to intensity, thereby can suppress the generation of crackle, can improve the reliability of inner via hole.
And, by in the material that forms electrical insulating property substrate 104, adding rubber components, thereby has following effect: can increase the deformation that utilizes punching processing and accumulate, the diameter of the central portion 103a of inner via hole 103 can be further reduced, the electroconductive resin constituent 111 ' spill-out of the 103b of via openings portion internally can be increased.Thereby, because therefore the compression ratio of the electroconductive resin constituent can improve pressurized, heated operation shown in Fig. 2 (g) time can improve conductance.
In addition, in the circuit elements device built-in module 100 shown in this execution mode 1, electrode of substrate 102 up and down utilizes the electroconductive resin constituent 111 in the inside via hole 103 that is filled in electrical insulating property substrate 104 to connect, and thermal diffusivity might as well.Thereby, in the circuit elements device built-in module 100, the circuit elements device can be installed to high-density.
Then, the structure of circuit elements device built-in module 100 of above-mentioned present embodiment 1 and the details of manufacture method are described.
As mentioned above, electrical insulating property substrate 104 is formed by the mixture that comprises inorganic filler and resin Composition, as resin Composition, comprises heat reactive resin, curing agent, reaches rubber components.And, be preferably, comprise the inorganic filler of 70 weight %～95 weight % in this mixture.And more preferably, in the resin Composition (resin Composition is made as 100), the rubber components of molecular weight more than 50,000 contains 20 weight %～60 weight %.
In addition, as the heat reactive resin that uses among the present invention, though be not particularly limited, being preferably epoxy resin, preferably is down that liquid resin and normal temperature uses for the resin of solid, shaped mixes down with normal temperature.As liquid resin, can enumerate EPIKOTE828, EPIKOTE815 (japan epoxy resin (Co., Ltd.) production), EPICLON850, EPICLON840 (big Japanese ink chemistry (Co., Ltd.) is produced), WE-2025 (Japanese Peng Nuo Co., Ltd. produce) etc.In addition, as the resin of solid, shaped, can enumerate 1001,1002,1003 (japan epoxy resin (Co., Ltd.) productions) etc.
Be that liquid resin and normal temperature is down that under the B of electrical insulating property substrate stage condition, spring rate has than big-difference in the resin of solid, shaped at normal temperatures.For example, only using liquid resin to form under the situation of insulated substrate,, therefore when being used to form the punching processing of inner via hole, can't keep the aperture sometimes because spring rate is excessive under the B stage condition.In addition, form at the resin that only uses solid, shaped under the situation of insulated substrate, because spring rate is less under the B stage condition, so the deformation during punching processing is little, the aperture that is produced by the heating process after the punching processing (with reference to Fig. 2 (d)) to dwindle effect less.
In addition, as curing agent, from the preferred use latent curing agent in the storage stability aspect of material.As latent curing agent, can enumerate dicyandiamide with as representational latent curing agent, can enumerate 2200～2227 (productions of triple bond company) etc.
In addition, why adding the rubber components of molecular weight more than 50,000 with as resin Composition, is owing to if only utilize liquid epoxy resin, then can't guarantee the spring rate that bore dia can dwindle effectively sometimes when heating.If the quantity not sufficient 20 weight % of the rubber components in the resin Composition then can't bring into play the effect that spring rate is improved sometimes, if surpass 60 weight %, then spring rate is too high sometimes, can't keep the aperture when punching processing.Therefore, the amount of the rubber components in the resin Composition is preferably more than the 20 weight %, below the 60 weight %.In addition, this rubber components is preferably the acrylic rubber of the epoxy radicals that contains 1～10 mole of %.The terminal epoxy groups of rubber components participates in solidifying, and prevents that the Tg (glass transition point) when adding rubber components and be cured from sharply descending, and further improves the compatibility with epoxy.As this rubber components, can enumerate HTR-860P-3 (Imperial Chemical Industries industry (Co., Ltd.) production) etc.
As the inorganic filler that the thermal diffusivity that makes electrical insulating property substrate 104 improves, preferably comprise and be selected from Al 2O 3, MgO, BN, AlN and SiO 2At least a inorganic filler.By using these inorganic fillers, thereby can obtain the electrical insulating property substrate of thermal diffusivity excellence.In addition, use MgO with situation as inorganic filler under, can increase the coefficient of linear expansion of electrical insulating property substrate.In addition, using S iO 2(amorphous state SiO particularly 2) with under the situation as inorganic filler, can reduce the dielectric constant of electrical insulating property substrate.In addition, use BN with situation as inorganic filler under, can reduce coefficient of linear expansion.
Inorganic filler is preferably, and the mixture with respect to forming electrical insulating property substrate 104 comprises 70% weight % to 95 weight %.The shape of inorganic filler is preferably sphere, and mean particle diameter is preferably more than the 0.1 μ m, below the 100 μ m.
The amount of the inorganic filler in the mixture that forms the electrical insulating property substrate is that the flowability of resin compound is bigger when pressurized, heated under the situation below the 70 weight %, and the thickness under the B stage condition becomes inhomogeneous easily sometimes.On the other hand, if surpass 95 weight %, then be difficult to paste coverlay etc. sometimes.And the flexibility under the B stage condition can diminish sometimes, produces easily to break etc. when handling.
In addition, be under the situation of 0.1 μ m at the mean particle diameter of inorganic filler, be difficult to inorganic filler added to become to make in mixture, comprise 70 weight %.Under the mean particle diameter of inorganic filler is situation more than the 100 μ m, damage the processability of punching processing sometimes.In addition, the particle diameter as inorganic filler distributes the bimodal distribution that minor diameter filler and major diameter filler are mixed.By the employing bimodal distribution, thereby can take into account the flowability of filler being carried out the resin compound under high filling and the B stage condition.In addition, distribute that it is bimodal to be not limited to, also bimodal more than.As this inorganic filler, can enumerate AS-20, AS-50 (clear and electrician (Co., Ltd.) produces) etc.In addition,, improve dispersiveness, preferably add silane coupler for the surface modification of inorganic filler.As silane coupler, can enumerate A-187, A-189, A-1100, A-1160 (Japanese You Nika (unicar) (Co., Ltd.) production) etc.
In addition, also can in the mixture that forms insulated substrate, further comprise dispersant, colouring agent, release agent.
Electrode of substrate 102 is made of the material with electric conductivity, is for example formed by Copper Foil and electroconductive resin constituent.Use Copper Foil with situation as electrode of substrate 102 under, for example can use and utilize that to electroplate the thickness of making be Copper Foil about 18 μ m～35 μ m.In order to improve the cementability of Copper Foil and electrical insulating property substrate 104, preferably roughened is carried out on the surface that Copper Foil is contacted with electrical insulating property substrate 104.In addition,, also can use copper foil surface is carried out Copper Foil and the Copper Foil behind copper foil surface plating tin, zinc or nickel after the coupling processing in order to improve cementability and non-oxidizability for Copper Foil.In addition, also can use the lead frame of the metallic plate that utilizes etching method or blanking method formation to electrode of substrate 102.
In the present embodiment, though in electrical insulating property substrate 104, be built-in with as the semiconductor chip 105 of active components and as the sheet components and parts 106 of passive components and parts with as the circuit elements device, also can be built-in with the only a certain components and parts in active components or the passive components and parts.
In addition, as active components, for example use semiconductor elements such as transistor, IC, LSI.Semiconductor element also can be semiconductor bare chip.In addition, as passive components and parts, the resistance of use sheet, the electric capacity of sheet or pellet inductor etc.
In the present embodiment 1,, be not limited thereto, for example also can install by flip-chip bond though semiconductor chip 105 is installed on the electrode of substrate 102 by wire-bonded.
In addition, though used electroconductive resin constituent 111 with as the conductive material that is filled in the inner via hole 103, so long as the conductive material of Thermocurable gets final product (also identical in the following execution mode).As the conductive material of Thermocurable, for example can use metallic and heat reactive resin are carried out mixed electroconductive resin constituent.As metallic, can use gold, silver, copper or nickel etc.Gold, silver, copper or nickel are because good conductivity is therefore preferred, and copper is owing to good conductivity and move less, therefore preferred especially.As heat reactive resin, for example can use epoxy resin, phenolic resins or cyanate ester resin.Epoxy resin is because good heat resistance is therefore preferred especially.
In addition, in the present embodiment, the diameter of the diameter ratio open 103b of portion of the central portion 103a of inner via hole 103 is narrow, as if the shape with inner via hole is that straight situation compares, then because electroconductive resin constituent 111 ' is more outstanding, therefore conductance improves, but adopts the diameter of the diameter ratio open 103b of portion of Z direction central portion 103a to want little 10%～50% shape, can further improve the reliability of inner via hole 103.For example, if below 10%, then the raising of the compression ratio of Z direction is less, can't see the raising of conductance sometimes.If want little more than 50%, then be difficult to filled conductive resin combination 111 ' sometimes in addition.
In addition, in the above-mentioned execution mode,, also can utilize other processing method (for example, laser processing, boring processing etc.) to form though utilize punching processing to form inner via hole 103.But, for electrical insulating property substrate raw materials 202 is applied bigger compression stress, produce bigger deformation, more preferably utilize punching processing to form.
In addition, in the above-mentioned execution mode,, be not limited to this method, for example, also can pass through to spray electroconductive resin, thereby fill to inner via hole singly though use silk screen print method to inner via hole filled conductive resin combination.
In addition, in the present embodiment 1 in circuit elements device built-in module 100 shown in Figure 1, be formed on as the 1st substrate 101 of an example of member of the present invention and the situation on the 2nd substrate 108 though show electrode of substrate 102, also can not have the 1st substrate 101 and the 2nd substrate 108.Fig. 3 is this figure that is not provided with the circuit elements device built-in module 250 of the 1st substrate 101 and the 2nd substrate 108 of expression.Under the situation of making circuit elements device built-in module 250 shown in Figure 3, configuration is provided with the demoulding member of electrode of substrate 102, to replace the 1st substrate 101 and the 2nd substrate 108 shown in Fig. 2 (f).Then, after carrying out the pressurized, heated operation shown in Fig. 2 (g), by demoulding member is peeled off from electrical insulating property substrate 104, thereby make circuit elements device built-in module 250.In this case, demoulding member is equivalent to an example of member of the present invention.
In addition, formed 1 layer of components and parts build-up layer 110 between the electrode of substrate, can further form the components and parts build-up layer, the components and parts build-up layer has been made as sandwich construction (identical in the following execution mode) in the outside though be clipped among Fig. 1.Fig. 4 is the figure of the circuit elements device built-in module 260 of this sandwich construction of expression.In the circuit elements device built-in module 260 shown in Figure 4, between the 1st substrate 101 and the 2nd substrate 108, be provided with 3 layers of components and parts build-up layer 110,261,262.
In addition, in the circuit elements device built-in module 100 shown in Figure 1,, also the circuit elements device can be installed though show the situation of the circuit elements device not being installed in the opposing face side of the electrical insulating property substrate 104 of the 1st substrate 101 and the 2nd substrate 108.The circuit elements device built-in module 260 of Fig. 4 is also identical.In addition, in the circuit elements device built-in module 250 shown in Figure 3,, also the circuit elements device can be installed though show not the installing under the situation of circuit elements device of electrode of substrate 102 with electrical insulating property substrate 104 opposite surfaces sides.Thus, the circuit elements device can further be installed to high-density.
(execution mode 2)
Below, the circuit elements device built-in module of execution mode involved in the present invention 2 is described.The structure and the execution mode 1 of the circuit elements device built-in module of present embodiment 2 are basic identical, but are built-in with on the circuit elements device this point different in inner via hole.Therefore, in the present embodiment 2, be that the center describes with difference with execution mode 1.In addition, the structure for identical with execution mode 1 marks identical label.
Fig. 5 is the sectional structure chart of the circuit elements device built-in module 300 of present embodiment 2.Fig. 6 is that photo is analysed and observe in the amplification that is configured in the sheet components and parts 107 in the inner via hole 103.
As shown in Figure 5, in the circuit elements device built-in module 300 of this execution mode, be provided with the 1st substrate the 101, the 2nd substrate 108 and be formed on the 1st substrate 101 and the 2nd substrate 108 between components and parts build-up layer 110.And, in the components and parts build-up layer 110, be provided with electrical insulating property substrate 104, be arranged on electrical insulating property substrate 104 1 sides of the 1st substrate 101 and the 2nd substrate 108 electrode of substrate 102, be configured in electrical insulating property substrate 104 inside semiconductor chip 105 and sheet components and parts 106 and be used for being connected between the electrode of substrate 102 with the 1st substrate 101 and the 2nd substrate 108 and the inside via hole 103 that forms.
And, as Fig. 5 and shown in Figure 6, in the circuit elements device built-in module 300 of present embodiment 2, in inner via hole 103, be provided with sheet components and parts 107.In addition, on sheet components and parts 107, have the electrode 107a of sheet components and parts 107, utilize the electroconductive resin constituent 111 that is filled in the inner via hole 103 to be electrically connected with electrode of substrate 102.
In addition, illustrated identical in material such as electrical insulating property substrate, electroconductive resin constituent and the execution mode 1.In addition, in circuit elements device built-in module 300 shown in Figure 5, be formed on situation on the 1st substrate 101 and the 2nd substrate 108, also can not have the 1st substrate 101 and the 2nd substrate 108 though show electrode of substrate 102.
The manufacture method of the circuit elements device built-in module 300 of present embodiment 2 then, is described.Fig. 7 (a)～(h) is the sectional structure chart of manufacture method that is used to illustrate the circuit elements device built-in module 300 of present embodiment 2.In addition, among Fig. 7 (a)～(h), semiconductor chip illustrated in fig. 5 105 and sheet components and parts 106 etc. have been omitted.
At first, shown in Fig. 7 (a), by to comprise inorganic filler and heat reactive resin, curing agent, rubber components is processed at interior mixture, thereby is formed tabular electrical insulating property substrate raw materials 202.By heat reactive resin of inorganic filler and its uncured state etc. is mixed with the thing that mixes as the thickener shape, and this thickener shape thing that mixes is shaped to certain thickness, thereby can forms electrical insulating property substrate raw materials 202.
On two surfaces of this tabular electrical insulating property substrate raw materials 202, configuration coverlay 201 is made tabular component 210.For coverlay 201, for example can use the film of PETG and polyphenylene sulfide.An example that is equivalent to stickup operation of the present invention in the operation of two surface configuration coverlays 201 of this electrical insulating property substrate raw materials 202.
Afterwards, shown in Fig. 7 (b), form through hole, thereby make the tabular component 211 that is formed with inner via hole 103 by desired position at tabular component 210.The operation that forms this through hole is equivalent to the example that inner via hole of the present invention forms operation.
Afterwards, shown in Fig. 7 (c),, make the tabular component 312 that is inserted with sheet components and parts 107 to the sheet components and parts 107 that desirable inner via hole 103 inserts as an example of electronic devices and components of the present invention.In addition, preferably the size than the electronic devices and components that inserted is big for the diameter in the hole of inner via hole 103.If the diameter in hole is less, then when inserting electronic devices and components, owing to can cut the wall of inner via hole 103, therefore cutting slag charge sometimes can accumulate in the components and parts electrode perimeter, hinders being connected of electronic devices and components and electroconductive resin constituent sometimes.Like this, the operation that sheet components and parts 107 are inserted inner via hole 103 is equivalent to the example that components and parts of the present invention insert operation.
Afterwards, shown in Fig. 7 (d), the tabular component 312 that is inserted with sheet components and parts 107 is carried out heat treated, make tabular component 313.Utilize this heat treated, the diameter of the central portion 103a of inner via hole 103 is shunk, thereby sheet components and parts 107 are fixed on sheet components and parts 107 in the inner via hole 103 by the wall clamping of inner via hole 103.In addition, if heating-up temperature, time in this heating treatment step are longer, then since after operation in can't utilize once more heat treated that diameter is shunk, but therefore preferably be suppressed to the contraction of the degree of the very best device 107 of stator.Utilize heat treated like this, be equivalent to an example of clamping operation of the present invention with the operation of the wall holding piece of inner via hole 103 champion device 107.
Afterwards, shown in Fig. 7 (e), by to inner via hole 103 filled conductive resin combinations 111 ', thereby make tabular component 314.The filling of electroconductive resin constituent 111 ' is to carry out from two surfaces of tabular component 313, the sheet components and parts 107 and the electrode of substrate 102 of inner via hole 103 is electrically connected being used for.
Use printing machine afterwards, utilize printing once more from opposing face filled conductive resin combination 111 ' from the single face filled conductive resin combination 111 ' of tabular component 313 (with reference to Fig. 7 (d)).At this moment, have under the situation in space between the wall of sheet components and parts 107 and inner via hole 103, electroconductive resin constituent 111 ' can flow out, and can cause short circuit.Therefore, in the heating treatment step shown in Fig. 7 (d), need eliminate the space in advance.The operation of filling this electroconductive resin constituent 111 ' is equivalent to an example of filling work procedure of the present invention.
Afterwards, shown in Fig. 7 (f), by carrying out heat treated once more, thereby the diameter of the central portion 103a of inner via hole 103 further shrinks, and makes the outstanding tabular component 315 of electroconductive resin constituent 111 '.If heating-up temperature, overlong time in this heating treatment step, then owing to the electrical insulating property substrate raw materials 202 of B stage condition is further solidified, adhesive strength in the pressurized, heated operation afterwards descends, and therefore preferably is suppressed to the degree of too further not solidifying.The 2nd time heating treatment step is preferably to want high temperature to carry out than the heating treatment step of the 1st time shown in Fig. 7 (d).This heating treatment step is equivalent to an example of heating process of the present invention.
Afterwards, shown in Fig. 7 (g), peel off, make tabular component 316 from the 315 pairs of coverlays 201 of tabular component shown in Fig. 7 (f).In the past, when coverlay 201 is peeled off, sometimes the electroconductive resin constituent 111 ' in the inner via hole 103 can hang on the coverlay 201 and come off, in the present embodiment, though sheet components and parts 107 also might come off, but because the diameter ratio open 103b of portion of the central portion 103a of inner via hole 103 is narrow, so the change of the friction between wall and electroconductive resin constituent 111 ' and the sheet components and parts 107 is big, can suppress to come off.The operation of peeling off this coverlay 201 is equivalent to an example of stripping process of the present invention.
Afterwards, shown in Fig. 7 (h), it is overlapping to carry out that the 1st substrate 101 and the 2nd substrate 108 and tabular component 316 are carried out position alignment, and the member of counterweight poststack pressurizes, thereby form the plate body that is embedded with the circuit elements device, afterwards it is heated, the heat reactive resin in electrical insulating property substrate raw materials 202 and the electroconductive resin constituent 111 ' is cured, make the circuit elements device built-in module 300 that is embedded with the circuit elements device.In addition, like this 1st substrate 101 and the 2nd substrate 108 and tabular component 316 are carried out position alignment and be equivalent to an example of stacked operation of the present invention to carry out overlapping operation.In addition, the member of the counterweight poststack operation pressurizeing, heat is equivalent to an example of pressurized, heated operation of the present invention.
As mentioned above, in the circuit elements device built-in module of present embodiment 2, owing to utilize the contraction of the Z direction central portion of the inside via hole that produces because of heat treated, electronic devices and components are clamped in the inner via hole, therefore built-in electronic components and parts in inner via hole simply.
In addition, because by carrying out the 2nd time heating treatment step shown in Fig. 7 (f), thereby inner via hole is shunk, can improve compression ratio at the electroconductive resin constituent of filling up and down of electronic devices and components, therefore can improve conductance.
In addition, because after electronic devices and components being inserted in the inner via hole, thereby diminish by carrying out the heat treated central portion, therefore the wall of inner via hole becomes greatly with friction between the components and parts that inserted, in peeling off the operation of coverlay, in case the possibility that the components and parts after inserting in the inner via hole come off reduces.
And, because after electronic devices and components being inserted in the inner via hole, diminish by the central portion that makes inner via hole, thereby be close between the electronic devices and components that inserted and the wall of inner via hole, the electroconductive resin constituent after therefore utilizing silk screen print method to fill enters may reducing of gap between electronic devices and components and the inner via hole, short circuit.
Like this, the inside via hole in the present embodiment is suitable as the structure of built-in electronic components and parts very much.
[embodiment]
Below, specific embodiments of the invention are described.
(embodiment 1)
Embodiment 1 is an example utilizing in the execution mode 1 method of explanation to make circuit elements device built-in module.
Among this embodiment, for liquid epoxy resin, the epoxy resin (EPIKOTE828) that uses japan epoxy resin (Co., Ltd.) to produce.For the resin of solid, shaped, the epoxy resin (1001) that uses japan epoxy resin (Co., Ltd.) to produce.As latent curing agent, the latent curing agent (2200) that uses triple bond company to produce.As rubber components, the acrylic acid modified resin (HTR-860P-3) that uses Imperial Chemical Industries industry (Co., Ltd.) to produce.
In addition, as inorganic filler, use Al 2O 3(clear and electrician (Co., Ltd.) production AS-20 and AS-40 are carried out mixed in equal amounts) carries out mixed mixture with 0.3 weight %, coupling agent (aginomoto (Co., Ltd.) production, phthalate, 46B) with 0.7 weight % with 6 weight %, curing agent with 6 weight %, rubber components with 2 weight %, solid epoxy with 85 weight %, liquid epoxy resin.
Then, the manufacture method of the tabular component 210 shown in the key diagram 2 (a).
At first, will in solvent, instil on mould release film with scheduled volume by the mixture of mixed thickener shape.The mixture of this thickener shape utilizes ball mill that mixing such as inorganic filler and resin were made about 60 minutes.For the mould release film used thickness is the PETG film of 75 μ m, and the demoulding that film surface is implemented to utilize silicon to carry out is handled.
Then, on mould release film, utilize the mixture of scraping skill in using a kitchen knife in cookery coating thickener shape to make its thickness become 200 μ m, obtain tabular mixture.Then, the tabular mixture that is formed on the mould release film is heated, heat-treat losing under the adhering condition of tabular mixture by each mould release film.In the heat treatment, 80 ℃ temperature were kept 30 minutes.Utilize this heat treatment,, therefore become and peel off mould release film easily owing to make the adhesiveness forfeiture of tabular mixture.
Then, peel off mould release film, after overlapping 4 tabular mixtures, utilize coverlay (PPS: polyphenylene sulfide, thickness are 16 μ m) to clip, by on one side with 1kg/cm from tabular mixture 2Pressure pressurize on one side and to heat with 80 ℃ temperature, thereby make the member behind overlapping 4 tabular mixtures is pasted tabular component 210 (with reference to Fig. 2 (a)) behind the coverlay 201.
Thus, can prepare the electrical insulating property substrate raw materials 202 that thickness is about 800 μ m, is formed with coverlay 201 on the two sides.Then, on electrical insulating property substrate raw materials 202, use perforating press to be formed for carrying out the through hole (diameter is 0.25mm) (with reference to Fig. 2 (b)) that inner via hole connects to each coverlay 201.
Then, utilize this through hole filled conductive resin combination 111 ' of silk screen printing normal direction (with reference to Fig. 2 (c)).Electroconductive resin constituent 111 ' mixes and makes the ethylene oxidic ester based epoxy resin (Dongdu changes into production, YD-171) of the spherical copper particle of 85 weight %, the bisphenol A type epoxy resin of 3 weight % (japan epoxy resin epoxy system, EPIKOTE828), 9 weight % and the amine adduct curing agent (aginomoto production, MY-24) of 3 weight %.
Then, with 120 ℃ the electrical insulating property substrate raw materials 202 that is filled with electroconductive resin constituent 111 ' is carried out 5 minutes heating.Utilize this operation, shrink, become the outstanding shape (with reference to Fig. 2 (d)) of the electroconductive resin constituent of being filled 111 ' at the diameter of this central portion 103a of inner via hole 103 mesopore.At this moment, the diameter in the hole of central portion 103a is compared with peristome 103b becomes about 15～20% the state that shrinks.
Then, peel off coverlay 201 (with reference to Fig. 2 (e)) from electrical insulating property substrate raw materials 202, the 1st substrate 101 and the 2nd substrate 108 that is formed with electrode of substrate 102 in desirable position and the electrical insulating property substrate raw materials 202 that is formed with inner via hole 103 are carried out stacked (with reference to Fig. 2 (f)), utilize hot press with 180 ℃ of pressed temperatures, pressure 20kg/cm 2This duplexer was carried out pressurized, heated 60 minutes.
Utilize this heating, make epoxy resin in the electrical insulating property substrate raw materials 202 and the epoxy resin cure in the electroconductive resin constituent 111 ', the semiconductor element in the electrical insulating property substrate raw materials 202 (with reference to the semiconductor chip 105 of Fig. 1) mechanically is connected with electrical insulating property substrate raw materials 202 securely with electrode of substrate 102.In addition, utilize this heating, with electroconductive resin constituent 111 ' and electrode of substrate 102 on electric (inner via hole is connected), mechanically connect, make circuit elements device built-in module 270 as shown in Figure 8.
In this circuit elements device built-in module 270,500 inside via holes 103 that are filled with electroconductive resin constituent 111 are connected in series, make 100 this samples after 500 inner via holes 103 are connected in series.
In order to assess the reliability of the circuit elements device built-in module that utilizes the present embodiment making, solder reflow test and temperature cycling test have been carried out.Solder reflow test is to use belt backflow test machine, by carrying out with 260 ℃ of circulations of 10 seconds that repeat 10 times of maximum temperature.In addition, temperature cycling test is to be undertaken by 30 minutes operation of maintenance after 125 ℃ keep 30 minutes down, under-60 ℃ temperature is repeated 1000 circulations.
(comparative example 1)
The electrical insulating property substrate of the circuit elements device built-in module of comparative example 1 is to use the Al that comprises 85 weight % 2O 3(adopting clear and electrician (Co., Ltd.) the production AS-20 and the AS-40 of equivalent) with as the coupling agent (aginomoto (Co., Ltd.) production, phthalate, 46B) of the curing agent of the solid epoxy of the liquid epoxy resin of inorganic filler, 4 weight %, 10 weight %, 0.3 weight %, 0.7 weight % with what make as the mixture of component.That is, the mixture that forms the electrical insulating property substrate in the mixture that uses in this comparative example 1 and the foregoing description 1 is compared, do not comprise on the rubber components this point different.
In addition as manufacturing process, do not carry out the outstanding heating process of electroconductive resin constituent that making shown in Fig. 2 (d) filled, as remaining operation in addition, then utilize the operation identical to make with embodiment 1.
The result of solder reflow test and temperature cycling test is, no matter be in any test, circuit elements device built-in module for present embodiment 1, the resistance value that the inside via hole that utilizes the electroconductive resin constituent to carry out connects (removing wiring portion, the resistance value that only inner via hole connects) is having 10% with interior rate of change around the on-test.In addition, the result that the cross section of after test inner via portion being divided is observed is to produce and break, even the use ultrasonic flaw detecting device also finds no special unusual.
Different therewith is, in the comparative example 1, the resistance change that inner via hole connects surpasses 10% sample and surpassed 10%, and in cross-section, resistance change surpasses in 10% the sample in addition, exists to observe to produce the sample that breaks.This is in comparative example 1, thinking that difference because of the thermal expansion between the insulating material of electroconductive resin constituent and electrical insulating property substrate produces breaks, and in present embodiment 1, thereby think can be by keeping inner via hole wall and the intensity of being close between the electroconductive resin constituent suppress the generation of breaking.
(comparative example 2)
In addition, as a comparative example 2, compare with embodiment 1, except the heating process that the diameter in the hole of the central portion that do not make inner via hole shrinks, use with embodiment 1 identical materials, manufacture method and make sample, implemented above-mentioned solder reflow test and temperature cycling test for the sample of made.
In addition, in the sample of comparative example 2 mades, the central portion of inner via hole is 0% with respect to the shrinkage of peristome.
(embodiment 2)
In addition, as embodiment 2, compare with embodiment 1, in the operation that the diameter at the central portion that makes inner via hole shrinks, with 80 ℃ of heating 3 minutes, use condition, the manufacture method identical to make sample, implemented above-mentioned solder reflow for the sample of made and tested and temperature cycling test with embodiment 1.
In addition, in the sample of embodiment 2 mades, the central portion of inner via hole is about 3～5% with respect to the shrinkage of peristome.
The result of solder reflow test and temperature cycling test is that in comparative example 2, the resistance change that inner via hole connects has produced 5% approximately above 10% sample.
On the other hand, in the foregoing description 2, the resistance change that inner via hole connects has produced 2% approximately above 10% sample.
As mentioned above, according to (embodiment 1) and (comparative example 2) as can be known,, thereby can obtain reliability height, the measured circuit elements device of matter built-in module by the heat treated that inner via hole is shunk.
Further, according to (embodiment 1) and (comparative example 1) as can be known, by adding rubber components, go forward side by side and exercise the heat treated that inner via hole shrinks, thereby can obtain that reliability is higher, the circuit elements device built-in module of better quality to the mixture that forms the electrical insulating property substrate.
In addition, in (embodiment 2), compare with (embodiment 1), although because heat treated makes percent thermal shrinkage less, compare as can be known with (comparative example 1) and (comparative example 2), the reliability of circuit elements device built-in module and quality improve.
(embodiment 3)
Embodiment 3 is examples utilizing in the execution mode 2 method of explanation to make circuit elements device built-in module.
Among this embodiment, use with embodiment 1 identical materials and make circuit elements device built-in module.Prepare the electrical insulating property substrate raw materials that is formed with coverlay on two surfaces that thickness is about 800 μ m, use perforating press to be formed for carrying out the through hole (diameter 0.25mm) (with reference to Fig. 7 (b)) that inner via hole connects.
Then, insert the sheet components and parts 107 (for example, resistance) (with reference to Fig. 7 (c)) of 0603 size to desirable inner via hole 103.In the present embodiment, insert 0 Ω resistance.
Then, the heating process (80 ℃, 10 minutes) (with reference to Fig. 7 (d)) that inner via hole 103 is shunk.At this moment, if make its contraction bigger, then, therefore should be noted that owing to can't utilize heating process to shrink once more.
Then, utilize this through hole filled conductive resin combination 111 ' of silk screen printing normal direction (with reference to Fig. 7 (e)).At this moment, use printing machine and utilize silk screen printing after single face filled conductive resin combination, it is overturn once more from single face filled conductive resin combination.Thus, configuration electroconductive resin constituent 111 ' between sheet components and parts 107 that inserted and electrode of substrate 102.
Then, with 120 ℃ the electrical insulating property substrate raw materials 202 that is filled with electroconductive resin constituent 111 ' is carried out 5 minutes heating.Utilize this operation, the diameter in the hole among this central portion 103a of inner via hole 103 is shunk, become the outstanding shape (with reference to Fig. 7 (f)) of electroconductive resin constituent of being filled.By carrying out this heating process, thereby remaining residual stress is discharged so that inner via hole 103 shrinks with the temperature higher than the heating process of last time.
Then, peel off coverlay 201 (with reference to Fig. 7 (g)) from electrical insulating property substrate raw materials 202, the 1st substrate 101 and the 2nd substrate 108 that are formed with electrode of substrate 102 in desirable position and the electrical insulating property substrate raw materials 202 that is formed with inner via hole 103 are carried out stacked, and utilize hot press with 180 ℃ of pressed temperatures, pressure 20kg/cm it 2Carried out pressurized, heated 60 minutes (with reference to Fig. 7 (h)).
Utilize this heating, make epoxy resin in the electrical insulating property substrate raw materials 202 and the epoxy resin cure in the electroconductive resin constituent 111 ', the semiconductor element in the electrical insulating property substrate raw materials 202 mechanically is connected with electrical insulating property substrate raw materials 202 securely with Copper Foil as electrode of substrate 102.In addition, utilize this heating, the electrode that make electroconductive resin constituent 111 and electrode of substrate 102, is configured in the sheet components and parts 107 in the inner via hole 103 and electrode of substrate 102 on electric (inner via hole is connected), mechanically connect.
And afterwards, the heat that utilization applies when the outer layer surface of the circuit elements device built-in module of made is installed components and parts, make the electrode 107a fusion of the sheet components and parts 107 that insert inner via hole 103, carry out metal bonding with the metallic stuffing in the electroconductive resin constituent 111 ', thereby form firm syndeton.
(comparative example 3)
In addition, as a comparative example 3, compare with embodiment 3, except in through hole, insert electronic devices and components (sheet components and parts 107) afterwards, make the heating process (Fig. 7 (d)) that inner via hole 103 shrinks, use condition, the manufacture method identical to make with embodiment 3.
(comparative example 4)
In addition, as a comparative example 4, compare with embodiment 3, except utilize silk screen print method to through hole filled conductive resin combination 111 ' afterwards, make the heating process (Fig. 7 (f)) that inner via hole 103 shrinks, use condition, the manufacture method identical to make with embodiment 3.
To the sample of made in these embodiment 3, comparative example 3, the comparative example 4, identical with execution mode 1, carried out solder reflow test and temperature cycles.
Among the embodiment 3, inner via hole connects and the resistance value that is built-in with the via hole of components and parts is having 10% with interior rate of change around the on-test, the result that the cross section of after test inner via portion being divided is observed is, do not produce and break, even the use ultrasonic flaw detecting device also finds no special unusual.
In the comparative example 3, in the filling work procedure of the electroconductive resin constituent after inserting components and parts, coming off of components and parts taken place.In addition, although components and parts do not come off, but move towards the opposing face lateral deviation at components and parts from the one-sided filling work procedure that carries out, and make its upset once more from the operation of one-sided filled conductive resin combination, taken place can't the filled conductive resin combination unfavorable condition, produced the sample that unfavorable condition takes place on being electrically connected.
In the comparative example 4, the result of solder reflow test and temperature cycling test is that the resistance change that inner via hole connects has produced 5% approximately above 10% sample.In addition, inserting resistance change that the inside via hole of the inside via hole of components and parts connects surpasses 10% sample and has produced 3% approximately.
Industrial practicality
Circuit parts installation module involved in the present invention and the manufacture method of circuit parts installation module have the effect of the reliability that possesses thermal diffusivity and electrical connection, are useful as circuit parts installation module etc.
Label declaration
100,250,260,300 circuit parts installation modules
101 the 1st substrates
102 electrode of substrate
103 inner via holes
104 electrical insulating property substrates
105 semiconductor chips
106 sheet components and parts
107 sheet components and parts
108 the 2nd substrates
109 sealing resins
110,261,262 components and parts build-up layer
111 electroconductive resin constituents
201 coverlays
205 overflow part
400 circuit elements device built-in modules
401a, 401b, 401c insulating properties substrate
402a, 402b, 402c wiring pattern
403a, 403b circuit elements device
404 inner via holes.

Claims (8)

1. the interlayer that the manufacture method of a circuit elements device built-in module, described circuit elements device built-in module use conductive composition to carry out on electric connects, and comprising:
Inner via hole forms operation, and this inside via hole forms in operation, on the raw-material thickness direction of insulated substrate through hole is set, and forms one or more and is used to carry out the inside via hole that the interlayer on electric connects;
Filling work procedure is in this filling work procedure, to described inner via hole filled conductive constituent;
Heating process in this heating process, heats so that the diameter of the central portion of described inner via hole is compared little with the diameter of peristome;
Stacked operation in this stacked operation, disposes respectively and laminate component on raw-material two surfaces of described insulated substrate; And
The pressurized, heated operation in this pressurized, heated operation, is pressurizeed and is heated the raw material of the described insulated substrate after stacked and described member.
2. the manufacture method of circuit elements device built-in module as claimed in claim 1 is characterized in that, also comprises:
Paste operation, this is pasted in the operation, coverlay is pasted the raw material of described insulated substrate; And
Stripping process in this stripping process, after described heating process, is peeled off described coverlay from the raw material of described insulated substrate,
It is the operation that described through hole is set on the raw material of described coverlay and described insulated substrate that described inner via hole forms operation,
Described filling work procedure is to utilize the described inner via hole of silk screen printing normal direction to fill the operation of described conductive composition.
3. the manufacture method of circuit elements device built-in module as claimed in claim 1 is characterized in that,
It is to utilize punching processing that the operation of described through hole is set that described inner via hole forms operation.
4. the manufacture method of circuit elements device built-in module as claimed in claim 2 is characterized in that,
It is to utilize punching processing that the operation of described through hole is set that described inner via hole forms operation.
5. a circuit elements device built-in module is to utilize the manufacture method manufacturing as each the described circuit elements device built-in module in the claim 1 to 4 to form, it is characterized in that,
Described inner via hole is following shape: the diameter of described central portion is compared with the diameter of described peristome and is wanted little by 10%～50%.
6. circuit elements device built-in module as claimed in claim 5 is characterized in that,
Described insulated substrate is to utilize the material that comprises inorganic filler and resin Composition to form,
Comprise the described inorganic filler of 70～95 weight % in the described material,
Comprise heat reactive resin and rubber components in the described resin Composition,
Described rubber components is that molecular weight comprises 70 weight % to 95 weight % more than 50,000 and in described resin.
7. circuit elements device built-in module as claimed in claim 5 is characterized in that,
In all or part of described inner via hole, dispose the circuit elements device.
8. the manufacture method of circuit elements device built-in module as claimed in claim 1 is characterized in that, comprising:
Components and parts insert operation, and these components and parts insert in the operation, and the circuit elements device is inserted all or part of described inner via hole; And
The clamping operation, in this clamping operation, heat so that the diameter of the central portion of described inner via hole compare with the diameter of peristome little, thereby the described circuit elements device that clamping is inserted,
Described filling work procedure is the operation of also filling described conductive composition in the described inner via hole that is inserted with described components and parts.
CN201110078358.2A 2010-03-25 2011-03-22 Circuit component built-in module and manufacturing method therefor Expired - Fee Related CN102201349B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109808132A (en) * 2017-11-21 2019-05-28 东和株式会社 The manufacturing method of carrying device, resin molding apparatus and resin forming product
CN111683471A (en) * 2019-03-11 2020-09-18 株式会社村田制作所 Multilayer wiring board
CN114068441A (en) * 2020-08-03 2022-02-18 日本航空电子工业株式会社 Device and forming method thereof

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106132113B (en) * 2016-07-05 2018-12-07 惠州市金百泽电路科技有限公司 The production method of component pcb board built in a kind of cover film protectionization is golden
CN110678960B (en) * 2017-06-01 2023-07-14 三菱电机株式会社 Method for manufacturing semiconductor device

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0233996A (en) * 1988-07-23 1990-02-05 Hokuriku Electric Ind Co Ltd Circuit board and manufacture thereof
JPH08172266A (en) * 1995-07-21 1996-07-02 Hokuriku Electric Ind Co Ltd Manufacture of circuit board
JPH1117326A (en) * 1997-06-24 1999-01-22 Matsushita Electric Works Ltd Method for soldering electronic parts
CN1214545A (en) * 1997-10-02 1999-04-21 松下电器产业株式会社 Semiconductor encapsulation and its manufacture
CN1219837A (en) * 1997-11-25 1999-06-16 松下电器产业株式会社 Built-in circuit device assembly and its manufacturing method
JP2001111183A (en) * 1999-10-12 2001-04-20 Sony Corp Printed wiring board for reliability evaluation
JP2001210955A (en) * 2000-01-27 2001-08-03 Matsushita Electric Ind Co Ltd Producing method for double-faced wiring board with built-in component and electronic circuit structure
CN1366444A (en) * 2000-12-27 2002-08-28 松下电器产业株式会社 Parts built-in module and its making method
JP2003243835A (en) * 2002-02-14 2003-08-29 Hitachi Chem Co Ltd Thermosetting adhesive film, multilayer printed wiring board and its producing method
CN1543291A (en) * 2003-02-18 2004-11-03 ���µ�����ҵ��ʽ���� Electronic component built-in module and method of manufacturing the same
CN1779971A (en) * 2004-10-22 2006-05-31 松下电器产业株式会社 Semiconductor device and method for producing the same
JP2006186058A (en) * 2004-12-27 2006-07-13 Matsushita Electric Ind Co Ltd Module comprising built-in component and manufacturing method thereof
JP2007118323A (en) * 2005-10-26 2007-05-17 Matsushita Electric Works Ltd Epoxy resin/inorganic matter composite sheet, circuit board and three-dimensional circuit board
CN101316485A (en) * 2007-05-28 2008-12-03 松下电器产业株式会社 Electronic component module and method of manufacturing the same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004274035A (en) * 2003-02-18 2004-09-30 Matsushita Electric Ind Co Ltd Module having built-in electronic parts and method of manufacturing same

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0233996A (en) * 1988-07-23 1990-02-05 Hokuriku Electric Ind Co Ltd Circuit board and manufacture thereof
JPH08172266A (en) * 1995-07-21 1996-07-02 Hokuriku Electric Ind Co Ltd Manufacture of circuit board
JPH1117326A (en) * 1997-06-24 1999-01-22 Matsushita Electric Works Ltd Method for soldering electronic parts
CN1214545A (en) * 1997-10-02 1999-04-21 松下电器产业株式会社 Semiconductor encapsulation and its manufacture
CN1219837A (en) * 1997-11-25 1999-06-16 松下电器产业株式会社 Built-in circuit device assembly and its manufacturing method
JP2001111183A (en) * 1999-10-12 2001-04-20 Sony Corp Printed wiring board for reliability evaluation
JP2001210955A (en) * 2000-01-27 2001-08-03 Matsushita Electric Ind Co Ltd Producing method for double-faced wiring board with built-in component and electronic circuit structure
CN1366444A (en) * 2000-12-27 2002-08-28 松下电器产业株式会社 Parts built-in module and its making method
JP2003243835A (en) * 2002-02-14 2003-08-29 Hitachi Chem Co Ltd Thermosetting adhesive film, multilayer printed wiring board and its producing method
CN1543291A (en) * 2003-02-18 2004-11-03 ���µ�����ҵ��ʽ���� Electronic component built-in module and method of manufacturing the same
CN1779971A (en) * 2004-10-22 2006-05-31 松下电器产业株式会社 Semiconductor device and method for producing the same
JP2006186058A (en) * 2004-12-27 2006-07-13 Matsushita Electric Ind Co Ltd Module comprising built-in component and manufacturing method thereof
JP2007118323A (en) * 2005-10-26 2007-05-17 Matsushita Electric Works Ltd Epoxy resin/inorganic matter composite sheet, circuit board and three-dimensional circuit board
CN101316485A (en) * 2007-05-28 2008-12-03 松下电器产业株式会社 Electronic component module and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109808132A (en) * 2017-11-21 2019-05-28 东和株式会社 The manufacturing method of carrying device, resin molding apparatus and resin forming product
CN111683471A (en) * 2019-03-11 2020-09-18 株式会社村田制作所 Multilayer wiring board
CN111683471B (en) * 2019-03-11 2023-11-21 株式会社村田制作所 Multilayer wiring board
CN114068441A (en) * 2020-08-03 2022-02-18 日本航空电子工业株式会社 Device and forming method thereof

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JP5081267B2 (en) 2012-11-28
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TWI435399B (en) 2014-04-21
JP2011204811A (en) 2011-10-13

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