CN102183726A - Field programmable gate array (FPGA)-based integrated circuit chip testing system and method - Google Patents
Field programmable gate array (FPGA)-based integrated circuit chip testing system and method Download PDFInfo
- Publication number
- CN102183726A CN102183726A CN201110063373XA CN201110063373A CN102183726A CN 102183726 A CN102183726 A CN 102183726A CN 201110063373X A CN201110063373X A CN 201110063373XA CN 201110063373 A CN201110063373 A CN 201110063373A CN 102183726 A CN102183726 A CN 102183726A
- Authority
- CN
- China
- Prior art keywords
- chip
- test
- measured
- fpga
- test vector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a field programmable gate array (FPGA)-based integrated circuit testing system, and a method for testing a digital-analog hybrid integrated circuit chip provided with a digital module or using a digital module as a main module and provided with a few analog modules by using the testing system. The system mainly comprises a personal computer (PC) machine, a main control chip, a FPGA chip, configuration information storage equipment and testing vector storage equipment. The testing method is implemented by the following steps that: the main control chip configures the FPGA chip, the main control chip sends a testing command to the FPGA chip, the FPGA chip sends an excitation signal to a chip to be tested and acquires the output response of the chip to be tested, or the analog parameter module acquires analog output response, the FPGA chip compares the output response or the analog output response of the chip to be tested with the testing information and judges the consistency of the output response and the testing information, and the chip to be tested is an accepted product or a defective product is judged. The system and the method can be widely applied in the field of integrated circuit chip test.
Description
Technical field
The present invention relates to a kind of IC chip test system based on FPGA, and utilize this test macro to the integrated circuit (IC) chip of band digital module or based on digital module, have the method that the hybrid digital-analog integrated circuit chip of a small amount of analog module is tested.
Background technology
Development along with IC industry, the testing cost proportion of integrated circuit (IC) chip is constantly soaring, integrated circuit (IC) design company often needs to seek professional chip testing machine chip is tested in chip design with after producing, to discern and to pick out bad sheet, have only by the qualified chip of test and just can sell use.At present domestic IC chip test is mainly bought the board test voluntarily or is entrusted professional testing agency to test by integrated circuit (IC) design company.But because the professional test machine costs an arm and a leg, domestic design corporation generally is unwilling substantial contribution is put on the equipment of buying costliness, and simultaneously domestic professional testing agency is few, causes the measurement examination of chip to become the big bottleneck that product can not put goods on the market fast.In the market based on digital module, in addition the integrated circuit of a small amount of analog module is very many, the design cycle is short, with low cost, shipment amount is big, and is therefore also relatively tight to the testing cost control of this type of chip.
Summary of the invention
Technical matters to be solved by this invention is to overcome the deficiencies in the prior art, provide a kind of simple in structure, be easy to carry, cost is lower, the IC chip test system based on FPGA of stable performance.
The present invention also provides a kind of said integrated circuit chip test system that utilizes to come to the integrated circuit (IC) chip of band digital module or based on digital module, have the method that the hybrid digital-analog integrated circuit chip of a small amount of analog module is tested; by this method, can reach test period short, testing cost is low, test effect fast.
A kind of technical scheme that is adopted based on the IC chip test system of FPGA of the present invention is: this system comprises PC, main control chip, fpga chip, configuration information memory device, test vector memory device,
Described configuration information memory device is used to store the configuration information that described fpga chip is configured;
Described test vector memory device is used to store the test vector that compares with chip to be measured;
Described main control chip is used to dispose described fpga chip, controls described fpga chip chip to be measured is tested, and the test result that described fpga chip feeds back is sent to described PC;
Described PC is used to the test result that shows that described main control chip sends;
Described fpga chip is used to receive the test command that described main control chip sends, and read test vector from described test vector memory device is tested chip to be measured, judges whether chip to be measured is non-defective unit, and test result is fed back to described main control chip.
Described IC chip test system based on FPGA also comprises the analog parameter module, and described analog parameter module is used to test the analog parameter value of chip to be measured, and test value is sent to described fpga chip.
Described IC chip test system based on FPGA also comprises the mechanical arm interface, and described mechanical arm interface is used for being connected with peripheral mechanical arm and controlling the classification that described mechanical arm carries out chip under test.
Described PC also can be used for revising the configuration information in the described configuration information memory device, perhaps is used for upgrading the test vector of described test vector memory device, to adapt to the test request of different chips to be measured.
Described fpga chip comprises CPU, clock generator, test vector storer, timer, mobile storage interface, serial data interface.
Described test vector memory device is USB flash disk or SD card or MS card.
A kind of technical scheme that is adopted based on the IC chip test method of FPGA of the present invention may further comprise the steps:
(1) described main control chip comes the configuration information that is stored in the described configuration information memory device described fpga chip is configured, and it is configured to and corresponding control of chip to be measured and FPDP processor;
(2) described main control chip sends test command to described fpga chip;
(3) after described fpga chip receives test command, read test vector from described test vector memory device, and the test vector that reads carried out information analysis, the sequential of the detecting information in the described test vector by test request is transferred to chip to be measured with pumping signal
(4) described fpga chip is gathered the output response after chip to be measured is encouraged;
(5) described fpga chip compares the detecting information in the output of the chip to be measured that collects response and the described test vector, judges the consistance of comparative result;
(6) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products.
Perhaps, adopt described IC chip test system to come the method that integrated circuit (IC) chip is tested be may further comprise the steps based on FPGA:
(a) described main control chip comes the configuration information that is stored in the described configuration information memory device described fpga chip is configured, and it is configured to and corresponding control of chip to be measured and FPDP processor;
(b) described main control chip sends test command to described fpga chip;
(c) after described fpga chip receives test command, read test vector from described test vector memory device, and the test vector that reads carried out information analysis, the sequential of the detecting information in the described test vector by test request is transferred to chip to be measured with pumping signal;
If include digital module in the chip to be measured, then turn to following steps:
(d) described fpga chip is gathered the output response after chip to be measured is encouraged;
(e) described fpga chip compares the detecting information in the output of the chip to be measured that collects response and the described test vector, judges the consistance of comparative result;
(f) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products;
If include analog module in the chip to be measured, then turn to following steps:
(g) described analog parameter module is gathered the simulation output response after chip to be measured is encouraged and response is exported in the simulation that collects and sends to described fpga chip;
(h) described fpga chip compares the detecting information in the simulation of the chip to be measured that receives output response and the described test vector, judges the consistance of comparative result;
(i) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products.
The invention has the beneficial effects as follows: mainly comprise PC, main control chip, fpga chip and some peripheral memory devices owing to the present invention is based on the IC chip test system of FPGA, both can test the digital module of chip to be measured, can test the analog module of chip to be measured again, and whole test system is as a test macro and need not to cooperate with other test machines and just can finish chip testing independently, so test macro of the present invention structurally is comparatively simple, this is easy to carry; Because the whole cost of test macro of the present invention mainly is to concentrate on the described fpga chip, other all are the components and parts of using always as components and parts such as main control chips, and described fpga chip all is cheaply, so cost of testing system of the present invention is cheap; Because test macro of the present invention as long as described fpga chip is provided with, just can be tested chip to be measured, and other components and parts can not change, so test macro performance of the present invention is stable.
Because the present invention is based on the IC chip test method of FPGA is to utilize described main control chip to dispose described fpga chip, and then utilize described fpga chip to come chip to be measured is detected, its test speed is fast, so method of testing test period weak point of the present invention has reduced testing cost simultaneously indirectly.
Because system of the present invention is connected with the PC of periphery, can show test results by described PC, perhaps revise the described configuration information and the test vector that upgrades in the described test vector memory device that is stored in the described configuration information memory device, to tackle the test request of different money chips, so the present invention disposes conveniently, perfect in shape and function.
Because test frequency, the detecting information in the described test vector among the present invention, communication port is all adjustable, so the present invention can solve the excitation when chip to be measured is tested and the sequence problem of sampling.
Because the described main control chip in the system of the present invention also is connected with mechanical arm by described mechanical arm interface, the instruction that described mechanical arm can send according to main control chip, chip → test chip → robotization sorting chips is got in the realization robotization, so the present invention both can be manually to sorting chips, also can realize that test is full-automatic, greatly improve testing efficiency by described mechanical arm.
Total system volume of the present invention and quality are all smaller, easy to carry, are easy to safeguard and debugging.
Description of drawings
Fig. 1 is a theory diagram of the present invention;
Fig. 2 is the process flow diagram of the embodiment of the invention one;
Fig. 3 is the process flow diagram of the embodiment of the invention two;
Fig. 4 is described fpga chip structural drawing.
Embodiment
Embodiment one:
As shown in Figure 1 and Figure 2, the present invention relates to be a kind of based on FPGA the IC chip test system and utilize this test macro to come the method that the integrated circuit (IC) chip that has digital module is tested.In the present embodiment, described test macro comprises PC, main control chip, fpga chip, configuration information memory device, test vector memory device and mechanical arm interface.Described test vector memory device can be USB flash disk or SD card or MS card.As shown in Figure 4, described fpga chip comprises CPU, clock generator, test vector storer, timer, mobile storage interface, serial data interface.Between described PC and the described main control chip, between described main control chip and the described fpga chip, between described main control chip and the described configuration information memory device, between described PFGA chip and the described test vector memory device, all realize being connected between described fpga chip and the chip to be measured.Described mechanical arm interface is used for being connected with peripheral mechanical arm and controlling described mechanical arm and carry out sorting chips, the instruction that described mechanical arm can send according to described main control chip, chip under test on production line realization robotization is got chip → test chip → robotization to sorting chips, separately, greatly improved testing efficiency through test and the chip that is defined as non-defective unit and defective products.
Described configuration information memory device is used to store the configuration information that described fpga chip is configured; Described test vector memory device is used to store the test vector that compares with chip to be measured; Described main control chip is used to dispose described fpga chip, controls described fpga chip chip to be measured is tested, and the test result that described fpga chip feeds back is sent to described PC; Described PC is used to the test result that shows that described main control chip sends, perhaps be used for revising the configuration information of described configuration information memory device, perhaps be used for upgrading the test vector of described test vector memory device, to adapt to the test request of different chips to be measured; Described fpga chip is used to receive the test command that described main control chip sends, and read test vector from described test vector memory device is tested chip to be measured, judges whether chip to be measured is non-defective unit, and test result is fed back to described main control chip.
In the present embodiment, only have digital module in the chip to be measured, a kind of technical scheme that is adopted based on the IC chip test method of FPGA of the present invention may further comprise the steps:
(1) described main control chip comes the configuration information that is stored in the described configuration information memory device described fpga chip is configured, and it is configured to and corresponding control of chip to be measured and FPDP processor;
(2) described main control chip sends test command to described fpga chip;
(3) after described fpga chip receives test command, read test vector from described test vector memory device, and the test vector that reads carried out information analysis, the sequential of the detecting information in the described test vector by test request is transferred to chip to be measured with pumping signal
(4) described fpga chip is gathered the output response after chip to be measured is encouraged;
(5) described fpga chip compares the detecting information in the output of the chip to be measured that collects response and the described test vector, judges the consistance of comparative result;
(6) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products.
When judging that chip under test is a defective products, described fpga chip will be at the relevant position of described test vector mark failpoint, and failure conditions is noted, and searches by failure analysis and problem, find out failure cause, so that chip under test is repaired or directly re-designed.
Described fpga chip can adopt the low-cost fpga chip of ALTERA cyclone III EP3C25, EP3C40 series.
Embodiment two:
The difference of present embodiment and embodiment one is: in the described chip to be measured except including digital module, also include analog module, correspondingly, in IC chip test system, also include the analog parameter module based on FPGA, described analog parameter module is used to test the analog parameter value of chip to be measured, and test value is sent to described fpga chip.Testing procedure when in the present embodiment, adopting described IC chip test system based on FPGA to come chip to be measured tested is as follows:
(a) described main control chip comes the configuration information that is stored in the described configuration information memory device described fpga chip is configured, and it is configured to and corresponding control of chip to be measured and FPDP processor;
(b) described main control chip sends test command to described fpga chip;
(c) after described fpga chip receives test command, read test vector from described test vector memory device, and the test vector that reads carried out information analysis, the sequential of the detecting information in the described test vector by test request is transferred to chip to be measured with pumping signal;
Below be the step that the digital module that comprises in the chip to be measured is tested:
(d) described fpga chip is gathered the output response after chip to be measured is encouraged;
(e) described fpga chip compares the detecting information in the output of the chip to be measured that collects response and the described test vector, judges the consistance of comparative result;
(f) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products.
Below be the step that the analog module that includes in the chip to be measured is tested:
(g) described analog parameter module is gathered the simulation output response after chip to be measured is encouraged and response is exported in the simulation that collects and sends to described fpga chip;
(h) described fpga chip compares the detecting information in the simulation of the chip to be measured that receives output response and the described test vector, judges the consistance of comparative result;
(i) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products.
The analog parameter module that uses in above-mentioned steps can be set to ADC chip comparatively accurately.
The present invention can be widely used in the IC chip test field.
Claims (8)
1. IC chip test system based on FPGA, it is characterized in that: described system comprises PC, main control chip, fpga chip, configuration information memory device, test vector memory device,
Described configuration information memory device is used to store the configuration information that described fpga chip is configured;
Described test vector memory device is used to store the test vector that compares with chip to be measured;
Described main control chip is used to dispose described fpga chip, controls described fpga chip chip to be measured is tested, and the test result that described fpga chip feeds back is sent to described PC;
Described PC is used to the test result that shows that described main control chip sends;
Described fpga chip is used to receive the test command that described main control chip sends, and read test vector from described test vector memory device is tested chip to be measured, judges whether chip to be measured is non-defective unit, and test result is fed back to described main control chip.
2. the IC chip test system based on FPGA according to claim 1, it is characterized in that: described IC chip test system based on FPGA also comprises the analog parameter module, described analog parameter module is used to test the analog parameter value of chip to be measured, and test value is sent to described fpga chip.
3. the IC chip test system based on FPGA according to claim 1, it is characterized in that: described IC chip test system based on FPGA also comprises the mechanical arm interface, and described mechanical arm interface is used for being connected with peripheral mechanical arm and controlling described mechanical arm and carry out sorting chips.
4. the IC chip test system based on FPGA according to claim 1, it is characterized in that: described PC also can be used for revising the configuration information in the described configuration information memory device, perhaps be used for upgrading the test vector of described test vector memory device, to adapt to the test request of different chips to be measured.
5. the IC chip test system based on FPGA according to claim 1 is characterized in that: described fpga chip comprises CPU, clock generator, test vector storer, timer, mobile storage interface, serial data interface.
6. the IC chip test system based on FPGA according to claim 1 is characterized in that: described test vector memory device is USB flash disk or SD card or MS card.
7. one kind is adopted the described IC chip test system based on FPGA of claim 1 to come the method that integrated circuit (IC) chip is tested, and it is characterized in that this method may further comprise the steps:
(1) described main control chip comes the configuration information that is stored in the described configuration information memory device described fpga chip is configured, and it is configured to and corresponding control of chip to be measured and FPDP processor;
(2) described main control chip sends test command to described fpga chip;
(3) after described fpga chip receives test command, read test vector from described test vector memory device, and the test vector that reads carried out information analysis, the sequential of the detecting information in the described test vector by test request is transferred to chip to be measured with pumping signal;
(4) described fpga chip is gathered the output response after chip to be measured is encouraged;
(5) described fpga chip compares the detecting information in the output of the chip to be measured that collects response and the described test vector, judges the consistance of comparative result;
(6) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products.
8. one kind is adopted the described IC chip test system based on FPGA of claim 2 to come the method that integrated circuit (IC) chip is tested, and it is characterized in that this method may further comprise the steps:
(a) described main control chip comes the configuration information that is stored in the described configuration information memory device described fpga chip is configured, and it is configured to and corresponding control of chip to be measured and FPDP processor;
(b) described main control chip sends test command to described fpga chip;
(c) after described fpga chip receives test command, read test vector from described test vector memory device, and the test vector that reads carried out information analysis, the sequential of the detecting information in the described test vector by test request is transferred to chip to be measured with pumping signal;
If include digital module in the chip to be measured, then turn to following steps:
(d) described fpga chip is gathered the output response after chip to be measured is encouraged;
(e) described fpga chip compares the detecting information in the output of the chip to be measured that collects response and the described test vector, judges the consistance of comparative result;
(f) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products;
If include analog module in the chip to be measured, then turn to following steps:
(g) described analog parameter module is gathered the simulation output response after chip to be measured is encouraged and response is exported in the simulation that collects and sends to described fpga chip;
(h) described fpga chip compares the detecting information in the simulation of the chip to be measured that receives output response and the described test vector, judges the consistance of comparative result;
(i) comparative result is judged as unanimity, judges that then chip to be measured is a non-defective unit, and comparative result is judged as inconsistent, judges that then chip to be measured is a defective products.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110063373XA CN102183726A (en) | 2011-03-16 | 2011-03-16 | Field programmable gate array (FPGA)-based integrated circuit chip testing system and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110063373XA CN102183726A (en) | 2011-03-16 | 2011-03-16 | Field programmable gate array (FPGA)-based integrated circuit chip testing system and method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102183726A true CN102183726A (en) | 2011-09-14 |
Family
ID=44569927
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110063373XA Pending CN102183726A (en) | 2011-03-16 | 2011-03-16 | Field programmable gate array (FPGA)-based integrated circuit chip testing system and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102183726A (en) |
Cited By (60)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102854455A (en) * | 2012-09-21 | 2013-01-02 | 成都市中州半导体科技有限公司 | Integrated circuit testing system and control method for same |
| CN103049357A (en) * | 2011-10-12 | 2013-04-17 | 中盈创信(北京)商贸有限公司 | Electronic circuit product chip scale maintenance intelligent detection card |
| CN103176120A (en) * | 2011-12-22 | 2013-06-26 | 英业达股份有限公司 | Signal simulating device and signal recording and simulating test method |
| CN103323768A (en) * | 2013-06-09 | 2013-09-25 | 苏州大学 | Method for specifying performance parameter test of high-speed DA chip |
| CN103472386A (en) * | 2013-09-26 | 2013-12-25 | 威海北洋电气集团股份有限公司 | Chip testing device and method based on FPGA |
| CN103760486A (en) * | 2013-12-26 | 2014-04-30 | 联合汽车电子有限公司 | Function testing device of special chip on circuit board |
| CN103809112A (en) * | 2012-11-01 | 2014-05-21 | 辉达公司 | System, method, and computer program product for testing an integrated circuit from a command line |
| CN103837824A (en) * | 2014-03-03 | 2014-06-04 | 中国科学院电子学研究所 | Automatic test system for digital integrated circuit |
| CN104780407A (en) * | 2015-01-09 | 2015-07-15 | 康佳集团股份有限公司 | Automatic testing method and automatic testing system for set top box |
| CN104866423A (en) * | 2015-05-20 | 2015-08-26 | 中国科学院空间应用工程与技术中心 | Software configuration item test method and system |
| CN105004984A (en) * | 2015-06-25 | 2015-10-28 | 深圳市芯海科技有限公司 | Automatic chip testing method |
| CN105093096A (en) * | 2015-08-13 | 2015-11-25 | 浪潮集团有限公司 | Testing device for FPGA (Field-Programmable Gate Array) |
| CN105093001A (en) * | 2014-05-20 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Automatic analysis test system for characteristics of high-speed PLL and clock chip |
| CN105162658A (en) * | 2015-09-11 | 2015-12-16 | 烽火通信科技股份有限公司 | Universal verification platform and method for development of network core chip technology |
| CN105282545A (en) * | 2015-11-25 | 2016-01-27 | 上海战诚电子科技股份有限公司 | FPGA automatic test system and test method for liquid crystal television board |
| CN105467243A (en) * | 2015-12-09 | 2016-04-06 | 上海精密计量测试研究所 | A man-machine interactive type component general test system and a test method thereof |
| CN105486998A (en) * | 2015-12-01 | 2016-04-13 | 许继电气股份有限公司 | Processor board card parameter lossless automatic test method and monitoring host device |
| CN105572566A (en) * | 2015-12-29 | 2016-05-11 | 深圳市博巨兴实业发展有限公司 | Method for FPGA self-tests facilitating problem positioning |
| CN105911451A (en) * | 2016-04-05 | 2016-08-31 | 硅谷数模半导体（北京）有限公司 | Chip test method and chip test device |
| CN106021056A (en) * | 2016-05-31 | 2016-10-12 | 四川九洲空管科技有限责任公司 | Automatic testing system and method for Arinc429 communication chip |
| CN106370992A (en) * | 2016-08-17 | 2017-02-01 | 上海华岭集成电路技术股份有限公司 | UID write-in system and method for semiconductor chip tests |
| CN106500879A (en) * | 2016-12-02 | 2017-03-15 | 深圳市华宇半导体有限公司 | Micro Energy Lose picosecond time difference signal capturing and Measurement and Control System and method |
| CN106646186A (en) * | 2016-10-10 | 2017-05-10 | 上海灵动微电子股份有限公司 | Batch testing method and batch testing system for chips |
| CN106771991A (en) * | 2017-01-23 | 2017-05-31 | 电子科技大学 | A kind of automatization testing technique being applied to before anti-fuse FPGA programming |
| CN106841973A (en) * | 2015-12-04 | 2017-06-13 | 深圳市盛德金科技有限公司 | Logic testing device and method |
| CN106872874A (en) * | 2015-12-11 | 2017-06-20 | 华大半导体有限公司 | One kind concentrates CP method of testings for RFID label chip |
| CN107515345A (en) * | 2016-06-16 | 2017-12-26 | 无锡市民卡有限公司 | A kind of automatic streamline smart card quality inspection equipment and method of testing |
| CN107589362A (en) * | 2016-07-07 | 2018-01-16 | 华大半导体有限公司 | A kind of RF tag test device based on FPGA |
| CN107832182A (en) * | 2017-11-28 | 2018-03-23 | 北斗航天汽车（北京）有限公司 | Detection means and system under vehicle-mounted chips wire |
| CN107831428A (en) * | 2017-12-06 | 2018-03-23 | 西安智多晶微电子有限公司 | Chip volume production test system |
| CN108595298A (en) * | 2018-04-28 | 2018-09-28 | 青岛海信电器股份有限公司 | A kind of chip test system and method |
| CN108627764A (en) * | 2017-03-21 | 2018-10-09 | 深圳市华宇半导体有限公司 | Bank safety chip automatization test system and its control method |
| CN108732487A (en) * | 2018-07-26 | 2018-11-02 | 上海艾为电子技术股份有限公司 | A kind of chip volume production test system and method |
| CN109426594A (en) * | 2017-08-25 | 2019-03-05 | 深圳市中兴微电子技术有限公司 | A kind of chip debugging apparatus, method and computer readable storage medium |
| CN109541440A (en) * | 2018-12-29 | 2019-03-29 | 西安智多晶微电子有限公司 | A kind of chip detecting method based on FPGA/MCU |
| CN109884511A (en) * | 2019-04-03 | 2019-06-14 | 麦歌恩电子(上海)有限公司 | A kind of test method and system of magnetic sensor chips |
| CN109884499A (en) * | 2019-02-01 | 2019-06-14 | 京微齐力(北京)科技有限公司 | A kind of method and system chip of artificial intelligence module on test macro chip |
| CN110007218A (en) * | 2018-01-04 | 2019-07-12 | 中国航发商用航空发动机有限责任公司 | Digital circuit product tester |
| CN110314864A (en) * | 2018-03-28 | 2019-10-11 | 北京君正集成电路股份有限公司 | Chip detecting method and device based on manipulator |
| CN110456257A (en) * | 2019-09-09 | 2019-11-15 | 合肥悦芯半导体科技有限公司 | Testing system for integrated circuit chip and method |
| CN110661583A (en) * | 2019-11-13 | 2020-01-07 | 青岛联众智芯科技有限公司 | Carrier chip test system |
| CN110956998A (en) * | 2019-12-02 | 2020-04-03 | 江苏芯盛智能科技有限公司 | Memory testing device and system |
| WO2020083066A1 (en) * | 2018-10-22 | 2020-04-30 | 江苏艾科半导体有限公司 | Manipulator simulation test system and test method based on fpga chip |
| CN111208407A (en) * | 2018-11-21 | 2020-05-29 | 上海春尚电子科技有限公司 | Auxiliary test system for digital integrated circuit chip |
| CN111220900A (en) * | 2020-03-02 | 2020-06-02 | 南京英锐创电子科技有限公司 | Chip scan chain test method and system |
| CN111596200A (en) * | 2020-05-25 | 2020-08-28 | 上海岱矽集成电路有限公司 | Integrated circuit tester |
| CN112067978A (en) * | 2020-09-02 | 2020-12-11 | 中科亿海微电子科技（苏州）有限公司 | FPGA screening test system and method based on FPGA |
| CN112462248A (en) * | 2021-01-06 | 2021-03-09 | 浙江杭可仪器有限公司 | Test signal output system and use method thereof |
| CN112924853A (en) * | 2021-04-12 | 2021-06-08 | 湖南国科微电子股份有限公司 | CP/FT test method, device, system, electronic equipment and medium |
| CN113311314A (en) * | 2021-05-27 | 2021-08-27 | 杭州万高科技股份有限公司 | IC time sequence verification method and device |
| CN113376514A (en) * | 2021-06-09 | 2021-09-10 | 深圳米飞泰克科技有限公司 | FPGA chip testing method, device, system and storage medium |
| WO2021179603A1 (en) * | 2020-03-11 | 2021-09-16 | 长鑫存储技术有限公司 | Method for testing control chip and related device |
| CN113409873A (en) * | 2021-06-30 | 2021-09-17 | 芯天下技术股份有限公司 | Erasing and writing interference test system and method and execution device |
| CN113589142A (en) * | 2021-07-16 | 2021-11-02 | 广东利扬芯片测试股份有限公司 | Optical chip testing device and method based on FPGA |
| CN113868069A (en) * | 2021-09-17 | 2021-12-31 | 上海贝岭股份有限公司 | MicroPython-based miniature test platform, test method and storage medium |
| CN114038490A (en) * | 2021-10-14 | 2022-02-11 | 西安紫光国芯半导体有限公司 | Three-dimensional heterogeneous integration-based consistency link memory chip |
| CN114660436A (en) * | 2022-03-11 | 2022-06-24 | 敦泰电子（深圳）有限公司 | Chip testing equipment and chip testing method |
| CN114895172A (en) * | 2022-05-10 | 2022-08-12 | 常超 | Chip testing method and system based on FPGA |
| CN115656792A (en) * | 2022-12-29 | 2023-01-31 | 摩尔线程智能科技(北京)有限责任公司 | Test method and test platform for chip testability design |
| US11867758B2 (en) | 2020-03-11 | 2024-01-09 | Changxin Memory Technologies, Inc. | Test method for control chip and related device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201434900Y (en) * | 2009-07-08 | 2010-03-31 | 天津渤海易安泰电子半导体测试有限公司 | Novel tester for integrated-circuit chip |
| CN101788640A (en) * | 2010-01-19 | 2010-07-28 | 江苏大学 | FPGA(Field Programmable Gate Array)-based transistor feature real-time measuring controller |
-
2011
- 2011-03-16 CN CN201110063373XA patent/CN102183726A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201434900Y (en) * | 2009-07-08 | 2010-03-31 | 天津渤海易安泰电子半导体测试有限公司 | Novel tester for integrated-circuit chip |
| CN101788640A (en) * | 2010-01-19 | 2010-07-28 | 江苏大学 | FPGA(Field Programmable Gate Array)-based transistor feature real-time measuring controller |
Cited By (81)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103049357B (en) * | 2011-10-12 | 2017-05-31 | 中盈创信(北京)商贸有限公司 | Electronic circuit product chip-scale maintenance intelligent detection card |
| CN103049357A (en) * | 2011-10-12 | 2013-04-17 | 中盈创信(北京)商贸有限公司 | Electronic circuit product chip scale maintenance intelligent detection card |
| CN103176120A (en) * | 2011-12-22 | 2013-06-26 | 英业达股份有限公司 | Signal simulating device and signal recording and simulating test method |
| CN102854455A (en) * | 2012-09-21 | 2013-01-02 | 成都市中州半导体科技有限公司 | Integrated circuit testing system and control method for same |
| CN103809112A (en) * | 2012-11-01 | 2014-05-21 | 辉达公司 | System, method, and computer program product for testing an integrated circuit from a command line |
| CN103323768A (en) * | 2013-06-09 | 2013-09-25 | 苏州大学 | Method for specifying performance parameter test of high-speed DA chip |
| CN103472386A (en) * | 2013-09-26 | 2013-12-25 | 威海北洋电气集团股份有限公司 | Chip testing device and method based on FPGA |
| CN103472386B (en) * | 2013-09-26 | 2017-07-28 | 威海北洋电气集团股份有限公司 | Apparatus for testing chip and method based on FPGA |
| CN103760486B (en) * | 2013-12-26 | 2018-07-20 | 联合汽车电子有限公司 | The device for testing functions and test method of special chip on circuit board |
| CN103760486A (en) * | 2013-12-26 | 2014-04-30 | 联合汽车电子有限公司 | Function testing device of special chip on circuit board |
| CN103837824A (en) * | 2014-03-03 | 2014-06-04 | 中国科学院电子学研究所 | Automatic test system for digital integrated circuit |
| CN103837824B (en) * | 2014-03-03 | 2016-08-17 | 中国科学院电子学研究所 | Digital integrated electronic circuit Auto-Test System |
| CN105093001A (en) * | 2014-05-20 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Automatic analysis test system for characteristics of high-speed PLL and clock chip |
| CN104780407A (en) * | 2015-01-09 | 2015-07-15 | 康佳集团股份有限公司 | Automatic testing method and automatic testing system for set top box |
| CN104866423A (en) * | 2015-05-20 | 2015-08-26 | 中国科学院空间应用工程与技术中心 | Software configuration item test method and system |
| CN105004984A (en) * | 2015-06-25 | 2015-10-28 | 深圳市芯海科技有限公司 | Automatic chip testing method |
| CN105093096A (en) * | 2015-08-13 | 2015-11-25 | 浪潮集团有限公司 | Testing device for FPGA (Field-Programmable Gate Array) |
| CN105093096B (en) * | 2015-08-13 | 2017-08-29 | 浪潮集团有限公司 | A kind of FPGA test device |
| CN105162658A (en) * | 2015-09-11 | 2015-12-16 | 烽火通信科技股份有限公司 | Universal verification platform and method for development of network core chip technology |
| CN105162658B (en) * | 2015-09-11 | 2018-02-13 | 烽火通信科技股份有限公司 | Generic validation platform and method for network class acp chip technological development |
| CN105282545A (en) * | 2015-11-25 | 2016-01-27 | 上海战诚电子科技股份有限公司 | FPGA automatic test system and test method for liquid crystal television board |
| CN105486998A (en) * | 2015-12-01 | 2016-04-13 | 许继电气股份有限公司 | Processor board card parameter lossless automatic test method and monitoring host device |
| CN106841973B (en) * | 2015-12-04 | 2023-12-15 | 深圳市盛德金科技有限公司 | Logic testing device and method |
| CN106841973A (en) * | 2015-12-04 | 2017-06-13 | 深圳市盛德金科技有限公司 | Logic testing device and method |
| CN105467243A (en) * | 2015-12-09 | 2016-04-06 | 上海精密计量测试研究所 | A man-machine interactive type component general test system and a test method thereof |
| CN106872874A (en) * | 2015-12-11 | 2017-06-20 | 华大半导体有限公司 | One kind concentrates CP method of testings for RFID label chip |
| CN105572566A (en) * | 2015-12-29 | 2016-05-11 | 深圳市博巨兴实业发展有限公司 | Method for FPGA self-tests facilitating problem positioning |
| CN105911451A (en) * | 2016-04-05 | 2016-08-31 | 硅谷数模半导体（北京）有限公司 | Chip test method and chip test device |
| CN106021056B (en) * | 2016-05-31 | 2018-07-13 | 四川九洲空管科技有限责任公司 | A kind of Arinc429 communication chips Auto-Test System and test method |
| CN106021056A (en) * | 2016-05-31 | 2016-10-12 | 四川九洲空管科技有限责任公司 | Automatic testing system and method for Arinc429 communication chip |
| CN107515345A (en) * | 2016-06-16 | 2017-12-26 | 无锡市民卡有限公司 | A kind of automatic streamline smart card quality inspection equipment and method of testing |
| CN107589362A (en) * | 2016-07-07 | 2018-01-16 | 华大半导体有限公司 | A kind of RF tag test device based on FPGA |
| CN106370992A (en) * | 2016-08-17 | 2017-02-01 | 上海华岭集成电路技术股份有限公司 | UID write-in system and method for semiconductor chip tests |
| CN106646186B (en) * | 2016-10-10 | 2023-05-23 | 上海灵动微电子股份有限公司 | Batch test method and system for chips |
| CN106646186A (en) * | 2016-10-10 | 2017-05-10 | 上海灵动微电子股份有限公司 | Batch testing method and batch testing system for chips |
| CN106500879A (en) * | 2016-12-02 | 2017-03-15 | 深圳市华宇半导体有限公司 | Micro Energy Lose picosecond time difference signal capturing and Measurement and Control System and method |
| CN106771991A (en) * | 2017-01-23 | 2017-05-31 | 电子科技大学 | A kind of automatization testing technique being applied to before anti-fuse FPGA programming |
| CN106771991B (en) * | 2017-01-23 | 2019-09-03 | 电子科技大学 | Automatic testing method applied to antifuse Field Programmable Gate Array (FPGA) before programming |
| CN108627764A (en) * | 2017-03-21 | 2018-10-09 | 深圳市华宇半导体有限公司 | Bank safety chip automatization test system and its control method |
| CN109426594A (en) * | 2017-08-25 | 2019-03-05 | 深圳市中兴微电子技术有限公司 | A kind of chip debugging apparatus, method and computer readable storage medium |
| CN107832182A (en) * | 2017-11-28 | 2018-03-23 | 北斗航天汽车（北京）有限公司 | Detection means and system under vehicle-mounted chips wire |
| CN107831428A (en) * | 2017-12-06 | 2018-03-23 | 西安智多晶微电子有限公司 | Chip volume production test system |
| CN110007218A (en) * | 2018-01-04 | 2019-07-12 | 中国航发商用航空发动机有限责任公司 | Digital circuit product tester |
| CN110314864A (en) * | 2018-03-28 | 2019-10-11 | 北京君正集成电路股份有限公司 | Chip detecting method and device based on manipulator |
| CN108595298A (en) * | 2018-04-28 | 2018-09-28 | 青岛海信电器股份有限公司 | A kind of chip test system and method |
| CN108732487A (en) * | 2018-07-26 | 2018-11-02 | 上海艾为电子技术股份有限公司 | A kind of chip volume production test system and method |
| US11048845B1 (en) | 2018-10-22 | 2021-06-29 | Acetec Semiconductor Co. Ltd. | FPGA chip-based handler simulation test system and a test method |
| WO2020083066A1 (en) * | 2018-10-22 | 2020-04-30 | 江苏艾科半导体有限公司 | Manipulator simulation test system and test method based on fpga chip |
| CN111208407B (en) * | 2018-11-21 | 2022-05-31 | 上海春尚电子科技有限公司 | Auxiliary test system for digital integrated circuit chip |
| CN111208407A (en) * | 2018-11-21 | 2020-05-29 | 上海春尚电子科技有限公司 | Auxiliary test system for digital integrated circuit chip |
| CN109541440A (en) * | 2018-12-29 | 2019-03-29 | 西安智多晶微电子有限公司 | A kind of chip detecting method based on FPGA/MCU |
| CN109884499B (en) * | 2019-02-01 | 2022-04-15 | 京微齐力(北京)科技有限公司 | Method for testing artificial intelligence module on system chip and system chip |
| CN109884499A (en) * | 2019-02-01 | 2019-06-14 | 京微齐力(北京)科技有限公司 | A kind of method and system chip of artificial intelligence module on test macro chip |
| CN109884511A (en) * | 2019-04-03 | 2019-06-14 | 麦歌恩电子(上海)有限公司 | A kind of test method and system of magnetic sensor chips |
| CN109884511B (en) * | 2019-04-03 | 2021-07-23 | 麦歌恩电子(上海)有限公司 | Method and system for testing magnetic sensor chip |
| CN110456257A (en) * | 2019-09-09 | 2019-11-15 | 合肥悦芯半导体科技有限公司 | Testing system for integrated circuit chip and method |
| CN110661583B (en) * | 2019-11-13 | 2023-09-05 | 青岛联众芯云科技有限公司 | Carrier Chip Test System |
| CN110661583A (en) * | 2019-11-13 | 2020-01-07 | 青岛联众智芯科技有限公司 | Carrier chip test system |
| CN110956998A (en) * | 2019-12-02 | 2020-04-03 | 江苏芯盛智能科技有限公司 | Memory testing device and system |
| CN110956998B (en) * | 2019-12-02 | 2022-01-04 | 江苏芯盛智能科技有限公司 | Memory testing device and system |
| CN111220900A (en) * | 2020-03-02 | 2020-06-02 | 南京英锐创电子科技有限公司 | Chip scan chain test method and system |
| WO2021179603A1 (en) * | 2020-03-11 | 2021-09-16 | 长鑫存储技术有限公司 | Method for testing control chip and related device |
| US11867758B2 (en) | 2020-03-11 | 2024-01-09 | Changxin Memory Technologies, Inc. | Test method for control chip and related device |
| US11862268B2 (en) | 2020-03-11 | 2024-01-02 | Changxin Memory Technologies, Inc. | Test method for control chip and related device |
| CN111596200A (en) * | 2020-05-25 | 2020-08-28 | 上海岱矽集成电路有限公司 | Integrated circuit tester |
| CN112067978A (en) * | 2020-09-02 | 2020-12-11 | 中科亿海微电子科技（苏州）有限公司 | FPGA screening test system and method based on FPGA |
| CN112462248B (en) * | 2021-01-06 | 2024-08-02 | 浙江杭可仪器有限公司 | Test signal output system and application method thereof |
| CN112462248A (en) * | 2021-01-06 | 2021-03-09 | 浙江杭可仪器有限公司 | Test signal output system and use method thereof |
| CN112924853A (en) * | 2021-04-12 | 2021-06-08 | 湖南国科微电子股份有限公司 | CP/FT test method, device, system, electronic equipment and medium |
| CN113311314A (en) * | 2021-05-27 | 2021-08-27 | 杭州万高科技股份有限公司 | IC time sequence verification method and device |
| CN113376514A (en) * | 2021-06-09 | 2021-09-10 | 深圳米飞泰克科技有限公司 | FPGA chip testing method, device, system and storage medium |
| CN113409873A (en) * | 2021-06-30 | 2021-09-17 | 芯天下技术股份有限公司 | Erasing and writing interference test system and method and execution device |
| CN113409873B (en) * | 2021-06-30 | 2024-02-02 | 芯天下技术股份有限公司 | System, method and executing device for testing erasing interference |
| CN113589142B (en) * | 2021-07-16 | 2024-04-19 | 广东利扬芯片测试股份有限公司 | Optical chip testing device and method based on FPGA |
| CN113589142A (en) * | 2021-07-16 | 2021-11-02 | 广东利扬芯片测试股份有限公司 | Optical chip testing device and method based on FPGA |
| CN113868069A (en) * | 2021-09-17 | 2021-12-31 | 上海贝岭股份有限公司 | MicroPython-based miniature test platform, test method and storage medium |
| CN113868069B (en) * | 2021-09-17 | 2024-09-13 | 上海贝岭股份有限公司 | MicroPython-based miniature test platform, test method and storage medium |
| CN114038490A (en) * | 2021-10-14 | 2022-02-11 | 西安紫光国芯半导体有限公司 | Three-dimensional heterogeneous integration-based consistency link memory chip |
| CN114660436A (en) * | 2022-03-11 | 2022-06-24 | 敦泰电子（深圳）有限公司 | Chip testing equipment and chip testing method |
| CN114895172A (en) * | 2022-05-10 | 2022-08-12 | 常超 | Chip testing method and system based on FPGA |
| CN115656792A (en) * | 2022-12-29 | 2023-01-31 | 摩尔线程智能科技(北京)有限责任公司 | Test method and test platform for chip testability design |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102183726A (en) | Field programmable gate array (FPGA)-based integrated circuit chip testing system and method | |
| CN204832267U (en) | Chip test platform | |
| CN103033738A (en) | Automatic test system for circuit board | |
| CN106680697A (en) | Test detector of digital signal processor | |
| CN109596973A (en) | The test method of chip parameter under different temperatures | |
| CN109342928A (en) | Chip testing device and method | |
| CN104459518A (en) | Function automation testing system and testing method based on SoPC chip | |
| CN102305907A (en) | Test method and system for multichip encapsulating structure | |
| CN109633419A (en) | A kind of chip detecting method based on ATE | |
| CN103855045A (en) | Adjustment method for parameters of chips on wafer | |
| CN104614656A (en) | Semiconductor chip retest system and retest method thereof | |
| CN101557598A (en) | Device and method for testing wireless baseband chips in base station side | |
| CN105929278B (en) | A kind of unsteady flow module high voltage test macro and method | |
| TWI592798B (en) | Inspection system adjusting the sequence of testing items in diagnostic program through log file and method thereof | |
| CN104751896A (en) | Built-in self-testing circuit | |
| CN106057695B (en) | A kind of wafer testing system and test method | |
| CN203178431U (en) | Full-automatic testing system for circuit boards | |
| CN116153384B (en) | Chip testing device | |
| CN106226679A (en) | For detecting frock and the method for testing thereof of embedded pos payment terminal mainboard | |
| CN107831428B (en) | Chip volume production test system | |
| CN104807562B (en) | TEMP chip test system based on labview | |
| CN104459522A (en) | Chip self-test method and system | |
| CN111060807B (en) | High-speed integrated circuit test platform based on SoC and test method thereof | |
| CN103278763B (en) | The FT test board system of chip and method of testing | |
| CN102539986A (en) | Method for improving production efficiency of compensation type crystal oscillator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20110914 |