CN102184865B - Thin film transistor and manufacturing method thereof - Google Patents
Thin film transistor and manufacturing method thereof Download PDFInfo
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- CN102184865B CN102184865B CN 201110095235 CN201110095235A CN102184865B CN 102184865 B CN102184865 B CN 102184865B CN 201110095235 CN201110095235 CN 201110095235 CN 201110095235 A CN201110095235 A CN 201110095235A CN 102184865 B CN102184865 B CN 102184865B
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Abstract
The invention relates to a thin film transistor and a manufacturing method thereof. The manufacturing method comprises the following steps of: forming a source electrode and a drain electrode which are mutually insulated on a substrate; forming a patterned oxide semiconductor layer and a pixel semiconductor layer on the substrate at the same time; forming a patterned etched barrier layer on the oxide semiconductor layer, and exposing a part of patterned oxide semiconductor layer positioned on the two sides of the patterned etched barrier layer; forming a gate insulating layer on the substrate; forming the part of patterned oxide semiconductor layer exposed by the patterned etched barrier layer into two ohmic contact layers and forming the pixel semiconductor layer into a pixel electrode at the same time in the process of forming the gate insulating layer; and forming a gate electrode on the gate insulating layer above the patterned oxide semiconductor layer.
Description
Technical field
The invention relates to a kind of thin-film transistor and manufacture method thereof, and particularly relevant for a kind of thin-film transistor and manufacture method thereof with oxide semiconductor layer.
Background technology
Recently environmental consciousness comes back, and the display panels (Liquid crystal display panels) with advantageous characteristic such as low consumpting power, space utilization efficient are good, radiationless, high image quality has become the market mainstream.
In the past, display panels mostly adopt amorphous silicon (
a-Si) thin-film transistor or low temperature polycrystalline silicon (Low-temperature polysilicon, LTPS) thin-film transistor be as the switch module of each image element structure.Yet in recent years, existing research is pointed out: compared to amorphous silicon film transistor, oxide semiconductor (oxide semiconductor) thin-film transistor has higher carrier mobility (mobility); And compared to low-temperature polysilicon film transistor, oxide semiconductor thin-film transistor has better critical voltage (threshold voltage, Vth) uniformity.Therefore, the potential key component that becomes flat-panel screens of future generation of oxide semiconductor thin-film transistor.
Generally speaking, the manufacturing process of oxide semiconductor thin-film transistor roughly can use seven road optical cover process.At first, use the first optical cover process, form gate on substrate.Then, form the lock insulating barrier to cover gate on substrate comprehensively.Then, use the second optical cover process, form oxide semiconductor layer on the lock insulating barrier of gate top.Come again, use the 3rd road optical cover process, form etch stop layer on the oxide semiconductor layer of part.Then, form dielectric layer on lock insulating barrier, oxide semiconductor layer and etch stop layer, and carry out hydrogen doping and make it be transformed into two ohmic contact layers for the oxide semiconductor layer that is positioned at etch stop layer both sides.Afterwards, utilize the 4th road optical cover process, form two openings in the dielectric layer above two ohmic contact layers, and expose respectively two ohmic contact layers.Come again, utilize the 5th road optical cover process, form source electrode and the drain be electrically insulated each other on dielectric layer, and source electrode and drain are inserted respectively in two openings and be connected with two ohmic contact layers.Then, form insulating barrier to cover source electrode and drain on substrate.Afterwards, utilize the 6th road optical cover process, form contact window to expose drain on insulating barrier.At last, utilize the 7th road light shield, form pixel electrode on substrate, this pixel electrode is inserted contact window and is electrically connected with drain.In this, just complete the making of known oxide semiconductor thin-film transistor.Yet the manufacturing process of above-mentioned oxide semiconductor thin-film transistor is complicated and cost of manufacture is high.
Summary of the invention
In view of this, the invention provides a kind of manufacture method of thin-film transistor, can simplify the processing procedure of thin-film transistor and reduce cost of manufacture.
The present invention also provides a kind of thin-film transistor, has simple structure and cost of manufacture low.
The invention provides a kind of manufacture method of thin-film transistor.Form source electrode and the drain that is electrically insulated each other on substrate.Form simultaneously patterning oxide semiconductor layer and picture element semiconductor layer on substrate, wherein, the patterning oxide semiconductor layer is between source electrode and drain, and the picture element semiconductor layer is positioned at the pixel electrode presumptive area.Form the pattern etched barrier layer on the patterning oxide semiconductor layer, the pattern etched barrier layer exposes the patterning oxide semiconductor layer of the part that is positioned at both sides, pattern etched barrier layer.Form the lock insulating barrier on substrate, make simultaneously in the process that forms the lock insulating barrier and be patterned the partially patterned oxide semiconductor layer that etch stop layer exposes and form two ohmic contact layers and make the picture element semiconductor layer that is positioned at the picture element presumptive area form pixel electrode, pixel electrode and drain are electrically connected, and two ohmic contact layers are electrically connected with source electrode and drain respectively.Form gate on the lock insulating barrier of patterning oxide semiconductor layer top.
The invention provides a kind of thin-film transistor, comprising: source electrode, drain, patterning oxide semiconductor layer, pattern etched barrier layer, lock insulating barrier, gate and pixel electrode.The patterning oxide semiconductor layer is between source electrode and drain, and the patterning oxide semiconductor layer has two ohmic contact layers.The pattern etched barrier layer is positioned on the patterning oxide semiconductor layer and exposes ohmic contact layer.Lock insulating barrier overlay pattern etch stop layer and patterning oxide semiconductor layer.Gate is positioned on the lock insulating barrier of patterning oxide semiconductor layer top.Pixel electrode is electrically connected drain via ohmic contact layer, wherein, pixel electrode, patterning oxide semiconductor layer are the identical rete in position with ohmic contact layer, and pixel electrode is identical with the material of ohmic contact layer.
In one embodiment of this invention, the material of above-mentioned picture element semiconductor layer and patterning oxide semiconductor layer is identical and be selected from: indium oxide gallium zinc (IGZO), indium zinc oxide (IZO), indium oxide gallium (IGO), tin oxide (ZnO), cadmium oxide, germanium oxide (2CdOGeO
2), cobalt nickel oxide (NiCo
2O
4) and combination.
In one embodiment of this invention, above-mentioned formation ohmic contact layer and the method for pixel electrode comprise: when forming the lock insulating barrier, carry out hydrogen doping for patterning oxide semiconductor layer and picture element semiconductor.
In one embodiment of this invention, the material of above-mentioned ohmic contact layer and pixel electrode is to be selected from hydrogeneous indium oxide gallium zinc (IGZO), indium zinc oxide (IZO), indium oxide gallium (IGO), tin oxide (ZnO), cadmium oxide, germanium oxide (2CdOGeO
2), cobalt nickel oxide (NiCo
2O
4) and combination.
In one embodiment of this invention, above-mentioned method for fabricating thin film transistor more comprises: when forming the source electrode be electrically insulated each other with drain on substrate, form data wire on substrate, and data wire and source electrode electric connection.
In one embodiment of this invention, above-mentioned method for fabricating thin film transistor more comprises: when forming gate on the lock insulating barrier of patterning oxide semiconductor layer top, form scan line on substrate, and scan line and gate electric connection.
In one embodiment of this invention, the manufacture method of above-mentioned thin-film transistor more comprises: form gate on the lock insulating barrier of patterning oxide semiconductor layer top after, form the patterning protective layer on substrate.The patterning protective layer has a plurality of contact windows, and contact window exposes the end of scan line of thin-film transistor and the end of data line, provides the source so that scan line and data wire are electrically connected to the external drive signal via contact window.
In one embodiment of this invention, the material of above-mentioned source electrode, drain and gate comprises: the metal of single rete or the metal of composite film.
Based on above-mentioned, in thin-film transistor of the present invention and manufacture method thereof, in the time of by formation lock insulating barrier, ohmic contact layer and pixel electrode have been formed in the lump, can reduce simultaneously the resistance value of patterning oxide semiconductor layer and picture element semiconductor layer in step, can simplify the processing procedure of thin-film transistor, and make thin-film transistor have splendid electrical characteristic.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and coordinate appended graphic being described in detail below.
Description of drawings
Figure 1A to Fig. 1 F be one embodiment of the invention the thin-film transistor manufacturing process on look schematic diagram.
Fig. 2 A to Fig. 2 F is the generalized section of the thin-film transistor manufacturing process that illustrates corresponding to the line A-A ' of Figure 1A to Fig. 1 F successively.
[primary clustering symbol description]
100: thin-film transistor
110: substrate
122: the patterning oxide semiconductor
122a: ohmic contact layer
124: the picture element semiconductor layer
124a: pixel electrode
130: the pattern etched barrier layer
140: the lock insulating barrier
150: the patterning protective layer
D: drain
DL
T: the end of data line
DL: data line
G: gate
H: opening
PS: the external drive signal provides the source
R: pixel electrode presumptive area
S: source electrode
SL
T: the end of scan line
SL: scan line.
Embodiment
[manufacture method of thin-film transistor]
Figure 1A to Fig. 1 F be one embodiment of the invention the thin-film transistor manufacturing process on look schematic diagram.Fig. 2 A to Fig. 2 F is the generalized section of the thin-film transistor manufacturing process that illustrates according to the line A-A ' of Figure 1A to Fig. 1 F.
Please refer to Figure 1A and Fig. 2 A, at first, form source S and the drain D that is electrically insulated each other on substrate 110.When forming source S and drain D, more can form data wire DL on substrate 110, and data wire DL is electrically connected to source S.The material of source S, drain D and data wire DL can be used metal material (as Ti, Mo, Al etc.) alloy, the nitride of metal material, the oxide of metal material, the nitrogen oxide of metal material etc., and source S, drain D and data line DL can be single rete or compound storehouse rete.
Source S, drain D can adopt general forming sputtering film with the production method of data wire DL, coordinate micro image etching procedure (that is the step such as light blockage coating, little shadow, etching, stripping), and the pattern of formation source S, drain D and data wire DL will not describe in detail at this.
Please refer to Figure 1B and Fig. 2 B, then, form simultaneously patterning oxide semiconductor layer 122 and picture element semiconductor layer 124 on substrate 110, wherein, patterning oxide semiconductor layer 122 is between source S and drain D, and picture element semiconductor layer 124 is positioned at pixel electrode presumptive area R.
Further say, as shown in Figure 1B, patterning oxide semiconductor layer 122 and picture element semiconductor layer 124 are with light shield manufacture, patterning oxide semiconductor layer 122 covers source S and the drain D of part, and patterning oxide semiconductor layer 122 can be connected to picture element semiconductor layer 124.In a further embodiment, patterning oxide semiconductor layer 122 also can be free of attachment to picture element semiconductor layer 124, as long as patterning oxide semiconductor layer 122 has the drain of being positioned at D upper (follow-up can the electric connection via drain D) with picture element semiconductor layer 124.
The material of picture element semiconductor layer 124 and patterning oxide semiconductor layer 122 is identical and can be selected from: indium oxide gallium zinc (IGZO), indium zinc oxide (IZO), indium oxide gallium (IGO), tin oxide (ZnO), cadmium oxide, germanium oxide (2CdOGeO
2), cobalt nickel oxide (NiCo
2O
4) and combination, but not as limit.
Patterning oxide semiconductor layer 122 can adopt general forming sputtering film with the production method of picture element semiconductor layer 124, coordinates micro image etching procedure (that is the step such as light blockage coating, little shadow, etching, stripping), and the patterning oxide semiconductor layer 122 of formation as shown in Figure 1B and Fig. 2 B and the pattern of picture element semiconductor layer 124 will not describe in detail at this.
Please refer to Fig. 1 C and Fig. 2 C, then, formation pattern etched barrier layer 130 on patterning oxide semiconductor layer 122.Pattern etched barrier layer 130 exposes the patterning oxide semiconductor layer 122 of the part that is positioned at 130 both sides, pattern etched barrier layer.
The patterning oxide semiconductor layer 122 in 130 zones, cover part, pattern etched barrier layer; still keeping characteristic of semiconductor (can be used as the channel layer between follow-up source S and drain D) in order to the patterning oxide semiconductor layer 122 of protecting 130 belows, pattern etched barrier layer through after successive process, so pattern etched barrier layer 130 can be described as again the path protection layer.
The production method on pattern etched barrier layer 130 can adopt general forming sputtering film, coordinates micro image etching procedure (that is the steps such as light blockage coating, little shadow, etching, stripping), and form the pattern on the pattern etched barrier layer 130 as shown in Fig. 1 C and Fig. 2 C, will not describe in detail at this.The material on pattern etched barrier layer 130 can be silicon dioxide or other material that is fit to.
Please refer to Fig. 1 D and Fig. 2 D, then, form all sidedly lock insulating barrier 140 on substrate 110, make simultaneously in the process that forms lock insulating barrier 140 and be patterned the partially patterned oxide semiconductor layer 122 that etch stop layer 130 exposes and form two ohmic contact layer 122a and make the picture element semiconductor layer 124 that is positioned at picture element presumptive area R form pixel electrode 124a, pixel electrode 124a and drain D are electrically connected, and two ohmic contact layer 122a are electrically connected with source S and drain D respectively.
Further say, the method that forms two ohmic contact layer 122a and pixel electrode 124a comprises: when forming lock insulating barrier 140, carry out hydrogen doping for patterning oxide semiconductor layer 122 and picture element semiconductor layer 124, be not patterned and make the patterning oxide semiconductor layer 122 conductive ohmic contact layer 122a of formation that etch stop layer 130 covers, picture element semiconductor 124 forms conductive pixel electrode 124a.
For example, can adopt plasma enhanced chemical vapor deposition method (Plasma Enhanced Chemical Vapor Deposition, PECVD) form lock insulating barrier 140, the gas that uses in the plasma enhanced chemical vapor deposition method is to be selected from silicon tetrahydride (SiH
4), nitrous oxide (N
2O), helium (He) and the combination, the lock insulating barrier 140 of the present embodiment is for example silica (SiOx).So, the invention is not restricted to this, in other embodiments, can be selected from silicon tetrahydride (SiH in order to the gas that forms lock insulating barrier 140
4), hydrogenation nitrogen (NH
3), nitrogen (N
2), hydrogen (H
2) and combination, lock insulating barrier 140 also can be silicon nitride (SiN
x).Therefore, when forming lock insulating barrier 140, the patterning oxide semiconductor layer 122 that exposes and picture element semiconductor layer 124(such as indium oxide gallium zinc (IGZO)) can be exposed to contain in hydrionic electricity slurry and be adulterated by hydrogen ion, and change respectively the material with conductive characteristic, i.e. ohmic contact layer 122a and pixel electrode 124a into.
That is the material of ohmic contact layer 122a and pixel electrode 124a can be selected from hydrogeneous indium oxide gallium zinc (IGZO), indium zinc oxide (IZO), indium oxide gallium (IGO), tin oxide (ZnO), cadmium oxide, germanium oxide (2CdOGeO
2), cobalt nickel oxide (NiCo
2O
4) and combination.
It is worth mentioning that, due in the fabrication steps of Fig. 1 D and Fig. 2 D, to form in the lump ohmic contact layer 122a and pixel electrode 124a when utilize forming lock insulating barrier 140, therefore, do not need extra processing procedure can reduce the resistance value of patterning oxide semiconductor layer 122 and picture element semiconductor layer 124, change respectively conductive ohmic contact layer 122a and pixel electrode 124a into.Thus, can simplify the processing procedure of this thin-film transistor.
Please refer to Fig. 1 E and Fig. 2 E, then, form gate G on the lock insulating barrier 140 of patterning oxide semiconductor layer 122 tops.When forming gate G, more can form scan line SL on substrate 110, and scan line SL and gate G electric connection.
The material of gate G and scan line SL can be used metal material (as Ti, Mo, Al etc.) alloy, the nitride of metal material, the oxide of metal material, the nitrogen oxide of metal material etc., and gate G and scan line SL can be single rete or compound storehouse rete.Gate G can adopt general forming sputtering film with the production method of scan line SL, coordinates micro image etching procedure (that is the steps such as light blockage coating, little shadow, etching, stripping), and forms the pattern of gate G and scan line SL, will not describe in detail at this.So far, gate G, source S and drain D can consist of thin-film transistor 100.
Please refer to Fig. 1 F and Fig. 2 F, also can form patterning protective layer 150 on substrate 110.Patterning protective layer 150 has a plurality of contact window H, and contact window H exposes the end SL of the scan line SL of thin-film transistor
TEnd DL with data line DL
T, provide source PS so that scan line SL and data wire DL are electrically connected to the external drive signal via contact window H.
The material of patterning protective layer 150 (for example: the stack layer of silicon nitride, silica, silicon oxynitride or above-mentioned at least two kinds of materials), organic material or above-mentioned combination can be inorganic material.The external drive signal provides source PS for example for driving chip.
In sum, the manufacture method of thin-film transistor 100 is when forming lock insulating barrier 140, form in the lump ohmic contact layer 122a and pixel electrode 124a, therefore, do not needed extra processing procedure can reduce the resistance value of patterning oxide semiconductor layer 122 and picture element semiconductor layer 124.Whole required optical cover process quantity can reduce, simplify the processing procedure of thin-film transistor 100, and thin-film transistor 100 can have splendid electrical characteristic.
[thin-film transistor]
Fig. 1 F be one embodiment of the invention thin-film transistor on look schematic diagram.Fig. 2 F is the generalized section of the thin-film transistor that illustrates according to the line A-A ' of Fig. 1 F.
Please be simultaneously with reference to Fig. 1 F and Fig. 2 F, thin-film transistor 100 can comprise: source S, drain D, patterning oxide semiconductor layer 122, pattern etched barrier layer 130, lock insulating barrier 140, gate G and pixel electrode 124a.Patterning oxide semiconductor layer 122 is between source S and drain D, and patterning oxide semiconductor layer 122 has two ohmic contact layer 122a.Pattern etched barrier layer 130 is positioned on patterning oxide semiconductor layer 122 and exposes ohmic contact layer 122a.Lock insulating barrier 140 overlay pattern etch stop layers 130 and patterning oxide semiconductor layer 122.Gate G is positioned on the lock insulating barrier 140 of patterning oxide semiconductor layer 122 tops.Pixel electrode 124a is electrically connected drain D via ohmic contact layer 122a, wherein, pixel electrode 124a, patterning oxide semiconductor layer 122 are the identical rete in position with ohmic contact layer 122a, and pixel electrode 124a is identical with the material of ohmic contact layer 122a.
In addition, thin-film transistor 100 can further comprise data wire DL and scan line SL.Data wire DL and source S are electrically connected.Scan line SL and gate G are electrically connected.Thin-film transistor 100 more can comprise patterning protective layer 150, and patterning protective layer 150 covers whole thin-film transistor, and patterning protective layer 150 has a plurality of contact window H, and contact window H exposes the end SL of the scan line SL of thin-film transistor
TEnd DL with data line DL
T, provide source PS so that scan line SL and data wire DL are electrically connected to the external drive signal via contact window H.
Material about each assembly of thin-film transistor 100 was narrated in the transistorized manufacture method of said film, was not repeated at this.Above-mentioned thin-film transistor 100 has simple structure, cost of manufacture is hanged down and splendid electrical characteristic.
In sum, thin-film transistor of the present invention and manufacture method thereof have the following advantages at least:
In the time of by formation lock insulating barrier, carry out hydrogen doping and formed in the lump ohmic contact layer and pixel electrode for patterning oxide semiconductor layer and picture element semiconductor layer, therefore, do not need extra processing procedure can reduce the resistance value of patterning oxide semiconductor layer and picture element semiconductor layer, make the processing procedure simplification of thin-film transistor and have splendid electrical characteristic.And for the optical cover process of known oxide semiconductor thin-film transistor, the quantity of the optical cover process of the manufacture method of above-mentioned thin-film transistor can reduce.
Although the present invention discloses as above with embodiment; so it is not to limit the present invention; have in technical field under any and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.
Claims (13)
1. the manufacture method of a thin-film transistor, is characterized in that, comprising:
Form one source pole and a drain that is electrically insulated each other on a substrate;
Form simultaneously a patterning oxide semiconductor layer and a picture element semiconductor layer on this substrate, wherein, this patterning oxide semiconductor layer is between this source electrode and this drain, and this picture element semiconductor layer is positioned at a pixel electrode presumptive area;
Form a pattern etched barrier layer on this patterning oxide semiconductor layer, expose this patterning oxide semiconductor layer of the part that is positioned at these both sides, pattern etched barrier layer;
Form a lock insulating barrier on this substrate, make simultaneously this patterning oxide semiconductor layer of part that is exposed by this pattern etched barrier layer form two ohmic contact layers and make this picture element semiconductor layer that is positioned at this picture element presumptive area form a pixel electrode in the process that forms this lock insulating barrier, this pixel electrode and this drain are electrically connected, and two those ohmic contact layers are electrically connected with this source electrode and this drain respectively; And
Form a gate on this lock insulating barrier above this patterning oxide semiconductor layer; The method that forms those ohmic contact layers and this pixel electrode comprises:
When forming this lock insulating barrier, carry out a hydrogen doping for this patterning oxide semiconductor layer and this picture element semiconductor.
2. the manufacture method of thin-film transistor according to claim 1 is characterized in that: the material of described picture element semiconductor layer and this patterning oxide semiconductor layer is identical and be selected from: indium oxide gallium zinc, indium zinc oxide, indium oxide gallium, tin oxide, cadmium oxide, germanium oxide, cobalt nickel oxide and combination thereof.
3. the manufacture method of thin-film transistor according to claim 1, it is characterized in that: the material of those ohmic contact layers and this pixel electrode is to be selected from hydrogeneous indium oxide gallium zinc, indium zinc oxide, indium oxide gallium, tin oxide, cadmium oxide, germanium oxide, cobalt nickel oxide and combination thereof.
4. the manufacture method of thin-film transistor according to claim 1, it is characterized in that: when forming this source electrode be electrically insulated each other and this drain on this substrate, more comprise: form a data wire on this substrate, and this data wire and the electric connection of this source electrode.
5. the manufacture method of thin-film transistor according to claim 1, it is characterized in that: when forming this gate on this lock insulating barrier above this patterning oxide semiconductor layer, more comprise: form the one scan line on this substrate, and this scan line and the electric connection of this gate.
6. the manufacture method of thin-film transistor according to claim 1 is characterized in that: form this gate on this lock insulating barrier of this patterning oxide semiconductor layer top after, more comprise:
Form a patterning protective layer on this substrate; have a plurality of contact windows; expose the end of one scan line of this thin-film transistor and the end of a data wire, provide the source so that this scan line and this data wire are electrically connected to an external drive signal via those contact windows.
7. the manufacture method of thin-film transistor according to claim 1, it is characterized in that: the material of described source electrode, this drain and this gate comprises: the metal of single rete or the metal of composite film.
8. a thin-film transistor, is characterized in that, comprising:
One source pole and a drain;
One patterning oxide semiconductor layer, between this source electrode and this drain, this patterning oxide semiconductor layer has two ohmic contact layers;
One pattern etched barrier layer is positioned on this patterning oxide semiconductor layer, exposes those ohmic contact layers;
One lock insulating barrier covers this pattern etched barrier layer and this patterning oxide semiconductor layer;
One gate is positioned on this lock insulating barrier of this patterning oxide semiconductor layer top; And
One pixel electrode is electrically connected this drain via this ohmic contact layer, and wherein, this pixel electrode, this patterning oxide semiconductor layer are the identical rete in position with those ohmic contact layers, and this pixel electrode is identical with the material of those ohmic contact layers; And the method that forms those ohmic contact layers and this pixel electrode comprises: when forming this lock insulating barrier, carry out a hydrogen doping for this patterning oxide semiconductor layer and this picture element semiconductor.
9. thin-film transistor according to claim 8, it is characterized in that: the material of described patterning oxide semiconductor layer is to be selected from: indium oxide gallium zinc, indium zinc oxide, indium oxide gallium, tin oxide, cadmium oxide, germanium oxide, cobalt nickel oxide and combination thereof.
10. thin-film transistor according to claim 8, it is characterized in that: the material of described ohmic contact layer and this pixel electrode is to be selected from hydrogeneous indium oxide gallium zinc, indium zinc oxide, indium oxide gallium, tin oxide, cadmium oxide, germanium oxide, cobalt nickel oxide and combination thereof.
11. thin-film transistor according to claim 8 is characterized in that, more comprises: a data wire is electrically connected with this source electrode.
12. thin-film transistor according to claim 8 is characterized in that, more comprises: the one scan line is electrically connected with this gate.
13. thin-film transistor according to claim 8; it is characterized in that; more comprise: a patterning protective layer; cover whole this thin-film transistor; this patterning protective layer has a plurality of contact windows; expose the end of one scan line of this thin-film transistor and the end of a data wire, provide the source so that this scan line and this data wire are electrically connected to an external drive signal via those contact windows.
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| CN103219391B (en) * | 2013-04-07 | 2016-03-02 | 京东方科技集团股份有限公司 | A kind of thin-film transistor and preparation method thereof, array base palte and display unit |
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