CN102131346B - Circuit board and manufacturing method thereof - Google Patents

Abstract

A circuit board comprises a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is arranged on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least one blind hole extending from the second surface to the first circuit layer, and an intaglio pattern. The first conductive layer is disposed in the blind hole. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected to the first circuit layer through the first conductive layer.

Description

Circuit board and manufacturing method thereof

technical field

The present invention relates to a circuit board and its manufacturing method, and in particular to a circuit board with better reliability and its manufacturing method.

Background technique

Today's circuit board technology has developed from a common non-embedded circuit board to an embedded circuit board. In detail, the characteristic of common non-embedded circuit boards is that their circuits protrude from the surface of the dielectric layer, while the characteristic of embedded circuit boards is that their circuits are embedded in the dielectric layer. The circuit structure of the circuit board is usually formed separately by photolithography or laser ablation.

Taking the traditional fabrication method of the build-up circuit structure of the embedded circuit board formed by laser ablation as an example, it includes the following steps. First, a dielectric layer is provided on a circuit substrate with a circuit layer. Next, a laser beam is irradiated on the surface of the dielectric layer to form an intaglio pattern and a blind hole connected to the circuit layer. After that, an electroplating process is performed to form a conductive layer that fills the blind holes and the indented pattern. So far, the build-up circuit structure of the embedded circuit board has been roughly completed.

However, when the electroplating method is performed, since the depth of the blind hole is different from that of the intaglio pattern, it is easy to cause uneven thickness distribution of the formed conductive layer due to poor control of electroplating conditions. In this way, when the conductive layer located outside the indent pattern and the blind hole is subsequently removed, it is difficult to control the thickness of the removed conductive layer, so that it is easy to unduly thin the buried type during the removal process. The conductive layer is either improperly left with excess conductive material on the dielectric layer. In addition, when the build-up circuit layer is manufactured on this dielectric layer later, the electroplating method is likely to have problems such as poor quality and low yield. The reliability of the circuit board.

Contents of the invention

The invention provides a circuit board and a manufacturing method thereof, which can improve the reliability of the circuit board.

The invention provides a circuit board, which includes a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is configured on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least one blind hole extending from the second surface to the first circuit layer, and an intaglio pattern. The first conductive layer is configured in the blind hole. The second conductive layer is disposed in the concave pattern and the blind hole, and covers the first conductive layer. The second conductive layer is electrically connected to the first circuit layer through the first conductive layer.

In an embodiment of the present invention, the depth of the blind hole is H, and the thickness of the first conductive layer is h, and 0.2≦(h/H)≦0.9.

In an embodiment of the present invention, the above-mentioned intaglio pattern is connected with the blind hole.

In an embodiment of the present invention, the above circuit board further includes an activation layer disposed between the intaglio pattern of the dielectric layer and the second conductive layer and between the first conductive layer and the second conductive layer.

In an embodiment of the present invention, the above-mentioned first circuit layer is embedded in the circuit substrate, and a surface of the first circuit layer is substantially flush with the first surface.

In an embodiment of the present invention, the above-mentioned first circuit layer is disposed on the first surface of the circuit substrate.

In an embodiment of the present invention, the above-mentioned second conductive layer is substantially aligned with the second surface of the dielectric layer.

The invention also provides a manufacturing method of the circuit board. Firstly, a circuit substrate is provided. The circuit substrate has a first surface and at least one first circuit layer. Next, a dielectric layer is formed on the circuit substrate. The dielectric layer has a second surface, and the dielectric layer covers the first surface and the first circuit layer. A laser beam is irradiated on the second surface of the dielectric layer to form at least one blind hole extending from the second surface of the dielectric layer to the first circuit layer and an intaglio pattern. Then, a first conductive layer is formed in the blind hole. Finally, a second conductive layer is formed in the concave pattern and the blind hole. The second conductive layer covers the first conductive layer, and the second conductive layer is electrically connected to the first circuit layer through the first conductive layer.

In an embodiment of the present invention, the above-mentioned laser beam is an infrared laser light source or an ultraviolet laser light source.

In an embodiment of the present invention, the method for forming the first conductive layer in the blind hole includes a chemical deposition method.

In an embodiment of the present invention, the depth of the blind hole is H, and the thickness of the first conductive layer is h, and 0.2≦(h/H)≦0.9.

In an embodiment of the present invention, before forming the second conductive layer, it further includes forming an activation layer on the second surface of the dielectric layer, in the intaglio pattern and on the first conductive layer.

In an embodiment of the present invention, the method for forming the second conductive layer in the concave pattern and the blind hole includes a chemical deposition method.

In an embodiment of the present invention, after forming the second conductive layer, it further includes performing a grinding method on the second conductive layer to expose the second surface of the dielectric layer.

In an embodiment of the present invention, the above-mentioned first circuit layer is embedded in the circuit substrate, and a surface of the first circuit layer is substantially flush with the first surface.

In an embodiment of the present invention, the above-mentioned first circuit layer is disposed on the first surface of the circuit substrate.

In an embodiment of the present invention, the above-mentioned intaglio pattern is connected with the blind hole.

In an embodiment of the present invention, the above-mentioned second conductive layer is substantially aligned with the second surface of the dielectric layer.

Based on the above, since the manufacturing method of the circuit board of the present invention first forms the first conductive layer in the blind hole to reduce the height difference between the blind hole and the intaglio pattern, and then forms the second conductive layer in the blind hole. On the first conductive layer and in the concave pattern. In this way, the conductive layer formed in the blind hole and the intaglio pattern can have better thickness uniformity and surface flatness. Compared with the production of traditional circuit boards, the circuit board and its production method of the present invention can effectively avoid the problems of insufficient or excessive hole filling effect of traditional electroplating and poor uniformity of the conductive layer, and have better reliability.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail with reference to the accompanying drawings.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a circuit board according to an embodiment of the present invention.

2A to 2F are schematic cross-sectional views of a method for manufacturing a circuit board according to an embodiment of the present invention.

Description of main component symbols

100: circuit board

110: circuit substrate

112: First Surface

114: The first line layer

120: medium layer

122: second surface

124a, 124b: blind holes

126: Intaglio pattern

130: first conductive layer

140: second conductive layer

150: activation layer

L: laser beam

H, h: thickness

Detailed ways

FIG. 1 is a schematic cross-sectional view of a circuit board according to an embodiment of the present invention. Please refer to FIG. 1 , in this embodiment, the circuit board 100 includes a circuit substrate 110 , a dielectric layer 120 , a first conductive layer 130 and a second conductive layer 140 . It is worth mentioning that the circuit board 100 may have only a single circuit layer or multiple circuit layers. That is, the circuit board 100 may be a single layer circuit board, a double layer circuit board or a multi-layer circuit board. In this embodiment, FIG. 1 only illustrates that the circuit board 100 is a build-up circuit board.

In detail, the circuit substrate 110 has a first surface 112 and a first circuit layer 114 , wherein the first circuit layer 114 is disposed on the first surface 112 of the circuit substrate 110 . That is to say, the first circuit layer 114 can be regarded as a general circuit layer (non-embedded circuit layer). It must be noted here that, in the embodiment shown in FIG. 1 , the first circuit layer 114 is disposed on the first surface 112 of the circuit substrate 110 . However, in other unshown embodiments, the first circuit layer 114 can also be embedded in the circuit substrate 110 , and a surface of the first circuit layer 114 is substantially flush with the first surface 112 . That is, the first circuit layer 114 can basically be regarded as a buried circuit layer. In other words, the structure of the circuit substrate 110 shown in FIG. 1 is only for illustration, and does not limit the present invention.

The dielectric layer 120 is disposed on the circuit substrate 110 and covers the first surface 112 and the first circuit layer 114 . In this embodiment, the dielectric layer 120 has a second surface 122, at least one blind hole extending from the second surface 122 to the first circuit layer 114 (only two blind holes 124a, 124b are schematically shown in FIG. 1 ) and An intaglio pattern 126 , wherein the blind hole 124 a is connected to the intaglio pattern 126 .

The first conductive layer 130 is disposed in the blind holes 124a, 124b, wherein the depth of the blind hole 124b (or blind hole 124a) is H, and the thickness of the first conductive layer 130 is h, preferably, 0.2≤(h/H) ≤0.9. The second conductive layer 140 is disposed in the intaglio pattern 126 and the blind holes 124 a , 124 b and covers the first conductive layer 130 . That is to say, the second conductive layer 140 is disposed in the intaglio pattern 126 and on the first conductive layer 130 . In particular, the second conductive layer 140 can be electrically connected to the first circuit layer 114 of the circuit substrate 110 through the first conductive layer 130 , and the second conductive layer 140 is substantially flush with the second surface 122 of the dielectric layer 120 .

In addition, the circuit board 100 of this embodiment also includes an activation layer 150, wherein the activation layer 150 is disposed between the intaglio pattern 126 of the dielectric layer 120 and the second conductive layer 140 and between the first conductive layer 130 and the second conductive layer 150. between layers 140 . Wherein, the material composition of the activation layer 150 includes metal, such as palladium.

Since the first conductive layer 130 is disposed in the blind holes 124a, 124b of the dielectric layer 120 in this embodiment, the height difference between the blind holes 124a, 124b and the intaglio pattern 126 can be reduced. If (h/H) is larger, it means that the thickness of the first conductive layer 130 is thicker, which can make the thickness of the second conductive layer 140 that needs to be arranged in the blind holes 124a, 124b approach to the first layer that the intaglio pattern 126 wants to arrange. The thickness of the second conductive layer 140 . In this way, when the second conductive layer 140 is disposed on the blind holes 124a, 124b and the intaglio pattern 126, it can have better thickness uniformity and surface flatness. In other words, compared with the traditional technology, the design of the circuit board 100 of this embodiment can effectively avoid the problems of insufficient or excessive hole filling effect of traditional electroplating and poor uniformity of the conductive layer, and has better reliability.

The above only introduces the structure of the circuit board 100 of the present invention, but does not introduce the manufacturing method of the circuit board 100 of the present invention. In this regard, the structure of the circuit board 100 in FIG. 1 will be taken as an example below, and the manufacturing method of the circuit board 100 of the present invention will be described in detail with reference to FIGS. 2A to 2F .

2A to 2F are schematic cross-sectional views of a method for manufacturing a circuit board according to an embodiment of the present invention. Please refer to FIG. 2A , according to the manufacturing method of the circuit board 100 of this embodiment, firstly, a circuit substrate 110 is provided. The circuit substrate 110 has a first surface 112 and a first circuit layer 114 , wherein the first circuit layer 114 is disposed on the first surface 112 of the circuit substrate 110 . In other words, the first circuit layer 114 can basically be regarded as a general circuit layer (ie, a non-embedded circuit layer). It should be noted here that, in other unshown embodiments, the first circuit layer 114 can also be embedded in the circuit substrate 110, and one surface of the first circuit layer 114 is substantially aligned with the first surface 112. . That is, the first circuit layer 114 can basically be regarded as a buried circuit layer. Therefore, the structure of the circuit substrate 110 shown in FIG. 2A is only for illustration, and does not limit the present invention.

Next, referring to FIG. 2A again, a dielectric layer 120 is formed on the circuit substrate 110 , wherein the dielectric layer 120 has a second surface 122 , and the dielectric layer 120 covers the first surface 112 and the first circuit layer 114 .

Next, referring to FIG. 2B, a laser beam L is irradiated to the second surface 122 of the dielectric layer 120 to form at least one blind hole extending from the second surface 122 of the dielectric layer 120 to the first wiring layer 114 (only in FIG. 2B Two blind holes 124a, 124b) and an intaglio pattern 126 are schematically shown. Wherein, the intaglio pattern 126 is connected with the blind hole 124a. In this embodiment, the laser beam L is, for example, an infrared laser light source or an ultraviolet laser light source.

Next, please refer to FIG. 2C, a first conductive layer 130 is formed in the blind holes 124a, 124b. Wherein, the method of forming the first conductive layer 130 in the blind holes 124a, 124b includes chemical deposition. Especially, in this embodiment, the depth of the blind hole 124b (or the blind hole 124b ) is H, and the thickness of the first conductive layer 130 is h, preferably, 0.2≤(h/H)≤0.9.

Next, referring to FIG. 2D , an activation layer 150 is formed on the second surface 122 of the dielectric layer 120 , in the concave pattern 126 and on the first conductive layer 130 , so as to have a chemical deposition reaction on the surface of the dielectric layer 120 The initial function is to facilitate the formation of the second conductive layer 140 (please refer to FIG. 2E ), and the second conductive layer 140 is formed on the first conductive layer 130 to complete the filling of the blind hole with conductive material. In this embodiment, the main material component of the activation layer 150 is palladium, for example.

Then, please refer to FIG. 2E , forming a second conductive layer 140 in the intaglio pattern 126 and the blind holes 124a, 124b, wherein the second conductive layer 140 covers the first conductive layer 130, and the second conductive layer 140 is formed by the first The conductive layer 130 is electrically connected to the first circuit layer 114 . At this time, the second conductive layer 140 covers the second surface 122 of the dielectric layer 120 . In addition, the method of forming the second conductive layer 140 in the intaglio pattern 126 and the blind holes 124a, 124b includes a chemical deposition method.

Finally, referring to FIG. 2F , a polishing method is performed on the second conductive layer 140 to expose the second surface 122 of the dielectric layer 120 . That is to say, the activation layer 150 on the second surface 122 of the dielectric layer 120 will be removed after the grinding method, and the second surface 122 will be exposed, so that the second conductive layer 140 and the second surface 122 of the dielectric layer 120 Essentially cut. So far, the fabrication of the circuit board 100 is completed.

It must be noted here that although this embodiment performs the grinding method after forming the second conductive layer 140, in other not shown embodiments, if the deposited second conductive layer 140 has a better surface flatness In this case, the step of grinding the manufacturing method can be omitted. In other words, the step of the polishing method described in this embodiment is an optional step to be implemented depending on the flatness of the deposited second conductive layer 140 , and is not a necessary step of the manufacturing method.

Since the manufacturing method of the circuit board 100 of this embodiment is to first form the first conductive layer 130 in the blind holes 124a, 124b to reduce the height difference between the blind holes 124a, 124b and the intaglio pattern 126, and then form the second conductive layer 130. The conductive layer 140 is on the first conductive layer 130 in the blind holes 124 a , 124 b and in the intaglio pattern 126 . In this way, the conductive layer formed in the blind holes 124a, 124b and the intaglio pattern 126 can have better thickness uniformity and surface flatness. Compared with the production of traditional circuit boards, the production method of the circuit board 100 in this embodiment can effectively avoid problems such as insufficient or excessive hole filling effect of traditional electroplating and poor uniformity of the conductive layer, and has better reliability.

In summary, since the present invention is equipped with the first conductive layer in the blind hole, it can effectively reduce the height difference between the blind hole and the intaglio pattern, so that the thickness of the second conductive layer that needs to be arranged in the blind hole approaches The thickness of the second conductive layer is to be configured in the intaglio pattern. In this way, when the second conductive layer is disposed in blind holes and indented patterns, it can have better thickness uniformity and surface flatness. Compared with the traditional technology, the design of the circuit board of the present invention can effectively avoid problems such as insufficient or excessive hole filling effect of traditional electroplating and poor uniformity of the conductive layer, and has better reliability.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.

Claims (15)

1. a wiring board, comprising:

One circuit base plate, has a first surface and one first line layer;

One dielectric layer, is configured on this circuit base plate and covers this first surface and this first line layer, and this dielectric layer has a second surface, an intaglio pattern and at least one blind hole that extends to this first line layer from this second surface;

One first conductive layer, is configured in this blind hole and only covers whole inner bottom surfaces and the part medial surface of this blind hole; And

One second conductive layer, is configured in this intaglio pattern and this blind hole, and covers this first conductive layer, and wherein this second conductive layer is electrically connected to this first line layer by this first conductive layer.

2. wiring board according to claim 1, also comprises an active layer, is configured between this intaglio pattern of this dielectric layer and this second conductive layer and is configured between this first conductive layer and this second conductive layer.

3. wiring board according to claim 1 and 2, wherein the degree of depth of this blind hole is H, and the thickness of this first conductive layer is h, and 0.2≤(h/H)≤0.9.

4. wiring board according to claim 1, is wherein embedded in this circuit base plate in this first line layer, and a surface of this first line layer trims in fact with this first surface.

5. wiring board according to claim 1, wherein this first line layer is configured on this first surface of this circuit base plate.

6. according to the wiring board described in claim 1,4 or 5, wherein this second surface of this second conductive layer and this dielectric layer trims in fact.

7. a manufacture method for wiring board, comprising:

One circuit base plate is provided, and this circuit base plate has a first surface and one first line layer;

Form a dielectric layer on this circuit base plate, this dielectric layer has a second surface, and this dielectric layer covers this first surface and this first line layer;

This second surface to this dielectric layer irradiates a laser beam, to form an intaglio pattern and at least one blind hole that extends to this first line layer from this second surface of this dielectric layer;

Form one first conductive layer in this blind hole, wherein this first conductive layer only covers whole inner bottom surfaces and the part medial surface of this blind hole; And

Form one second conductive layer in this intaglio pattern and this blind hole, wherein this second conductive layer covers this first conductive layer, and this second conductive layer is electrically connected to this first line layer by this first conductive layer.

8. the manufacture method of wiring board according to claim 7, wherein, before forming this second conductive layer, also comprises:

Form an active layer on this second surface of this dielectric layer, in this intaglio pattern and on this first conductive layer.

9. the manufacture method of wiring board according to claim 7, wherein the degree of depth of this blind hole is H, and the thickness of this first conductive layer is h, and 0.2≤(h/H)≤0.9.

10. according to the manufacture method of the wiring board described in claim 7 or 9, wherein form the method for this first conductive layer in this blind hole and comprise chemical deposition.

The manufacture method of 11. wiring boards according to claim 7, wherein forms the method for this second conductive layer in this intaglio pattern and this blind hole and comprises chemical deposition.

12. according to the manufacture method of the wiring board described in claim 7 or 11, wherein, after forming this second conductive layer, also comprises:

This second conductive layer is carried out to a grinding manufacture method, to this second surface that exposes this dielectric layer.

The manufacture method of 13. wiring boards according to claim 7, is wherein embedded in this circuit base plate in this first line layer, and a surface of this first line layer trims in fact with this first surface.

The manufacture method of 14. wiring boards according to claim 7, wherein this first line layer is configured on this first surface of this circuit base plate.

15. according to the manufacture method of the wiring board described in claim 7,13 or 14, and wherein this second surface of this second conductive layer and this dielectric layer trims in fact.