CN102136832A - Clock signal detection method and system - Google Patents
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Abstract
The invention discloses clock signal detection method and system, belonging to the technical field of signal detection. The method comprises the following steps of: inputting a clock signal to a band-pass filter, wherein the bandwidth of the band-pass filter corresponds to the detection accuracy required by the clock signal; reshaping the output of the band-pass filter; and detecting whether a signal is output after reshaping, and if no signal is detected to be output, determining the clock signal to be faulty. By using the clock signal detection method and system, the coupling relationship between the clock signal detection accuracy and consumed resources as well as detection time can be eliminated, the detection of the clock signal can be simply and conveniently realized, the detection time is shortened, and the requirements for different detection accuracies are satisfied.
Description
Technical Field
The invention relates to the technical field of signal detection, in particular to a clock signal detection method and system.
Background
The reference signal for the digital circuitry to operate is the clock signal, and the accuracy and stability of the clock signal determine the reliability of the digital circuitry function.
At present, most of clock sources commonly used in the industry are provided by crystal oscillators, and because the quality factor of the crystal circuit characteristics, i.e., the Q value, is very high, a highly accurate and stable clock can be provided for digital circuit systems. However, because of physical structural features and process level limitations, crystal oscillators can exhibit two failure modes:
1. the fundamental frequency is the vibration frequency of the lowest order in the vibration mode, and the aging phenomenon of frequency point offset exists due to the physical aging of the wafer.
Taking an 8.192MHz constant temperature crystal oscillator as an example, the resonance frequency point may shift to 8.200 MHz.
2. The overtone crystal oscillator can generate a failure mode of oscillation frequency point jumping, and the overtone refers to mechanical harmonic of crystal oscillation.
Taking a 100MHz crystal oscillator as an example, 100MHz is a 3 harmonic resonance point (3 harmonics) of 33.33MHz fundamental frequency, and the main failure mode is that the resonance frequency point jumps to 166MHz (5 harmonics) or 66MHz (2 harmonics).
Therefore, in the digital circuit system, in order to avoid the traffic abnormality caused by the clock frequency deviation, the clock signals must be detected separately. When the clock frequency deviation exceeds the service tolerance range, the alarm is reported in time, and the single board switching or self-healing measures are actively carried out, so as to avoid uninterrupted service.
As shown in fig. 1, in the prior art, a method for detecting a clock signal generally includes designing a counter in a logic device, dividing a detected clock signal 11 into frequency divisions to obtain a divided signal 12, and driving the counter with a high-frequency clock signal 13 to detect a period of the divided detected clock signal.
The detection can be divided into two types according to the resource consumption and the failure effect:
1. detecting whether the clock exists or not: the consumed resources are few, the detection period is short, but the test result can only show whether the clock is lost.
2. And (3) detecting clock frequency offset: the consumed resources are more, the detection period is long, and the test result can be used for carrying out qualitative analysis on the accuracy of the clock frequency.
According to the above method, the clock signal is detected, and if the detection accuracy is doubled, as shown in fig. 2, the number of D flip-flops used by the frequency division counter and the detection result counter needs to be increased by one, the detection time consumption is doubled, that is, the consumed resource is proportional to the detection accuracy, and the detection time consumption is in an exponential relationship with the detection accuracy. The higher the accuracy requirement, the more resources consumed and the longer the detection time. Furthermore, in some devices, only some important clock signals are frequency offset detected, while only the presence or absence of other clock signals is detected.
Disclosure of Invention
The embodiment of the invention provides a clock signal detection method and a system.
The embodiment of the invention provides the following technical scheme:
inputting a clock signal into a band-pass filter, wherein the bandwidth of the band-pass filter corresponds to the required detection precision of the clock signal;
converting the fundamental frequency sinusoidal signals output by the band-pass filter into common-frequency square wave signals;
and detecting whether a square wave signal is output, and if the square wave signal is not output, determining that the clock signal has a fault.
A clock signal detection system comprising:
the band-pass filter is used for inputting a clock signal, and the bandwidth of the band-pass filter corresponds to the required detection precision of the clock signal;
the shaping circuit is used for converting the fundamental frequency sinusoidal signals output by the band-pass filter into common-frequency square wave signals;
and the signal detection circuit is used for detecting whether the shaping circuit outputs the square wave signal or not and determining that the clock signal has a fault when the shaping circuit does not output the square wave signal.
According to the clock signal detection method and system provided by the embodiment of the invention, the advantage of no delay of an analog technology is applied to the detection of the clock signal, so that the time consumed by high-precision detection of the clock signal is greatly reduced, even the clock can be immediately cut off when the frequency deviation of the detected clock exceeds the standard, and unpredictable faults caused by the output of the clock to a later-stage system are avoided; in addition, the clock signal detection method and the clock signal detection system provided by the embodiment of the invention can simplify the design difficulty and save circuit resources under the condition of ensuring the detection precision.
Drawings
In order to more clearly illustrate the embodiments of the present application or technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present invention, and other drawings can be obtained by those skilled in the art according to the drawings.
FIG. 1 is a schematic diagram of clock signal detection in the prior art;
FIG. 2 is a schematic diagram illustrating the clock signal detection accuracy of FIG. 1 doubled;
FIG. 3 is a schematic diagram of a square wave signal spectrum analysis;
FIG. 4 is a flowchart illustrating a clock signal detection method according to an embodiment of the present invention;
FIG. 5 is a schematic flow chart illustrating a clock signal detection method according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a clock signal detection system according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a clock signal detection system detecting a clock signal using an embodiment of the present invention;
FIG. 8 is a schematic diagram of a clock signal detection system detecting the absence of a clock signal using an embodiment of the present invention;
FIG. 9 is a schematic diagram of another exemplary clock signal detection system according to the present invention;
fig. 10 is a schematic diagram of a specific application of the clock signal detection system according to the embodiment of the present invention.
Detailed Description
In order to make the technical field of the invention better understand the scheme of the embodiment of the invention, the embodiment of the invention is further described in detail with reference to the drawings and the implementation mode.
The digital clock signal is a square wave with a fixed period and a typical value of the duty cycle is 50%. The frequency spectrum of the digital clock signal is known by fourier transformation as described by the following equation:
wherein,
is the direct current component of the square wave signal,
referred to as the fundamental wave of the square wave signal, its periodThe same period as the square wave itself. The remaining terms in the equation are higher harmonic components whose angular frequencies are integer multiples of the fundamental angular frequency.
It can be seen that the frequency of the square wave coincides with the frequency of its fundamental frequency component, while the higher harmonic closest to the fundamental frequency component is the 3 rd harmonic and the spectral separation distance from the fundamental frequency is the 2 x frequency.
Due to the simplicity of the sine function, only the functional relation between the amplitude voltage and the angular frequency can be considered when signal analysis is carried out.
While a band-pass filter can pass frequency components in a certain frequency range but attenuate frequency components in other ranges to a very low level.
Fig. 3 is a schematic diagram of the spectral analysis of a square wave signal, which shows the distribution of each harmonic component of the square wave.
Therefore, according to the above features of the clock signal and the band-pass filter, in the clock signal detection method and system of the embodiments of the present invention, after the fundamental frequency of the digital clock signal is filtered by one band-pass filter, the fundamental frequency output by the band-pass filter is detected, and if no signal is output, it is determined that the clock signal has a fault, such as clock signal loss or frequency offset of the clock signal exceeds a certain range.
Further, in order to meet the requirements of different detection accuracies, the bandwidth of the band-pass filter may be selected according to the required detection accuracy, which will be described in detail later.
As shown in fig. 4, it is a flowchart of a clock signal detection method according to an embodiment of the present invention, including the following steps:
Specifically, the upper cut-off frequency of the band-pass filter may be determined according to the sensitivity of the forward frequency offset of the required detection accuracy; and determining the lower limit cut-off frequency of the band-pass filter according to the negative frequency offset sensitivity of the required detection precision. For example, when the frequency offset requirement of a 100Mhz digital clock is within +/-100ppm, the cutoff frequency of the band-pass filter can be set to a lower limit of 99.99Mhz (corresponding to-100 ppm) and an upper limit of 100.01Mhz (corresponding to +100 ppm).
Thus, if the frequency of the clock signal is within the range of the positive and negative frequency offset sensitivities, the fundamental frequency signal can pass through the band-pass filter, otherwise, the fundamental frequency signal cannot pass through the band-pass filter.
In practical applications, the band-pass filter may be any one of the following filters according to the required detection accuracy: crystal filter, active analog filter, passive analog filter, digital filter. For example, under the condition of low requirement on detection precision, an active analog filter can be selected; in the environment with a large frequency deviation tolerance range of the clock signal, a passive analog filter with low cost and the like can be selected.
And 403, detecting whether a square wave signal is output, and if the square wave signal is not output, determining that the clock signal has a fault.
The clock signal failure may be an out of frequency deviation of the clock signal or a loss of the clock signal.
Therefore, by adopting the clock signal detection method provided by the embodiment of the invention, on one hand, the advantage of no time delay of the simulation technology is applied to the detection of the clock signal, so that the time consumed by the high-precision detection of the clock signal is greatly reduced, even the clock can be immediately cut off when the frequency deviation of the detected clock exceeds the standard, and the unpredictable fault caused by the output of the clock to a later-stage system is avoided; on the other hand, the coupling relation between the clock detection precision and the consumed resource and the detection time is eliminated, so that the design difficulty can be simplified, the balance between the detection precision and the consumed resource and time of a system designer is avoided, and the digital circuit resource can be greatly saved under the condition of very high detection precision.
As shown in fig. 5, it is another flowchart of the clock signal detecting method according to the embodiment of the present invention, including the following steps:
For example, a digital clock is used as a reference source through frequency multiplication modulation, and the reference source is synthesized into a target digital clock through other devices, and the frequency accuracy of the target digital clock is consistent with that of the source clock.
The frequency multiplication modulation can adopt some corresponding existing modulation circuits.
In practical applications, the band-pass filter may be any one of the following filters according to the required detection accuracy: crystal filter, active analog filter, passive analog filter, digital filter. For example, under the condition of low requirement on detection precision, an active analog filter can be selected; in the environment with a large frequency deviation tolerance range of the clock signal, a passive analog filter with low cost and the like can be selected.
Correspondingly, an embodiment of the present invention further provides a clock signal detection system, as shown in fig. 6, which is a schematic structural diagram of the system, and includes:
a band-pass filter 601 for inputting the clock signal, the bandwidth of the band-pass filter corresponding to the required detection accuracy.
In the embodiment of the present invention, the upper cut-off frequency of the band-pass filter is determined according to the positive frequency offset sensitivity of the required detection precision, and the lower cut-off frequency of the band-pass filter is determined according to the negative frequency offset sensitivity of the required detection precision.
A shaping circuit 602, configured to convert the fundamental frequency sinusoidal signal output by the band-pass filter 601 into a common-frequency square wave signal;
a signal detection circuit 603 for detecting the signal output by the shaping circuit 602 and determining that the clock signal is faulty when no square wave signal is output. Specifically, the frequency offset of the clock signal may exceed a requirement, or the clock signal may be lost.
Fig. 7 and 8 show the detection of a clock signal and no clock signal, respectively, by a clock signal detection system according to an embodiment of the present invention.
The band-pass filter 601 outputs a sinusoidal signal indicating that the square wave exists, and the band-pass filter 601 outputs a dc signal indicating that the square wave does not exist or the clock frequency offset exceeds the service tolerance range.
In practical applications, the band-pass filter may be a crystal filter, an active analog filter, a passive analog filter, a digital filter, or the like, according to the required detection accuracy. Such as:
analog filters are a common type of conversion device in test systems or specialized instrumentation. Therefore, under the condition that the requirement on the detection precision is not high, an active analog filter can be selected, and the filter has the advantages that: the signals in the pass band have no energy loss, but also can be amplified, the load effect is not obvious, the mutual influence is small when the multiple stages are connected, a high-order filter is easily formed by utilizing a simple cascading method, and the filter has small volume and light weight and does not need magnetic shielding (because an inductance element is not used); the disadvantages are that: the passband range is limited by the bandwidth of active devices (such as integrated operational amplifiers), needs a direct current power supply, has not as high reliability as a passive filter, and is not suitable for occasions of high voltage, high frequency and high power. In the environment with a large frequency deviation tolerance range of the clock signal, a passive analog filter with low cost and the like can be selected. The advantages of this type of filter are: the circuit is simple, does not need a direct-current power supply to supply power, and has high reliability; the disadvantages are that: the signal in the passband has energy loss, the load effect is obvious, electromagnetic induction is easily caused when an inductance element is used, and when the inductance L is large, the size and the weight of the filter are large, so that the filter is not suitable for a low-frequency domain.
Digital filters are widely used in discrete systems, corresponding to analog filters. The function of the method is to process the waveform or frequency of an input signal by using the characteristics of a discrete time system. Or, the input signal is changed into a certain output signal, thereby achieving the purpose of changing the signal spectrum. Digital filters can generally be implemented in two ways: one method is to assemble digital hardware into a specialized device called a digital signal processor; another method is to directly use a general-purpose computer to program the required operations to be performed by the general-purpose computer, i.e. to implement the operations by using computer software. Therefore, when there are enough DSP (Digital Signal Processing) resources, a combination of an a/D converter, a Digital filter, and a D/a converter may be used instead of the passive filter to detect the clock Signal.
Therefore, by adopting the clock signal detection system provided by the embodiment of the invention, on one hand, the advantage of no time delay of the simulation technology is applied to the detection of the clock signal, so that the time consumed by the high-precision detection of the clock signal is greatly reduced, even the clock can be immediately cut off when the frequency deviation of the detected clock exceeds the standard, and the unpredictable fault caused by the output of the clock signal to a later-stage system is avoided; on the other hand, the coupling relation between the clock detection precision and the consumed resource and the detection time is eliminated, so that the design difficulty can be simplified, the balance between the detection precision and the consumed resource and time of a system designer is avoided, and the digital circuit resource can be greatly saved under the condition of very high detection precision.
Fig. 9 is a schematic diagram of another structure of the clock signal detection system according to the embodiment of the present invention.
The difference with the embodiment shown in fig. 6 is that in this embodiment the system further comprises:
and a modulation circuit 901, an output end of which is connected to an input end of the band-pass filter 601, for performing frequency multiplication modulation on the clock signal before the clock signal is input to the band-pass filter.
The modulation circuit 901 inputs a clock signal, performs frequency multiplication modulation on the clock signal, and outputs the frequency-multiplied modulated clock signal to the band-pass filter 601. Accordingly, the band-pass filter 601 inputs the clock signal after frequency multiplication modulation, and the bandwidth of the band-pass filter 601 corresponds to the required detection precision of the clock signal.
Fig. 10 shows a specific application example of the clock signal detection system according to the embodiment of the present invention.
In this example, an 8.192MHz constant temperature crystal oscillator is used to be modulated into a 19.44MHz signal by a DDS (Direct Digital Synthesizer) 101, the DDS801 is output to a high-precision crystal filter 102 with a center frequency of 19.44MHz and a bandwidth of 0.01MHz, an output signal of the crystal filter 102 is shaped by a shaping circuit 103 and then output to a Digital circuit 104, and the Digital circuit 14 detects and uses the signal.
The above detailed description of the embodiments of the present invention, and the detailed description of the embodiments of the present invention used herein, is merely intended to facilitate the understanding of the methods and apparatuses of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A clock signal detection method, comprising:
inputting a clock signal into a band-pass filter, wherein the bandwidth of the band-pass filter corresponds to the required detection precision of the clock signal;
converting the fundamental frequency sinusoidal signals output by the band-pass filter into common-frequency square wave signals;
and detecting whether a square wave signal is output, and if the square wave signal is not output, determining that the clock signal has a fault.
2. The method of claim 1, further comprising:
determining the upper limit cut-off frequency of the band-pass filter according to the sensitivity of the forward frequency offset of the required detection precision;
and determining the lower limit cut-off frequency of the band-pass filter according to the negative frequency offset sensitivity of the required detection precision.
3. The method of claim 1, wherein the band-pass filter is any one of:
crystal filters, active analog filters, passive analog filters, and digital filters.
4. The method of claim 1, wherein the clock signal failing comprises:
the frequency offset of the clock signal is out of demand or the clock signal is lost.
5. The method according to any one of claims 1 to 4, further comprising:
the clock signal is frequency-doubled modulated before being input to a band-pass filter.
6. A clock signal detection system, comprising:
the band-pass filter is used for inputting a clock signal, and the bandwidth of the band-pass filter corresponds to the required detection precision of the clock signal;
the shaping circuit is used for converting the fundamental frequency sinusoidal signals output by the band-pass filter into common-frequency square wave signals;
and the signal detection circuit is used for detecting whether the shaping circuit outputs the square wave signal or not and determining that the clock signal has a fault when the shaping circuit does not output the square wave signal.
7. The system of claim 6,
the upper limit cut-off frequency of the band-pass filter is determined according to the positive frequency offset sensitivity of the required detection precision, and the lower limit cut-off frequency of the band-pass filter is determined according to the negative frequency offset sensitivity of the required detection precision.
8. The system of claim 6, wherein the band-pass filter is any one of:
crystal filters, active analog filters, passive analog filters, and digital filters.
9. The system of claim 7 or 8, wherein the clock signal failing comprises:
the frequency offset of the clock signal is out of demand or the clock signal is lost.
10. The system of any one of claims 6 to 9, further comprising:
the modulation circuit is used for inputting a clock signal, performing frequency multiplication modulation on the clock signal and outputting the clock signal subjected to frequency multiplication modulation to the band-pass filter;
the band-pass filter is used for inputting the clock signal after frequency multiplication modulation, and the bandwidth of the band-pass filter corresponds to the required detection precision of the clock signal.
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| CN112698172A (en) * | 2020-11-27 | 2021-04-23 | 北京无线电计量测试研究所 | Device and method for realizing electric aging |
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