CN102082091B - Method for improving appearance of phosphosilicate glass by virtue of high-density plasma chemical vapor deposition (HDP CVD) - Google Patents
Method for improving appearance of phosphosilicate glass by virtue of high-density plasma chemical vapor deposition (HDP CVD) Download PDFInfo
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- CN102082091B CN102082091B CN2009102018808A CN200910201880A CN102082091B CN 102082091 B CN102082091 B CN 102082091B CN 2009102018808 A CN2009102018808 A CN 2009102018808A CN 200910201880 A CN200910201880 A CN 200910201880A CN 102082091 B CN102082091 B CN 102082091B
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- 239000005360 phosphosilicate glass Substances 0.000 title claims abstract description 48
- 238000000034 method Methods 0.000 title claims abstract description 45
- 238000005229 chemical vapour deposition Methods 0.000 title claims abstract description 16
- 238000005530 etching Methods 0.000 claims abstract description 59
- 230000008569 process Effects 0.000 claims abstract description 22
- 238000004544 sputter deposition Methods 0.000 claims abstract description 13
- 238000002347 injection Methods 0.000 claims abstract description 7
- 239000007924 injection Substances 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 6
- 239000010703 silicon Substances 0.000 claims abstract description 6
- 238000005137 deposition process Methods 0.000 claims abstract description 5
- 239000011521 glass Substances 0.000 claims description 28
- 238000000151 deposition Methods 0.000 claims description 14
- 238000006243 chemical reaction Methods 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 238000004151 rapid thermal annealing Methods 0.000 claims description 3
- 238000002513 implantation Methods 0.000 claims description 2
- 230000009286 beneficial effect Effects 0.000 abstract description 4
- 238000000137 annealing Methods 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 239000005380 borophosphosilicate glass Substances 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 238000005429 filling process Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- 230000002028 premature Effects 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
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- Insulated Gate Type Field-Effect Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses a method for improving the appearance of phosphosilicate glass by virtue of high-density plasma chemical vapor deposition (HDP CVD), comprising the following steps: (1) forming a gate electrode on a silicon substrate; (2) carrying out LDD (laser detector diode) injection and forming a side wall at the side wall of the gate electrode; (3) carrying out drain and source injection and fast thermal annealing; (4) adopting an HDP CVD process to deposit a phosphosilicate glass film, and introducing etching gas to react with the phosphosilicate glass in the process; and (5) carrying out self-aligned contact hole etching. In the method, the etching gas is introduced in the traditional HDP CVD process, so that the etching capability is improved, non-hole filling is guaranteed to be realized under a low-power radio-frequency bias voltage, and simultaneously, secondary sputtering in the deposition process is reduced, therefore, the width of a shell (flow pattern) with low P content formed on the surface of the phosphosilicate glass due to secondary sputtering is reduced, the appearance of the phosphosilicate glass film is improved, and the method is more beneficial to self-aligned contact hole etching.
Description
Technical Field
The invention belongs to the field of semiconductor integrated circuit manufacturing, particularly relates to a high-density plasma chemical vapor deposition (HDP CVD) method, and particularly relates to a method for improving the appearance of phosphorosilicate glass of high-density plasma chemical vapor deposition.
Background
Sub-atmospheric pressure chemical vapor deposited borophosphosilicate glass (SACVD BPSG) is widely used as a pre-metal dielectric (PMD) between a metal layer and underlying polysilicon prior to metal deposition. Wherein, P can absorb alkaline ions, B can reduce the glass transition temperature of the BPSG film, so that the BPSG film can be reflowed and flattened at a lower temperature. However, as feature sizes are decreasing, the SACVD BPSG hole filling performance is not satisfactory, i.e., voids may occur during hole filling, which may cause short circuits between subsequent contact hole (contact) filling processes.
High density plasma chemical vapor deposition (HDP CVD) has simultaneous deposition and etching functions, and thus has good hole-filling properties. On which SiO is deposited2In the process of (2) adding pH3Gas can be generatedBecome to contain P2O5Is referred to as phosphosilicate glass (PSG). In SiO2Adding P2O5The membrane stress can be reduced, and impurity ions can be effectively fixed. HDP PSG is used for the insulating layer between the metal layer of the small-sized device and the polysilicon underneath it. In addition, the HDP PSG combines the CMP (chemical-mechanical planarization) planarization technology, so that a high-temperature reflow step is not required, and the cost can be reduced. Meanwhile, by adopting high-concentration (8-10%) HDP PSG and combining a self-aligned contact (SAC) process and a high-selectivity etching technology of high-concentration PSG to silicon dioxide, a SAC etching barrier layer is not needed, so that the alignment difficulty of photoetching is reduced, and the feasibility of reducing the size of a device is greatly improved.
Due to the secondary sputtering characteristic of the HDP CVD process, a low P-content shell, called flower pattern, is formed on the channel surface when the high-concentration PSG film 8 is deposited, as shown in fig. 1. When the HDP technology is used to fill a trench structure with a high aspect ratio and a small size (less than 0.25 μm), in order to avoid voids in the hole filling process, a high-power rf bias is used to increase the physical bombardment etching rate of the plasma to obtain a higher etching capability, thereby improving the hole filling performance, but at the same time, the high rf bias increases the bombardment strength, which also leads to increased secondary sputtering, and thus increases the width of the flowerpattern, as shown in fig. 1. Since the content of P in the flower pattern is low, the SAC etching rate is reduced, if the flower pattern is too large, an etching stop phenomenon is caused, and the contact hole 9 cannot be etched through, as shown in fig. 2. Therefore, more advanced PSG processes require optimization of both the hole-filling and the flow pattern.
Disclosure of Invention
The invention provides a method for improving the shape of phosphorosilicate glass deposited by high-density plasma chemical vapor deposition, which introduces etching gas in the traditional HDP CVD process, improves the etching capability of the phosphorosilicate glass, ensures that no cavity is filled under low-power radio-frequency bias, and weakens secondary sputtering in the deposition process, thereby reducing the width of PSG (particle swarm optimization) pattern and being more beneficial to the corresponding self-aligned contact hole etching.
In order to solve the technical problem, the invention provides a method for improving the shape of phosphorosilicate glass deposited by high-density plasma chemical vapor deposition, which comprises the following steps:
(1) forming a gate electrode on a silicon substrate;
(2) LDD injection is carried out, and a side wall is formed on the side wall of the gate electrode;
(3) source-drain implantation and rapid thermal annealing;
(4) depositing a phosphorosilicate glass film by adopting a high-density plasma chemical vapor deposition process, and introducing etching gas to react with the phosphorosilicate glass in the process;
(5) and etching the self-aligned contact hole.
In the step (4), the introduced etching gas is any gas capable of reacting with silicon dioxide, and the resultant is a gas. The etching gas is HF, F2Or NF3. The introduced etching gas participates in the reaction in two ways:
A. introducing the reaction source gas of the phosphorosilicate glass and the reaction source gas of the phosphorosilicate glass into the cavity of the machine table simultaneously, and depositing a phosphorosilicate glass film in a mode of growing and etching simultaneously; the reaction source gas of the phosphorosilicate glass is SiH4Or O2(ii) a Or
B. By changing the flow of the etching gas, the phosphorosilicate glass is grown firstly, and then the etching gas etching is carried out to deposit the phosphorosilicate glass film repeatedly and intermittently in multiple steps.
The etching gas reacts with the phosphorosilicate glass, so that the film thickness of the side wall of the channel is reduced, and the phosphorosilicate glass film grows upwards from the bottom gradually.
Compared with the prior art, the invention has the following beneficial effects: after etching gas is introduced into the traditional HDP CVD process, under the combined action of selective sputtering etching of radio frequency bias and chemical reaction isotropic etching of the etching gas, the film thickness of the side wall of a channel is effectively reduced, the hole filling difficulty of HDP PSG is reduced, and the HDP PSG grows upwards from the bottom gradually, so that the requirement of filling without a cavity can be met under low-power radio frequency bias, secondary sputtering in the deposition process is weakened, the width of a low-P-content shell (PSG power pattern) formed on the surface of the phosphorosilicate glass by the secondary sputtering is reduced, the phosphorosilicate glass morphology of high-density plasma chemical vapor deposition is improved, and the corresponding self-aligned contact hole etching is facilitated.
Drawings
FIG. 1 is a schematic diagram of a PSG power pattern formed using a conventional HDP CVD process;
FIG. 2 is a schematic illustration of SAC etch stop caused by a conventional HDP CVD process;
FIGS. 3-7 are schematic flow diagrams of the method of the present invention; wherein,
FIG. 3 is a schematic illustration of a polysilicon gate electrode of the present invention after formation;
FIG. 4 is a schematic diagram of a polysilicon gate electrode of the present invention after the formation of sidewalls;
FIG. 5 is a schematic diagram of the source and drain after formation of the present invention;
FIG. 6 is a schematic view of a phosphosilicate glass growth process of the present invention;
FIG. 7 is a schematic view of the morphology of a phosphosilicate glass film after completion of the present invention.
The structure comprises a substrate 1, a gate oxide layer 2, a polysilicon layer 3, a silicon nitride layer 4, a side wall 5, a source electrode 6, a drain electrode 7, a PSG film 8 and a contact hole 9.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
As shown in fig. 3-7, the method for forming a phosphosilicate glass by high-density plasma chemical vapor deposition according to the present invention specifically comprises the following steps:
firstly, forming a gate electrode on a silicon substrate 1, generally depositing a gate oxide layer 2 on the silicon substrate 1 by adopting a conventional process method, then depositing a polycrystalline silicon layer 3 on the gate oxide layer 2, then depositing a silicon nitride layer 4 on the polycrystalline silicon layer 3, and photoetching and etching the polycrystalline silicon to form a polycrystalline silicon gate electrode, wherein the figure is 3;
secondly, injecting LDD (Light Doped Drain), forming a side wall 5 on the side wall of the gate electrode, preparing silicon nitride by using a conventional chemical vapor deposition process to form the side wall 5, and then forming a silicon nitride side wall 5 by using dry etching, as shown in FIG. 4;
thirdly, performing source-drain injection and rapid thermal annealing; firstly, defining a source-drain pattern by photoetching, and then injecting impurity ions into a source-drain injection region corresponding to the silicon substrate 1 by using an ion injection process to form a source electrode 6 and a drain electrode 7, as shown in FIG. 5;
a fourth step of depositing a phosphosilicate glass PMD layer, i.e., the PSG film 8 of fig. 6, using an HDP-CVD (high density plasma chemical vapor deposition) process, as shown in fig. 6 and 7; an etching gas is introduced to improve the etching capability, the introduced etching gas is any gas capable of reacting with silicon dioxide, and the resultant is a gas such as HF, F2，NF3And the like. The introduced etching gas can participate in the reaction in two ways: (1) source gas (e.g. SiH) for reaction with PSG4Or O2) Simultaneously introducing the film into a machine cavity, and depositing a PSG film 8 in a mode of growing and etching simultaneously; (2) the PSG film 8 is deposited intermittently in a plurality of steps repeatedly by varying the flow rate of the etching gas (the flow rate is 0 to 50sccm) in growth of phosphosilicate glass (the etching gas is off) → etching (the etching gas is on). The etching gas can react with PSG, effectively reduces the film thickness of the side wall of the channel, and reduces the thickness of the side wall of the channelThe hole filling difficulty of the HDP PSG is low, and the HDP PSG gradually grows upwards from the bottom, so that the cavity-free filling can be met under low-power radio frequency bias, and the width of the PSG power pattern is reduced. The deposition rate at the bottom of the trench is faster than the sidewalls due to the selective physical sputtering of HDP. Adding etching gas, such as HF, F, during HDP PSG deposition2，NF3And the PSG can be consumed isotropically, so that the deposition of the PSG on the side wall of the channel can be weakened, the generation of a void due to premature combination is avoided, the PSG in the channel grows upwards from the bottom (as shown in figure 6), and the void-free filling can be met under low-power radio-frequency bias, so that the width of the PSG power pattern is effectively reduced, as shown in figure 7.
Fifthly, the subsequent process comprises self-aligned contact hole etching.
When a small-size channel structure is filled, in order to improve the hole filling performance of HDP PSG, etching gas is introduced in the traditional HDP CVD process, so that under the combined action of selective sputtering etching of radio frequency bias and chemical reaction isotropic etching of the etching gas, the deposition of PSG on the side wall of a channel is weakened, the phenomenon that a cavity is formed due to premature combination is avoided, the PSG in the channel grows upwards from the bottom, the HDP can be filled without the cavity under the low-power radio frequency offset, the secondary sputtering in the deposition process is weakened, the width of the PSG power pattern is controlled, and the method is more beneficial to the corresponding self-aligned contact hole etching.
Claims (7)
1. A method for improving the shape of phosphorosilicate glass deposited by high-density plasma chemical vapor deposition is characterized by comprising the following steps: the method comprises the following steps:
(1) forming a gate electrode on a silicon substrate;
(2) LDD injection is carried out, and a side wall is formed on the side wall of the gate electrode;
(3) source-drain implantation and rapid thermal annealing;
(4) depositing a phosphorosilicate glass film by adopting a high-density plasma chemical vapor deposition process, and introducing etching gas to react with the phosphorosilicate glass in the process;
(5) and etching the self-aligned contact hole.
2. The method for improving the morphology of high density plasma chemical vapor deposited phosphorosilicate glass of claim 1, wherein in step (4), the introduced etching gas is any gas that can react with silicon dioxide, and the resultant is a gas.
3. The method for improving morphology of high density plasma chemical vapor deposited phosphorosilicate glass according to claim 1 or 2, wherein in the step (4), the etching gas is HF, F2Or NF3。
4. The method for improving the morphology of high density plasma chemical vapor deposited phosphosilicate glass according to claim 1, wherein in step (4), the introduced etching gas reacts in two ways:
A. introducing the reaction source gas of the phosphorosilicate glass and the reaction source gas of the phosphorosilicate glass into the cavity of the machine table simultaneously, and depositing a phosphorosilicate glass film in a mode of growing and etching simultaneously; or
B. By changing the flow of the etching gas, the phosphorosilicate glass is grown firstly, and then the etching gas etching is carried out to deposit the phosphorosilicate glass film repeatedly and intermittently in multiple steps.
5. The method of claim 4, wherein in the method A, the reaction source gas of the phosphorosilicate glass is SiH4Or O2。
6. The method according to claim 4, wherein in the method B, the flow rate of the etching gas is 0-50 sccm.
7. The method for improving the morphology of phosphosilicate glass deposited by high-density plasma chemical vapor deposition as claimed in claim 1, wherein in the step (4), the etching gas reacts with the phosphosilicate glass to reduce the film thickness of the trench sidewall and realize gradual upward growth of the phosphosilicate glass film from the bottom, so that void-free filling can be satisfied under low-power radio frequency bias, and secondary sputtering in the deposition process is also reduced, thereby reducing the width of a shell with low P content formed on the surface of the phosphosilicate glass by the secondary sputtering and improving the morphology of the phosphosilicate glass film.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3758045A1 (en) * | 2019-06-26 | 2020-12-30 | United Microelectronics Corp. | Semiconductor structure and method for forming the same |
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| CN102417306B (en) * | 2011-09-08 | 2013-10-09 | 上海华力微电子有限公司 | Technological method for solving vaporous particles on surface of PSG(Phosphosilicate Glass) film with high phosphorus concentration |
| CN104241103A (en) * | 2013-06-14 | 2014-12-24 | 无锡华润上华科技有限公司 | Method for manufacturing WSI composite gate |
| CN110544617B (en) * | 2018-05-28 | 2021-11-02 | 联华电子股份有限公司 | Method for manufacturing oxide layer in peripheral circuit region |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008047898A (en) * | 2006-08-18 | 2008-02-28 | Hynix Semiconductor Inc | Method for manufacturing semiconductor element |
| CN101350327A (en) * | 2007-07-17 | 2009-01-21 | 上海华虹Nec电子有限公司 | Method for preparing local silicon oxidation isolation structure |
| CN101407370A (en) * | 2007-10-09 | 2009-04-15 | 中芯国际集成电路制造(上海)有限公司 | Method for improving undercut flaw of phosphorosilicate glass |
| US7524751B2 (en) * | 2006-11-29 | 2009-04-28 | Dongbu Hitek Co., Ltd. | Method for forming contact hole in semiconductor device |
| CN101417856A (en) * | 2007-10-26 | 2009-04-29 | 上海华虹Nec电子有限公司 | Method for preparing phosphorosilicate glass |
| CN101436537A (en) * | 2007-11-13 | 2009-05-20 | 上海华虹Nec电子有限公司 | Method for removing phosphosilicate glass flower bulb top |
| CN101450833A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Phosphosilicate glass growth process and phosphosilicate glass |
| CN101452905A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Self-alignment contact hole interlayer film, manufacturing method, and contact hole etching method |
| CN101452909A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Contact hole interlayer film, manufacturing method thereof, and contact hole etching method |
-
2009
- 2009-11-30 CN CN2009102018808A patent/CN102082091B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008047898A (en) * | 2006-08-18 | 2008-02-28 | Hynix Semiconductor Inc | Method for manufacturing semiconductor element |
| US7524751B2 (en) * | 2006-11-29 | 2009-04-28 | Dongbu Hitek Co., Ltd. | Method for forming contact hole in semiconductor device |
| CN101350327A (en) * | 2007-07-17 | 2009-01-21 | 上海华虹Nec电子有限公司 | Method for preparing local silicon oxidation isolation structure |
| CN101407370A (en) * | 2007-10-09 | 2009-04-15 | 中芯国际集成电路制造(上海)有限公司 | Method for improving undercut flaw of phosphorosilicate glass |
| CN101417856A (en) * | 2007-10-26 | 2009-04-29 | 上海华虹Nec电子有限公司 | Method for preparing phosphorosilicate glass |
| CN101436537A (en) * | 2007-11-13 | 2009-05-20 | 上海华虹Nec电子有限公司 | Method for removing phosphosilicate glass flower bulb top |
| CN101450833A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Phosphosilicate glass growth process and phosphosilicate glass |
| CN101452905A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Self-alignment contact hole interlayer film, manufacturing method, and contact hole etching method |
| CN101452909A (en) * | 2007-11-30 | 2009-06-10 | 上海华虹Nec电子有限公司 | Contact hole interlayer film, manufacturing method thereof, and contact hole etching method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3758045A1 (en) * | 2019-06-26 | 2020-12-30 | United Microelectronics Corp. | Semiconductor structure and method for forming the same |
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