CN102054691A - Preparation method of nano-fluid transistor - Google Patents

Abstract

A method for preparing a nanofluid transistor, comprising: growing a layer of electrothermal insulating material and a base material layer on a substrate; removing four sides of the base material layer by photolithography and dry etching to form a base for preparing side walls Deposit a side wall material layer on the surface and side surfaces of the electric thermal insulating material layer and the base material layer; remove the upper surface of the base material layer and the side wall material layer on the surface of the electric thermal insulating material layer, forming a height and a width that are all nanometers The size of the side wall; remove the base material layer; on one side of the side wall material layer, put a layer of anti-corrosion insulating material for making nano flow pipeline; then put an anti-corrosion insulating material layer for making gate electrode Corroded metal layer; remove the side wall material layer, retain the anti-corrosion insulating material layer and anti-corrosion metal layer, form a nano-flow pipe, and inject the nano-fluid; passivate and open holes at both ends of the pipe and above the metal layer, and lead out The three-terminal electrodes form a nanofluid transistor.

Description

Preparation method of nanofluid transistor

technical field

The invention relates to the technical field of micro-nano electronics, in particular to a preparation method of a nanofluid transistor. The invention provides a method for preparing a nanofluid transistor by adopting a sidewall process and a wet etching method. This method avoids the disadvantages of high cost and long period of electron beam exposure as far as possible, and has great advantages in breaking through the limitation of lithography resolution and improving the preparation efficiency of nanofluid transistors.

Background technique

In recent years, the semiconductor industry and the microelectronics industry have developed rapidly with Moore's Law, but with the introduction of quantum size effects, etc., the size of transistors has almost reached the limit. In order to find new ways to promote the further development of the microelectronics industry. Many scientists are committed to the development of new electronic components, such as: single-electron transistors, carbon nanotube transistors, nanofluid transistors and so on. Therefore, the preparation of nano-scale nanofluidic transistors has become an important research direction for us.

At present, the preparation methods of nanostructures mainly include: photolithography, electron beam etching, focused ion beam etching, microcontact printing, electrochemical methods, and electromigration methods. However, the optical lithography method is limited by the wavelength of light, and the etching limit is at the micron level, which is difficult to reach the nanometer level; the methods of microcontact printing, electron beam etching and focused ion beam etching have long cycle times and high costs; electrochemical and The process reliability of the electromigration method is low, which may cause incompatibility with the CMOS process. In order to break through the limitation of lithographic resolution and improve the compatibility of devices and CMOS technology, and find a simple and low-cost method for preparing nano-scale nanofluid transistors, we propose the concept of the present invention.

Contents of the invention

The main purpose of the present invention is to provide a method for preparing a nanofluid transistor, to find a method for preparing a nanofluid transistor, and the preparation method is simple and low in cost, can break through the limitation of photolithography resolution, and improve the nanofluid transistor. Preparation efficiency.

In order to achieve the above object, the present invention provides a method for preparing a nanofluid transistor, comprising the steps of:

Step 1: growing a layer of anti-corrosion electric thermal insulation material layer and base material layer on the substrate;

Step 2: remove the four sides of the base material layer by photolithography and dry etching, and form a pattern as the base for preparing side walls;

Step 3: Depositing a side wall material layer on the upper surface of the electrothermal insulating material layer and the surface and side of the base material layer;

Step 4: using a dry method to etch back, remove the side wall material layer on the upper surface of the base material layer and the surface of the electrothermal insulation material layer, and form a side wall with a height and a width of nanometer size;

Step 5: Remove the base material layer by wet etching, leaving only the nano-sized sidewalls;

Step 6: using thin film deposition + photolithography + dry etching process to build a corrosion-resistant insulating material layer on one side of the side wall material layer for making nano flow pipes;

Step 7: use photolithography or electron beam lithography + thin film deposition + stripping process to build a corrosion-resistant metal layer for making gate electrodes on the corrosion-resistant insulating material layer;

Step 8: Then use wet etching to remove the sidewall material layer, retain the corrosion-resistant insulating material layer and the corrosion-resistant metal layer to form a nanoflow pipeline, and inject nanofluid into the pipeline;

Step 9: passivating and opening holes at both ends of the pipe and above the metal layer, leading out three-terminal electrodes to form a nanofluid transistor, and completing the preparation of the nanofluid transistor.

Another technical solution of the present invention is a method for preparing a nanofluid transistor, comprising the following steps:

Step 1: growing a layer of anti-corrosion electric thermal insulation material layer and base material layer on the substrate;

Step 2: remove the four sides of the base material layer by photolithography and dry etching, and form a pattern as the base for preparing side walls;

Step 3: Depositing a side wall material layer on the upper surface of the electrothermal insulating material layer and the surface and side of the base material layer;

Step 4: using a dry method to etch back, remove the side wall material layer on the upper surface of the base material layer and the surface of the electrothermal insulation material layer, and form a side wall with a height and a width of nanometer size;

Step 5: Remove the base material layer by wet etching, leaving only the nano-sized sidewalls;

Step 6: using thin film deposition + photolithography + dry etching process to build a corrosion-resistant insulating material layer on one side of the side wall material layer for making nano flow pipes;

Step 7: use photolithography or electron beam lithography + thin film deposition + stripping process to build a corrosion-resistant metal layer for making gate electrodes on the corrosion-resistant insulating material layer;

Step 8: Then use wet etching to remove the sidewall material layer, retain the corrosion-resistant insulating material layer and the corrosion-resistant metal layer to form a nanoflow pipeline, and inject nanofluid into the pipeline;

Step 9: passivating and opening holes at both ends of the pipe and above the metal layer, leading out three-terminal electrodes to form a nanofluid transistor, and completing the preparation of the nanofluid transistor.

As can be seen from the foregoing technical solutions, the present invention has the following beneficial effects:

The preparation method of the nanofluid transistor provided by the present invention adopts a thin film process, a photolithography stripping process, a photolithography dry etching process, a wet etching process and a sidewall process to prepare the nanofluid transistor. The characteristics of the preparation method of this nanofluid transistor are: simple structure, convenient preparation, small channel size, avoiding the use of electron beam exposure (EBL), focused ion beam exposure (FIB) and other technologies, greatly reducing the cost and integration It has been greatly improved, and at the same time, it has broken through the limitation of lithography resolution and improved the efficiency of preparing nanofluid transistors.

Description of drawings

In order to further describe the specific technical content of the present invention, the following detailed description is as follows in conjunction with the embodiments and accompanying drawings, wherein:

Fig. 1 is the flow chart of the method scheme 1 of preparing nanofluid transistor provided by the present invention;

2-8 are structural schematic diagrams of preparing nanofluidic transistors in Scheme 1.

Fig. 9 is a flowchart of the second method of preparing a nanofluid transistor provided by the present invention;

10-16 are structural schematic diagrams of preparing nanofluidic transistors in Scheme 2.

Detailed ways

Embodiment one

Please refer to Fig. 1 to Fig. 8, a preparation method of a nanofluid transistor of the present invention comprises the following steps:

Step 1: grow a corrosion-resistant electrothermal insulating material layer 102 and base material layer 103 on the substrate 101; the electrothermal insulating material 102 can be oxide, nitride, sulfide or be made of oxide, nitrogen any one of mixtures of at least two of compound and sulfide; the growth of a layer of electrothermal insulating material 102 on the substrate can be by sputtering, evaporation, plasma-assisted deposition, chemical One of vapor deposition method, metal-organic thermal decomposition method, laser-assisted deposition method and thermal oxidation method is realized; the electric thermal insulation material 102, for the wet removal of the base material layer 103 in step 5 and the wet removal method in step 8 The etchant used when removing the side wall material layer 104 by the method has corrosion resistance; wherein the base material layer 103 can be oxide, nitride, sulfide or be made of oxide, nitride, sulfide Any one of at least two kinds of mixtures; the deposition of a layer of base material layer 103 may be by sputtering, evaporation, plasma-assisted deposition, chemical vapor deposition, metal-organic thermal decomposition (Fig. 2a and Fig. 2b);

Step 2: remove the four sides of the base material layer 103 by photolithography and dry etching, and form a pattern as the base for preparing sidewalls (Fig. 2a and Fig. 2b);

Step 3: Deposit a sidewall material layer 104 on the surface of the electrothermal insulation material layer 102 and the base material layer 103; wherein the sidewall material layer 104 can be oxide, nitride, sulfide or made of Any one of a mixture of at least two of oxides, nitrides, and sulfides; the deposition of a layer of sidewall material layer 104 may be by sputtering, evaporation, or plasma-assisted deposition , chemical vapor deposition, metal-organic thermal decomposition, laser-assisted deposition and thermal oxidation; the sidewall material layer 104 is used when removing the base material layer 103 in step 5 Corrosive solution has corrosion resistance (Figure 3a and Figure 3b);

Step 4: Using dry etching back, remove the upper surface of the base material layer 103 and the sidewall material layer 104 on the surface of the electrical insulation material layer 102, and form a sidewall with a height and a width of nanometer size (Figure 4a and Figure 4b) ;

Step 5: The base material layer 103 is removed by wet etching, and only nanometer-sized sidewalls are retained; the etching solution can be one of HF acid, TMAH solution, hot concentrated phosphoric acid, etc. (Fig. 5a and Fig. 5b) .

Step 6: using thin film deposition + photolithography + dry etching process to build a corrosion-resistant insulating material layer 106 on one side of the sidewall material layer 104 for making nano-flow pipes; the corrosion-resistant material layer 106 , the etching solution used when removing the sidewall material layer 104 in step 8 has corrosion resistance; the corrosion-resistant material layer 106 can be metal or oxide, nitride, sulfide or be made of oxide, nitride, Any one of the mixture of at least two kinds of sulfides; the deposition of the anti-corrosion material layer 106 can be by sputtering, evaporation, plasma-assisted deposition, chemical vapor deposition, metal Realized by one of organic thermal decomposition method, laser assisted deposition method and thermal oxidation method (Figure 6a and Figure 6b);

Step 7: use photolithography or electron beam lithography+film deposition+stripping process to build a corrosion-resistant metal layer 105 for gate electrode on the corrosion-resistant insulating material layer 106; the corrosion-resistant metal layer 105 , the corrosion solution used when removing the sidewall material layer 104 in step 8 has corrosion resistance; the corrosion-resistant metal layer 105 can be any one of tungsten, nickel, copper, silver, gold or platinum; The anti-corrosion metal layer 105 can be prepared by one of sputtering, evaporation and chemical vapor deposition (Fig. 7a and Fig. 7b);

Step 8: Finally, the side wall material layer 104 is removed by wet etching, and the anti-corrosion insulating material layer 106 and the anti-corrosion metal layer 105 are retained to form a nanoflow pipeline, and the nanofluid is injected into the pipeline; the corrosive solution therein can be It is one of HF acid, TMAH solution, hot concentrated phosphoric acid, etc. (Figure 8a and Figure 8b);

Step 9: Lead out the electrodes at both ends of the pipe to form a nanofluid transistor, and complete the preparation of the nanofluid transistor (FIG. 8a and FIG. 8b).

The preparation method of the nanofluid transistor provided by the present invention is based on a sidewall process and a wet etching process, so as to break through the limitation of photolithographic resolution and improve the preparation efficiency of the nanofluid transistor. The following are specific examples.

Example:

1. Using semiconductor or insulating materials such as monocrystalline silicon wafers and SOI wafers as the substrate 101;

2. Using a thin film preparation process, silicon nitride is prepared on the substrate as the electrothermal insulation layer 102 and polysilicon is used as the base material layer 103;

3. Remove the four sides of the base material layer 103 by photolithography and dry etching to form a pattern as the base for preparing side walls;

4. Deposit SiO ₂ on the surface and side surfaces of the electrothermal insulating material layer 102 and the base material layer 103 as the side wall material layer 104;

5. Use dry method to etch back, remove the side wall material layer 104 on the upper surface of the base material layer 103 and the surface of the electric thermal insulation material layer 102, and form a _SiO2 side wall with a height and a width of nanometer size;

6. Rinse off the side wall substrate 103 with a constant temperature TMAH solution (the constant temperature TMAH solution has a high etching selectivity ratio to the substrate silicon nitride and side wall silicon dioxide), and the temperature of the TMAH solution is constant at a certain temperature in the range of 50-90°C. One value, only nano-sized sidewalls are kept;

7. Using thin film deposition + photolithography + dry etching process to build a silicon nitride 106 on one side of the sidewall material layer 104 to make a nanoflow channel;

8. Put a tungsten metal 105 for gate electrode on the silicon nitride nanoflow pipeline 106 by photolithography or electron beam lithography+film deposition+lift-off process;

9. Then use diluted hydrofluoric acid to remove the _SiO2 side wall material layer 104, retain the silicon nitride nano-flow pipeline 106 and the tungsten metal layer 105, form a nano-flow pipeline, and inject the nano-fluid into the pipeline;

10. Passivate and open holes at both ends of the pipe and above the tungsten metal layer 105, and lead out three-terminal electrodes to form a nanofluid transistor, and complete the preparation of the nanofluid transistor.

Embodiment two

Please refer to FIG. 9 to FIG. 16, a method for preparing a nanofluid transistor of the present invention includes the following steps:

Step 1': growing a layer of corrosion-resistant electrical and thermal insulation material layer 102' and base material layer 103' on the substrate 101'; the electrical and thermal insulation material 102' can be oxide, nitride, sulfide or Any one of mixtures composed of at least two of oxides, nitrides, and sulfides; the growth of a layer of electrothermal insulating material 102' on the substrate can be done by sputtering, evaporation, or plasma It is realized by one of assisted deposition method, chemical vapor deposition method, metal organic compound thermal decomposition method, laser assisted deposition method and thermal oxidation method; the electrothermal insulating material 102' is used for removing the substrate by wet method in step 5' The material layer 103' and the etching solution used for wet removal of the side wall material layer 104' in step 8' are all corrosion-resistant; wherein the base material layer 103' can be oxide, nitride, sulfide or It is any one of mixtures composed of at least two of oxides, nitrides, and sulfides; the deposition of a layer of base material layer 103' can be done by sputtering, evaporation, or plasma-assisted deposition. One of deposition method, chemical vapor deposition method, metal organic compound thermal decomposition method, laser assisted deposition method and thermal oxidation method is realized (Fig. 10a and Fig. 10b);

Step 2': remove the four sides of the base material layer 103' by photolithography and etching, and form a pattern as the base for preparing sidewalls (Figure 10a and Figure 10b);

Step 3': Deposit a sidewall material layer 104' on the surface of the electrothermal insulating material layer 102' and the surface of the base material layer 103'; wherein the sidewall material layer 104' can be oxide, nitride, Sulfide or any one of a mixture of at least two of oxides, nitrides, and sulfides; the deposition of a layer of sidewall material layer 104' can be done by sputtering, evaporation, Realized by one of the plasma-assisted deposition method, chemical vapor deposition method, metal-organic thermal decomposition method, laser-assisted deposition method and thermal oxidation method; the side wall material layer 104', for step 5' The etchant used when removing the base material layer 103' has corrosion resistance (Fig. 11a and Fig. 11b);

Step 4': use dry method to etch back, remove the side wall material layer 104' on the upper surface of the base material layer 103' and the surface of the electric insulation material layer 102', and form a side wall with a height and a width of nanometer size (Fig. 12a and Figure 12b);

Step 5': remove the base material layer 103' by wet etching, and only keep the nanometer-sized side walls; the etching solution can be one of HF acid, TMAH solution, hot concentrated phosphoric acid, etc. (Figure 13a and 13b);

Step 6': use thin film deposition + photolithography + dry etching process to build a corrosion-resistant insulating material layer 106' on one side of the side wall material layer 104'; The material layer 106' has corrosion resistance to the corrosion solution used when removing the sidewall material layer 104' in step 7'; the corrosion-resistant material layer 106' can be metal or oxide, nitride, sulfide or Any one of mixtures composed of at least two of oxides, nitrides, and sulfides; the deposition of the anti-corrosion material layer 106' may be by sputtering, evaporation, or plasma-assisted deposition , chemical vapor deposition, metal-organic compound thermal decomposition, laser-assisted deposition and thermal oxidation (Fig. 14a and Fig. 14b);

Step 7': Remove the sidewall material layer 104' by wet etching, retain the corrosion-resistant insulating material layer 106', and form a nanoflow pipeline; the etching solution can be HF acid, TMAH solution, hot concentrated phosphoric acid, etc. A kind of (Fig. 15a and Fig. 15b).

Step 8': Then use photolithography or electron beam lithography + thin film deposition + stripping process to build a corrosion-resistant metal layer 105' for gate electrode on the corrosion-resistant insulating material layer 106', and inject it into the pipeline Nanofluid; the anti-corrosion metal layer 105' can be any one of tungsten, nickel, copper, silver, gold or platinum; the anti-corrosion metal layer 105' can be sputtering, evaporation prepared by one of method and chemical vapor deposition method (Fig. 16a and Fig. 16b);

Step 9': Lead out the electrodes at both ends of the pipeline to form a nanofluid transistor, and complete the preparation of the nanofluid transistor (Fig. 16a and Fig. 16b).

The preparation method of the nanofluid transistor provided by the present invention is based on a sidewall process and a wet etching process, so as to break through the limitation of photolithographic resolution and improve the preparation efficiency of the nanofluid transistor. The following is the specific embodiment of the second embodiment.

Example:

1. Use semiconductor or insulating materials such as monocrystalline silicon wafers and SOI wafers as the substrate 101';

2. Using a thin film preparation process, silicon nitride is prepared on the substrate as the electrothermal insulation layer 102' and polysilicon is used as the base material layer 103';

3. Remove the four sides of the base material layer 103' by photolithography and dry etching to form a pattern as the base for preparing side walls;

4. Deposit SiO ₂ on the surface and side surfaces of the electrical insulation material layer 102' and the base material layer 103' as the sidewall material layer 104';

5. Using dry etching back, remove the upper surface of the base material layer 103' and the sidewall material layer 104' on the surface of the electrothermal insulation material layer 102', and form _SiO2 sidewalls with nanometer dimensions in both height and width;

6. Rinse off the side wall substrate 103' with a constant temperature TMAH solution (the constant temperature TMAH solution has a high etching selectivity ratio to substrate silicon nitride and side wall silicon dioxide), and the temperature of the TMAH solution is kept constant at 50-90°C A certain value, only nano-sized sidewalls are kept;

7. Using thin film deposition + photolithography + dry etching process to build a silicon nitride 106' for making a nanoflow channel on one side of the sidewall material layer 104';

8. Removing the _SiO2 side wall material layer 104' with diluted hydrofluoric acid, and retaining the silicon nitride nanoflow pipe 106' to form a nanoflow pipe;

9. Then use photolithography or electron beam lithography + thin film deposition + stripping process to put a tungsten metal 105' for gate electrode on the silicon nitride nanoflow pipeline 106', and inject nanofluid into the pipeline;

10. Passivate and open holes at both ends of the pipe and above the tungsten metal layer 105', and lead out the three-terminal electrodes to form a nanofluid transistor, and complete the preparation of the nanofluid transistor.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the invention.

Claims (14)

1. A method for preparing a nanofluid transistor, comprising the steps of: Step 1: growing a layer of anti-corrosion electric thermal insulation material layer and base material layer on the substrate; Step 2: remove the four sides of the base material layer by photolithography and dry etching, and form a pattern as the base for preparing side walls; Step 3: Depositing a side wall material layer on the upper surface of the electrothermal insulating material layer and the surface and side of the base material layer; Step 4: using a dry method to etch back, remove the side wall material layer on the upper surface of the base material layer and the surface of the electrothermal insulation material layer, and form a side wall with a height and a width of nanometer size; Step 5: Remove the base material layer by wet etching, leaving only the nano-sized sidewalls; Step 6: using thin film deposition + photolithography + dry etching process to build a corrosion-resistant insulating material layer on one side of the side wall material layer for making nano flow pipes; Step 7: use photolithography or electron beam lithography + thin film deposition + stripping process to build a corrosion-resistant metal layer for making gate electrodes on the corrosion-resistant insulating material layer; Step 8: Then use wet etching to remove the sidewall material layer, retain the corrosion-resistant insulating material layer and the corrosion-resistant metal layer to form a nanoflow pipeline, and inject nanofluid into the pipeline; Step 9: passivating and opening holes at both ends of the pipe and above the metal layer, leading out three-terminal electrodes to form a nanofluid transistor, and completing the preparation of the nanofluid transistor. 2. the preparation method of nanofluid transistor according to claim 1, wherein said electrothermal insulating material layer is silicon nitride or SiO ₂ ; Described base material layer is SiO ₂ , silicon nitride or polycrystalline silicon; Described side wall The material layer is SiO ₂ , silicon nitride or polysilicon; the corrosion-resistant metal layer is tungsten, nickel, copper, silver, gold or platinum, and the corrosion-resistant insulating material layer is SiO ₂ or silicon nitride. 3. The method for preparing a nanofluid transistor according to claim 1, wherein the substrate in step 1 is a semiconductor material substrate or an insulating material substrate. 4. The method for preparing a nanofluid transistor according to claim 3, wherein the semiconductor material substrate is a silicon wafer or an SOI wafer, and the insulating material substrate is SiO ₂ or glass. 5. The method for preparing a nanofluidic transistor according to claim 1, wherein the thickness of the base material layer is 20-2000 nm. 6 . The method for fabricating a nanofluidic transistor according to claim 1 , wherein the width of the sidewall formed by the sidewall material layer is 5-200 nm. 7 . The method for preparing a nanofluid transistor according to claim 1 , wherein the nanopipe formed by the anti-corrosion material layer has a width of 5-200 nm, a height of 5-2000 nm, and a length of the order of millimeters. 8. A method for preparing a nanofluid transistor, comprising the steps of: Step 1: growing a layer of anti-corrosion electric thermal insulation material layer and base material layer on the substrate; Step 2: remove the four sides of the base material layer by photolithography and dry etching, and form a pattern as the base for preparing side walls; Step 3: Depositing a side wall material layer on the upper surface of the electrothermal insulating material layer and the surface and side of the base material layer; Step 4: using a dry method to etch back, remove the side wall material layer on the upper surface of the base material layer and the surface of the electrothermal insulation material layer, and form a side wall with a height and a width of nanometer size; Step 5: Remove the base material layer by wet etching, leaving only the nano-sized sidewalls; Step 6: using thin film deposition + photolithography + dry etching process to build a corrosion-resistant insulating material layer on one side of the side wall material layer for making nano flow pipes; Step 7: Remove the side wall material layer by wet etching, retain the anti-corrosion insulating material layer, and form a nanoflow pipe; Step 8: Then use photolithography or electron beam lithography + thin film deposition + stripping process to build a corrosion-resistant metal layer for making gate electrodes on the corrosion-resistant insulating material layer, and inject sodium fluid into the pipeline; Step 9: passivating and opening holes at both ends of the pipe and above the metal layer, leading out three-terminal electrodes to form a nanofluid transistor, and completing the preparation of the nanofluid transistor. 9. The preparation method of nanofluidic transistor according to claim 8, wherein said electrothermal insulating material layer is silicon nitride or SiO ₂ ; The base material layer is SiO ₂ , silicon nitride or polysilicon; The material layer is SiO ₂ , silicon nitride or polysilicon; the corrosion-resistant metal layer is tungsten, nickel, copper, silver, gold or platinum, and the corrosion-resistant insulating material layer is SiO ₂ or silicon nitride. 10. The method for preparing a nanofluid transistor according to claim 8, wherein the substrate in step 1 is a semiconductor material substrate or an insulating material substrate. 11. The method for preparing a nanofluid transistor according to claim 10, wherein the semiconductor material substrate is a silicon wafer or an SOI wafer, and the insulating material substrate is SiO ₂ or glass. 12. The method for preparing a nanofluidic transistor according to claim 8, wherein the thickness of the base material layer is 20-2000 nm. 13. The method for fabricating a nanofluidic transistor according to claim 8, wherein the width of the sidewall formed by the sidewall material layer is 5-200 nm. 14. The method for preparing a nanofluid transistor according to claim 8, wherein the nanopipe formed by the corrosion-resistant material layer has a width of 5-200 nm, a height of 5-2000 nm, and a length of the order of millimeters.

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