CN102040185B - Manufacturing method of load bearing wafer and load bearing wafer - Google Patents
Manufacturing method of load bearing wafer and load bearing wafer Download PDFInfo
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- CN102040185B CN102040185B CN200910197669A CN200910197669A CN102040185B CN 102040185 B CN102040185 B CN 102040185B CN 200910197669 A CN200910197669 A CN 200910197669A CN 200910197669 A CN200910197669 A CN 200910197669A CN 102040185 B CN102040185 B CN 102040185B
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Abstract
The invention discloses a manufacturing method of a load bearing wafer, comprising the following steps: depositing silicon nitride on the surface of wafer; defining a region to be etched on the wafer on which the silicon nitride is deposited through a photoetching technology, wherein the region to be etched is the region except a fringe region; etching the silicon nitride on the wafer to be etched; removing the residual photoresist on the wafer, and etching a silicon substrate with a designated thickness on the region to be etched; and removing the residual silicon nitride on the wafer. The invention discloses the load bearing wafer at the same time. By using the load bearing wafer, the production of the wafer can be well protected.
Description
Technical field
The present invention relates to MEMS (MEMS) technology, particularly a kind of preparation method and a kind of carrying wafer that carries wafer.
Background technology
Current, the function of electronic product is more and more comprehensive, and people hope that the volume of electronic product is more and more littler simultaneously; Thereby be convenient for carrying; In order to satisfy above-mentioned two requirements simultaneously, a variety of settling modes have been proposed in the prior art, one of them is MEMS.
MEMS is meant on a common wafer integrated mechanical organ, sensor, actuator, signal processing and control circuit, interface circuit and power supply etc. in the Micro Electro Mechanical System of one, can with information obtain, handle and execution etc. integrates.Common electronic device is to use semiconductor fabrication techniques to make; MEMS has then further combined micro-processing technology on this basis; Wait and constitute electronic device through wafer optionally being corroded or depositing new structure sheaf, plurality of advantages such as have the integrated level height, volume is little, in light weight, power consumption is low and the response time is short.
In addition, in the existing semiconductor fabrication techniques, when wafer was made, all technologies were all carried out to the same face of wafer usually, such as, form cmos device at certain on simultaneously earlier, make metal interconnecting layer etc. then on this basis.But the production method of MEMS is different, needs to carry out to two faces of wafer.
Will there be a problem like this: when the making of the A face of accomplishing wafer, if will carry out the making of B face subsequently, so when the B face is made; The A face then need contact with equipment such as board, and usually, wafer is fixed on the board through vacuum cup; And owing to the A face of wafer has been made, so must present uneven state to a certain extent, like this; Just possibly cause the vacuum suction effect bad, briefly, just may leak gas; Thereby cause the position of wafer in the follow-up manufacturing process to be moved, and then the device of having made on the A face of frictional force to wafer that causes being produced etc. cause damage.In addition, even be not to fix wafer through vacuum cup, such as through clip or alternate manner, also the situation that wafer position moves may take place in the manufacturing process, so the device of having made on also can the A face to wafer etc. cause damage so.
For ease of describing, below the above-mentioned wafer of not made is called and produces wafer (productionwafer).
To the problems referred to above, prior art adopts following mode to protect producing wafer more:
Layer protecting film is pasted at the back side of waiting the face of making producing wafer in advance, wait to make finish after, again this diaphragm is torn.But this mode has increased pad pasting and two steps of dyestripping, so implement cumbersomely, and in a single day diaphragm is torn and just can not have been used again, so can cause the rising of cost.
Perhaps, paste one in advance at the back side of waiting the face of making that produces wafer and carry wafer (carrierwafer), this carrying wafer does not normally pass through the original wafer of any making.As shown in Figure 1, Fig. 1 is existing wafer and the bonding method sketch map of producing wafer of carrying.Fringe region carrying wafer is coated with water membrane, will carry wafer and produce bonding wafer together through this moisture film.Than preceding a kind of mode, this mode implements more simple, and carries wafer and can reuse, so also reduced cost.
But; This mode has problems equally; Because: though having prevented board, this mode causes damage to producing the device made on the wafer etc.; But,, so still can cause damage to producing the device made on the wafer etc. if carry wafer and produce between the wafer owing to reason generation relative motion such as being pasted not strongly; And; Though moisture film just has been coated in the fringe region that carries wafer, because the mobile of water is at random, after producing wafer in the stickup; Might flow to the central area by the fringe region of wafer, thereby cause corrosion producing the device made on the wafer etc.It is thus clear that also there is certain defective in this mode, so can not play a very good protection to producing wafer.
Summary of the invention
In view of this, main purpose of the present invention is to provide a kind of preparation method of carrying wafer, and the carrying wafer of producing through this method can play a very good protection to producing wafer.
Another object of the present invention is to provide a kind of carrying wafer, can play a very good protection producing wafer.
For achieving the above object, technical scheme of the present invention is achieved in that
A kind of carrying wafer manufacturing method, this method comprises:
At the crystal column surface deposited silicon nitride;
Define zone to be etched through photoetching process on the wafer of silicon nitride depositing, said zone to be etched is the zone except that the zone, edge;
Etch away the silicon nitride on the said zone to be etched;
Remove remaining photoresist on the wafer, and etch away the silicon substrate of the appointed thickness on the said zone to be etched;
Remove residual silicon nitride on the wafer.
Preferably, the thickness of the silicon nitride of said deposition is 500～1000 dusts.
Preferably, the thickness of the said silicon substrate that etches away is 10～100 microns.
Preferably, said fringe region is that the wafer ragged edge is along extending into 6～8 millimeters zone to crystal circle center's direction.
It is thus clear that, adopt technical scheme of the present invention, carrying groove of formation on the wafer, the zone in the soon existing carrying wafer except that the zone, edge etches away certain thickness, and it is constant that fringe region is then kept original thickness.Like this; Follow-uply coat moisture film, will carry bonding wafer after produce on the wafer, relative motion takes place even carry between wafer and the production wafer at the fringe region that carries wafer; Owing to be empty below the regions such as device that made on the production wafer, so also can not rub; In addition,, so only can flow in the groove, can not impact producing wafer if the water that carries on the crystal round fringes zone flows to the central area.
Fig. 1 is existing wafer and the bonding method sketch map of producing wafer of carrying.
Fig. 2 carries the flow chart of the preparation method embodiment of wafer for the present invention.
Fig. 3 is the carrying wafer and the bonding method sketch map of producing wafer in the embodiment of the invention.
Description of drawings
To the problem that exists in the prior art; A kind of preparation method of carrying wafer is proposed among the present invention; Carrying groove of formation on the wafer, the zone in the soon existing carrying wafer except that the zone, edge etches away certain thickness, and it is constant that fringe region is then kept original thickness.Like this; Follow-uply coat moisture film, will carry bonding wafer after produce on the wafer, relative motion takes place even carry between wafer and the production wafer at the fringe region that carries wafer; Owing to be empty below the regions such as device that made on the production wafer, so also can not rub; And, if the water that carries on the crystal round fringes zone flows to the central area, so only can flow in the groove, can not impact producing wafer.
For making the object of the invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is done to specify further.
Fig. 2 carries the flow chart of the preparation method embodiment of wafer for the present invention.As shown in Figure 2, may further comprise the steps:
The specific embodiment
Step 201: at crystal column surface deposited silicon nitride (SiN).
The wafer that is adopted in this step is meant the original wafer of not passing through any making.The purpose of deposited silicon nitride is in order, the zone that does not need etching to be protected when carrying out etching follow-up.
In addition, two kinds of depositional modes are provided altogether in the prior art, have been respectively physical vapor deposition (PVD) and chemical vapor deposition (CVD).Wherein, PVD is meant and utilizes certain physical process, the for example transfer of evaporation or sputter realization material, and promptly atom or ion are transferred to crystal column surface by the source, are deposited as film.Specifically, evaporation is meant heating evaporation source in vacuum system, makes atom obtain to break away from the constraint of metal surface behind enough energy and becomes the steam atom, and then be deposited on the wafer; Sputter is meant and in vacuum system, charges into inert gas, and under the high voltage electric field effect, the ion that gas discharge forms is quickened by highfield, and the bombardment target material makes target ion overflow and be splashed on the wafer.And CVD is meant steam and required other gas introducing reative cell with gaseous reactant that contains formation film element or liquid reactants, and in the process of crystal column surface through the chemical reaction film former, the thickness of the film of deposition is directly proportional with sedimentation time.In practical application, can select arbitrary mode wherein as required.
Usually, deposited silicon nitride adopts the CVD depositional mode.In this step, the thickness of the silicon nitride that is deposited can be that 500～1000 Izods are right.
Step 202: define zone to be etched on the wafer of silicon nitride depositing through photoetching process; Said zone to be etched is the zone except that the zone, edge.
Photoetching process is a kind of technology of widely using in the semiconductor fabrication, and its implementation procedure mainly comprises:
1) to crystal column surface clean, dehydration and film forming handle.
Cleaning comprises wet-cleaned and deionized water rinsing, to remove the pollutant of crystal column surface, like particle, organic matter and technology remnants etc.; Dehydration causes dried baking and banking up with earth in an enclosed cavity and accomplishes, to remove most of steam of crystal column surface; Use HMDS (HMDS) etc. to carry out film forming after the dehydration immediately and handle, to strengthen the adhesion of crystal column surface.
2) the crystal column surface spin coating one deck photoresist after processing.
Usually, also need carry out soft baking to the photoresist that is spun to crystal column surface and handle,, thereby improve photoresist the adhesion of crystal column surface and the uniformity of photoresist with the solvent in the removal photoresist.
3) aim at successively, make public and develop.
Light shield is aimed at the tram of crystal column surface, after the aligning, with light shield and exposing wafer, the figure on the light shield with bright dark feature transfer to the wafer that scribbles photoresist.
Development is a kind of important process mode in photoetching process, and developer capable of using is stayed crystal column surface with the dissolving of the zone of the solubilized on the photoresist with visible figure.
Follow-up, also need carry out post bake and bake and bank up with earth, the heat baking after promptly developing is handled, and to remove residual solvent in the photoresist, further improves the adhesion of photoresist to crystal column surface.
In this step, through above-mentioned 1), 2), 3) shown in process, depositing formation figure to be etched on the wafer of silicon nitride; Promptly define zone to be etched, specifically, the fringe region that is about to wafer protects with photoresist; Other zone, promptly the central area is zone to be etched.In addition, the big I of fringe region is decided according to the actual requirements, such as, definable wafer ragged edge is a fringe region along the zone that extends into 6～8 millimeters to crystal circle center's direction.
Step 203: etch away the silicon nitride on the zone to be etched.
Etching is a kind of method through physics or chemistry is removed unwanted material selectively from crystal column surface a process; In the existing technology two kinds of etching modes are provided, i.e. dry etching and wet etching.Wherein, dry etching is meant crystal column surface is exposed in the plasma, makes plasma and crystal column surface by the zone of protections such as photoresist physics or chemical reaction not taken place, thereby removes this regional surfacing; And wet etching is meant wafer is immersed in certain reagent solution, makes not by the surface in the zone of protections such as photoresist and reagent generation chemical reaction and is removed.
In this step, adopt the dry etching mode, under the protection of photoresist, etch away the silicon nitride on the central area on the wafer.
Step 204: remove remaining photoresist on the wafer.
After etching is accomplished,, need to remove remaining photoresist on the wafer for avoiding that subsequent technique is impacted.Concrete removing method is not limit, such as, can adopt carbon dioxide (CO
2) removing method, be about to wafer and be placed on the electrostatic chuck in the reaction chamber, and in reaction chamber, import CO
2, through the CO of electrode with input
2Ionization is plasma, and afterwards, oxonium ion that ionization goes out and the organic component generation chemical reaction in the photoresist generate CO
2And other easy oxide of removing etc., to reach the purpose of removing photoresist.Certainly, also can adopt other removing method, such as utilizing lytic agent photoresist to be cleaned etc.
Step 205: the silicon substrate that etches away the appointed thickness on the zone to be etched.
In this step, under the protection of residual silicon nitride, continuation is carried out etching to the silicon substrate of the central area of wafer.
Can adopt the wet etching mode, etching depth can be 10～100 microns (um).
Step 206: remove residual silicon nitride on the wafer.
In this step, can adopt the dry etching mode to remove residual silicon nitride, promptly be positioned at the silicon nitride on the crystal round fringes zone.
So far, promptly accomplished the manufacturing process of carrying wafer according to the invention.
Follow-up, can coat moisture film at the fringe region that carries wafer, thereby will carry bonding wafer to producing on the wafer, so that protect to producing wafer.Fig. 3 is the carrying wafer and the bonding method sketch map of producing wafer in the embodiment of the invention.
In a word, adopt the carrying wafer of making according to the method for the invention, relative motion takes place, also can not produce friction even carry wafer and produce between the wafer; And, if the water that carries on the crystal round fringes zone flows to the central area, so only can flow in the groove, can not impact producing wafer.
In sum, more than being merely preferred embodiment of the present invention, is not to be used to limit protection scope of the present invention.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (4)
1. preparation method of carrying wafer, this method comprises:
At the crystal column surface deposited silicon nitride;
Define zone to be etched through photoetching process on the wafer of silicon nitride depositing, said zone to be etched is the zone except that the zone, edge;
Etch away the silicon nitride on the said zone to be etched;
Remove remaining photoresist on the wafer, and etch away the silicon substrate of the appointed thickness on the said zone to be etched;
Remove residual silicon nitride on the wafer.
2. method according to claim 1 is characterized in that, the thickness of the silicon nitride of said deposition is 500～1000 dusts.
3. method according to claim 1 is characterized in that, the thickness of the said silicon substrate that etches away is 10～100 microns.
4. according to claim 1,2 or 3 described methods, it is characterized in that said fringe region is that the wafer ragged edge is along extending into 6～8 millimeters zone to crystal circle center's direction.
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| CN200910197669A CN102040185B (en) | 2009-10-23 | 2009-10-23 | Manufacturing method of load bearing wafer and load bearing wafer |
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| CN200910197669A CN102040185B (en) | 2009-10-23 | 2009-10-23 | Manufacturing method of load bearing wafer and load bearing wafer |
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| CN102040185A CN102040185A (en) | 2011-05-04 |
| CN102040185B true CN102040185B (en) | 2012-09-26 |
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| CN103576462B (en) * | 2012-07-19 | 2016-08-17 | 无锡华润上华半导体有限公司 | For the front of the wafer after the wet etching of the back side is carried out photoetching method |
| CN106783581B (en) * | 2017-01-20 | 2020-07-07 | 吉林麦吉柯半导体有限公司 | Processing method and application of semiconductor wafer and preparation method of Schottky diode |
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| CN2194365Y (en) * | 1994-07-13 | 1995-04-12 | 北京市天金机电新技术开发公司 | Multifunctional ion film plating machine |
| US6294313B1 (en) * | 1997-08-08 | 2001-09-25 | Dai Nippon Printing Co., Ltd. | Pattern forming body, pattern forming method, and their applications |
| CN1291501C (en) * | 2000-12-29 | 2006-12-20 | 霍尼韦尔国际公司 | Infrared detector packaged with improved antireflection element |
| CN100336935C (en) * | 2004-02-03 | 2007-09-12 | 旺宏电子股份有限公司 | Physical vapor deposition process and its equipment |
| CN101487138A (en) * | 2008-01-17 | 2009-07-22 | 矽延电子实业有限公司 | Silicon wafer bearing disk for epitaxial manufacture process |
-
2009
- 2009-10-23 CN CN200910197669A patent/CN102040185B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2194365Y (en) * | 1994-07-13 | 1995-04-12 | 北京市天金机电新技术开发公司 | Multifunctional ion film plating machine |
| US6294313B1 (en) * | 1997-08-08 | 2001-09-25 | Dai Nippon Printing Co., Ltd. | Pattern forming body, pattern forming method, and their applications |
| CN1291501C (en) * | 2000-12-29 | 2006-12-20 | 霍尼韦尔国际公司 | Infrared detector packaged with improved antireflection element |
| CN100336935C (en) * | 2004-02-03 | 2007-09-12 | 旺宏电子股份有限公司 | Physical vapor deposition process and its equipment |
| CN101487138A (en) * | 2008-01-17 | 2009-07-22 | 矽延电子实业有限公司 | Silicon wafer bearing disk for epitaxial manufacture process |
Non-Patent Citations (1)
| Title |
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| JP特开5-140744A 1993.06.08 |
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Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Effective date: 20121116 |
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Effective date of registration: 20121116 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Patentee after: Semiconductor Manufacturing International (Beijing) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |