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CN102034409B - Method for transmitting data and display using same - Google Patents

Method for transmitting data and display using same Download PDF

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Publication number
CN102034409B
CN102034409B CN200910179188.XA CN200910179188A CN102034409B CN 102034409 B CN102034409 B CN 102034409B CN 200910179188 A CN200910179188 A CN 200910179188A CN 102034409 B CN102034409 B CN 102034409B
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China
Prior art keywords
data
cycle
signal
source electrode
clock signal
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Expired - Fee Related
Application number
CN200910179188.XA
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Chinese (zh)
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CN102034409A (en
Inventor
张进添
陈英烈
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Himax Technologies Ltd
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Himax Technologies Ltd
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Priority to CN200910179188.XA priority Critical patent/CN102034409B/en
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Abstract

The invention discloses a method for transmitting data between a time schedule controller and a source driver of a display and the display using the same. The data transmission method comprises the following steps of: confirming the start of a blank cycle of a picture frame cycle; sampling de-skew data in a data bus on the basis of a data frequency signal in the blank cycle; performing de-skew function by comparing the sampled de-skew data with a preset de-skew code and adjusting the data frequency signal; confirming the start of a data input cycle of the picture frame cycle; and sampling pixel data in the data bus on the basis of the adjusted data frequency signal in the data input cycle.

Description

The display that is used for methods and applications the method for the transmission of data
Technical field
The present invention relates to the display of a kind of data transmission method and adopting said method, particularly a kind of at display time schedule controller and source drive between the method for the transmission of data and the display of adopting said method.
Background technology
Liquid crystal display (Liquid Crystal Displayer; LCD) system's LCD array of comprising time schedule controller, driver and forming according to ranks.Time schedule controller receives image data and produces the required clock signal of driver to driver, optionally to drive the pixel in the LCD system.Driver comprises at least one source electrode driver and at least one gate drivers.
In order to promote the image quality of LCD, resolution and the turnover rate of display are more and more higher, however the easier problem that causes deviation of signal (skew) of higher transmission speed.
Summary of the invention
Therefore, one aspect of the present invention is at the display that a kind of data transmission method and adopting said method are provided.
According to one embodiment of present invention, in this data transmission method, at first confirm the beginning of the blank cycle in picture frame cycle.Then, in this blank cycle, the based on data clock signal is taken a sample to erasure signal deviation (de-skew) data in the data bus.Then, by more sampled erasure signal deviation data and default erasure signal deviation code, and adjust the data clock signal, carry out erasure signal deviation function.Then, confirm the beginning in the data input cycle in picture frame cycle.Then, in the data input cycle, the data clock signal based on after adjusting comes the pixel data in the data bus is taken a sample.
According to one embodiment of present invention, this display comprises: time schedule controller data bus and source electrode driver.Source electrode driver system is electrically connected to time schedule controller by data bus.Source electrode driver is for being used for carrying out the following step: at first, confirm the beginning of the blank cycle in picture frame cycle.Then, in blank cycle, the based on data clock signal is taken a sample to the erasure signal deviation data in the data bus, to carry out erasure signal deviation function.Then, in the data input cycle, the pixel data in the data bus is taken a sample, wherein, time schedule controller is carried out erasure signal deviation function for by more sampled erasure signal deviation data and default erasure signal deviation code.
Description of drawings
For above and other objects of the present invention, feature and advantage can be become apparent, above especially exemplified by a preferred embodiment, and cooperate appended graphicly, be described in detail below:
Fig. 1 is the structural representation that illustrates display according to an embodiment of the invention;
Fig. 2 illustrates the sequential synoptic diagram that is sent to the data of source electrode driver by time schedule controller according to an embodiment of the invention;
Fig. 3 is the sequential synoptic diagram that illustrates blank cycle as shown in Figure 2;
Fig. 4 is the sequential synoptic diagram that illustrates the data input cycle as shown in Figure 2;
Fig. 5 is the schematic flow sheet that illustrates the method for the transmission of data between the source electrode driver at display according to an embodiment of the invention and time schedule controller.
The primary clustering symbol description
100: display
102: source electrode driver
104: gate drivers
106: time schedule controller
108: the brightness reference value generator
110: panel
205: pixel data
210: the cycle
220a: erasure signal deviation data
220b: buffer data
400: data transmission method
410: step
420: step
430: step
440: step
450: step
POL: polar signal
TP: latch-up signal
D: data bus
CLK: data frequency signal
F 1: the picture frame cycle
F 2: the picture frame cycle
T B: blank cycle
T D: the data input cycle
T R: reset cycle
Embodiment
For making illustration of the present invention more clear and definite and complete, following narration describes with reference to Fig. 1 to Fig. 5.
Please refer to the 1st figure, it is the structural representation that illustrates display 100 according to an embodiment of the invention.Display 100 comprises at least one source electrode driver 102, at least one gate drivers 104, time schedule controller 106, brightness reference value generator 108 and panel 110.Time schedule controller 106 is sent display and is controlled signal to source electrode driver 102 by transmission line.Control signal comprises polar signal POL, and this polar signal POL is the polarity that is used for the pixel of control panel 110.Control signal also comprises latch-up signal TP, and this latch-up signal TP is for being used for control source electrode driver output drive signal to panel 110.It is worth mentioning that transmit pixel data 205 with at least one data bus D, this data bus D can be differential signal line or single transmission line.In addition, control signal comprises data clock signal CLK.
Please refer to the 2nd figure, it is to illustrate the sequential synoptic diagram that is sent to the data of source electrode driver 102 by time schedule controller 106 according to an embodiment of the invention, wherein at the first picture frame cycle F 1These data of middle transmission.In this embodiment, the first picture frame cycle F 1With the second picture frame cycle F 2Each all comprise a blank cycle T BWith a data input cycle T DAt blank cycle T BIn, time schedule controller 106 transmits setting data by data bus D, wherein blank cycle T BCan be described as again vertical blank cycle (Vertical Blank Period; VBI).This setting data is for for example including for the buffer data 220b of the buffer of setting source electrode driver 102 and erasure signal deviation (de-skew) the data 220a that is used for coming for source electrode driver 102 erasure signal deviation (skew).In data input cycle T DIn, time schedule controller 106 transmits pixel data 205 by data bus D.Present embodiment is for utilizing blank cycle T BCome so can reduce the transmission line quantity between time schedule controller 106 and source electrode controller by data bus D transmission setting data.
It should be noted that data clock signal CLK as shown in Figure 2 only is the example that embodiments of the invention are described.In fact, the frequency of data clock signal CLK can be several times shown in the 2nd figure.
Please refer to the 3rd figure, it is the blank cycle T that illustrates as shown in Figure 2 BThe sequential synoptic diagram.Blank cycle T BBegin as for example, confirm by the state that checks polar signal POL and latch-up signal TP.In the present embodiment, blank cycle T BFor by in the cycle 210 by on draw the latch-up signal TP of (Pull-high) and the polar signal POL of two edge thixotropings (toggle) to confirm.Confirming blank cycle T BAfter, source electrode driver 102 begins to receive setting data.In the present embodiment, setting data is for example setting data 220b and erasure signal deviation data 220a.
Source electrode driver 102 receives setting data 220b and sets the parameter of self.Owing to not yet carry out erasure signal deviation function, therefore setting data 220b can transmit by another lower frequency signal of frequency ratio data-signal clock pulse CLK, and then source electrode driver 102 can come setting data 220b is taken a sample to guarantee based on the higher data clock signal of frequency the correctness of the sampling of setting data 220b.
Erasure signal deviation data 220a that it should be noted that present embodiment is at blank cycle T BIn transmit by data bus, and source electrode driver 102 carries out erasure signal deviation function simultaneously.Both all know default erasure signal deviation code time schedule controller 106 and source electrode controller 102.Time schedule controller 106 is at blank cycle T BMiddle transmission erasure signal deviation data 220a is to source electrode driver 102.Then, 102 pairs of source electrode drivers are eliminated deviation of signal data 220a and are taken a sample to check that whether sampled erasure signal deviation data 220a is corresponding to default erasure signal deviation code.If erasure signal deviation data 220a is not correctly corresponding to default erasure signal deviation code, source electrode driver 102 can fine setting data clock signal.Source electrode driver 102 can at the initial phase behind the electric power starting of display 100 or optionally in each or some blank cycles, be carried out above-mentioned erasure signal deviation function.Moreover source electrode driver 102 can comprise for the internal memory that stores preset signals deviation code.
Please refer to the 4th figure, it is the data input cycle T that illustrates as shown in Figure 2 DThe sequential synoptic diagram.In the present embodiment, data input cycle T DIn quantity that can be by calculating clock pulse and the detecting data bus for reset cycle T RAnd by on the signal that draws confirm.When confirming data input cycle T DAfter, source electrode driver 102 receives pixel data 205 and drives panel 110.
Please refer to the 5th figure, it is the schematic flow sheet that illustrates the method 400 of the source electrode driver 102 at display 100 according to an embodiment of the invention and 106 the transmission of datas of time schedule controller.In data transmission method 400, at first in step 410, confirm blank cycle T BBeginning, for example, confirm blank cycle T by checking latch-up signal TP and polar signal POL BBeginning.Then, in step 420, at blank cycle T BIn, based on data clock signal CLK comes the erasure signal deviation data in the data bus is taken a sample.Then, in step 430, by more sampled erasure signal deviation data and default erasure signal deviation code, and adjust data clock signal CLK, carry out erasure signal deviation function.Then, in step 440, confirm picture frame cycle F 1Data inputs cycle T DBeginning.Then, in step 450, in data input cycle T DIn, the data clock signal based on after adjusting comes the pixel data 205 in the data bus is taken a sample.
It should be noted that and between step 410 and 420, to carry out a step, with at blank cycle T BIn again buffer data 220b is taken a sample with initialization source electrode driver 102.
According to the above, embodiments of the invention utilize data bus to transmit setting data and erasure signal deviation data in the vertical blank interval, and so embodiments of the invention do not need extra transmission line to transmit setting data and erasure signal deviation data.In addition, because the erasure signal deviation data is for to transmit by another less clock signal of the original clock signal of frequency ratio, so the change of the function of erasure signal deviation is more reliable.
Although the present invention discloses as above with embodiment; so it is not to limit the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.

Claims (13)

1. data transmission method is used for the transmission of data between the time schedule controller of display and source electrode driver, and wherein, described data transmission method comprises:
Confirm the beginning of the blank cycle in picture frame cycle; Wherein, confirm that the step of the beginning of described blank cycle comprises: the state of detecting latch-up signal and polar signal, and confirm by on the described latch-up signal that draws and just at the described polar signal of bifurcation thixotroping;
In described blank cycle, the based on data clock signal is taken a sample to the erasure signal deviation data in the data bus;
By more sampled described erasure signal deviation data and default erasure signal deviation code, and adjust described data clock signal, carry out erasure signal deviation function;
Confirm the beginning in the data input cycle in described picture frame cycle; And
In the described data input cycle, the described data clock signal based on after adjusting comes the pixel data in the described data bus is taken a sample.
2. data transmission method as claimed in claim 1 also comprises: in described blank cycle, the buffer data in the described data bus are taken a sample, with the described source electrode driver of initialization.
3. data transmission method as claimed in claim 2, wherein, described time schedule controller transmits described buffer data by clock signal, and the frequency of described clock pulse is lower than described data clock signal.
4. data transmission method as claimed in claim 3, wherein, described source electrode driver comes described buffer data are taken a sample based on described data clock signal.
5. data transmission method as claimed in claim 1, wherein, described blank cycle is the vertical blank cycle.
6. data transmission method as claimed in claim 1, wherein, confirm that the step of the beginning in described data input cycle comprises:
Calculate the quantity of the described data clock signal after adjusting; And
By detect corresponding reset cycle in the described data bus by on the signal that draws confirm.
7. display comprises:
Time schedule controller;
Data bus; And
Source electrode driver, it is electrically connected to described time schedule controller by described data bus, and wherein, described source electrode driver is used for carrying out the following step:
Confirm the beginning of the blank cycle in picture frame cycle; Wherein, described source electrode driver is by the state of detecting latch-up signal and polar signal, and by confirm by on the described latch-up signal that draws and just at the described polar signal of bifurcation thixotroping, confirm the beginning of described blank cycle;
In described blank cycle, the based on data clock signal is taken a sample to the erasure signal deviation data in the data bus, to carry out erasure signal deviation function; And
In the data input cycle in described picture frame cycle, the pixel data in the described data bus is taken a sample;
Wherein, described source electrode driver passes through more sampled described erasure signal deviation data and default erasure signal deviation code, and adjusts described data clock signal, carries out described erasure signal deviation function.
8. display as claimed in claim 7, wherein, described source electrode driver is adjusted described data clock signal according to comparative result, and based on the described data clock signal after adjusting, comes described pixel data is taken a sample.
9. display as claimed in claim 7, wherein, described source electrode driver for corresponding reset cycle in the quantity by the described data clock signal after confirm to calculate adjusting and the described data bus of detecting by on the signal that draws, confirm the beginning in the described data input cycle in described picture frame cycle.
10. display as claimed in claim 7, wherein, described source electrode driver is also taken a sample to the buffer data in the described data bus in described blank cycle, with the described source electrode driver of initialization.
11. display as claimed in claim 10, wherein, described time schedule controller transmits described buffer data by clock signal, and the frequency of described clock pulse is lower than described data clock signal.
12. display as claimed in claim 11, wherein, described source electrode driver comes described buffer data are taken a sample based on described data clock signal.
13. display as claimed in claim 7, wherein, described blank cycle is the vertical blank cycle.
CN200910179188.XA 2009-09-29 2009-09-29 Method for transmitting data and display using same Expired - Fee Related CN102034409B (en)

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Publication number Priority date Publication date Assignee Title
TWI459360B (en) * 2011-08-09 2014-11-01 Raydium Semiconductor Corp Source driver with automatic de-skew capability
KR102512990B1 (en) * 2016-03-29 2023-03-22 삼성전자주식회사 Display driving circuit and display device comprising thereof
CN111950222B (en) * 2019-04-29 2024-05-24 瑞昱半导体股份有限公司 Method for generating circuit layout by using simulation software
CN110342612A (en) * 2019-08-22 2019-10-18 广东叮咚净水科技有限公司 The water shortage detection device of water purifier

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1523490A (en) * 2003-07-02 2004-08-25 ��ʢ���ӹɷ����޹�˾ Circuit and method for calibrating data transmission time sequence of multiple data channels
CN1963797A (en) * 2005-11-08 2007-05-16 联发科技股份有限公司 Systems and methods for automatically eliminating imbalance between signals
CN101042843A (en) * 2006-03-21 2007-09-26 联詠科技股份有限公司 Display system capable of automatically regulating signal bias and drive method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1523490A (en) * 2003-07-02 2004-08-25 ��ʢ���ӹɷ����޹�˾ Circuit and method for calibrating data transmission time sequence of multiple data channels
CN1963797A (en) * 2005-11-08 2007-05-16 联发科技股份有限公司 Systems and methods for automatically eliminating imbalance between signals
CN101042843A (en) * 2006-03-21 2007-09-26 联詠科技股份有限公司 Display system capable of automatically regulating signal bias and drive method thereof

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